SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_mubi8_sync_otp_dis_rv_dm_late_debug | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
91.35 | 100.00 | 76.60 | 92.63 | 100.00 | 87.50 | dut |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 6 | 6 | 100.00 | |
CONT_ASSIGN | 124 | 1 | 1 | 100.00 |
ALWAYS | 128 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
124 | 1 | 1 | |
128 | 1 | 1 | |
168 | 4 | 4 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 247 | 247 | 0 | 0 |
OutputsKnown_A | 119386541 | 119339990 | 0 | 0 |
gen_flops.gen_no_stable_chks.OutputDelay_A | 119386541 | 119337905 | 0 | 741 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 247 | 247 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T15 | 1 | 1 | 0 | 0 |
T27 | 1 | 1 | 0 | 0 |
T28 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 119386541 | 119339990 | 0 | 0 |
T1 | 487532 | 486739 | 0 | 0 |
T2 | 169381 | 169009 | 0 | 0 |
T3 | 5650 | 5553 | 0 | 0 |
T4 | 488829 | 488629 | 0 | 0 |
T7 | 421316 | 421199 | 0 | 0 |
T8 | 6912 | 6844 | 0 | 0 |
T9 | 19802 | 19747 | 0 | 0 |
T15 | 409765 | 409686 | 0 | 0 |
T27 | 22354 | 22278 | 0 | 0 |
T28 | 6103 | 6052 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 119386541 | 119337905 | 0 | 741 |
T1 | 487532 | 486706 | 0 | 3 |
T2 | 169381 | 168991 | 0 | 3 |
T3 | 5650 | 5550 | 0 | 3 |
T4 | 488829 | 488620 | 0 | 3 |
T7 | 421316 | 421193 | 0 | 3 |
T8 | 6912 | 6841 | 0 | 3 |
T9 | 19802 | 19744 | 0 | 3 |
T15 | 409765 | 409683 | 0 | 3 |
T27 | 22354 | 22275 | 0 | 3 |
T28 | 6103 | 6049 | 0 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |