Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 665664 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 944388 1 T5 5 T6 2 T28 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 601722 1 T5 2 T6 1 T28 3
values[0x0] 317096 1 T5 1 T6 3 T32 1
values[0x1] 691234 1 T2 1 T4 1 T5 5



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 320025 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1290027 1 T5 6 T6 2 T28 3



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 6389 1 T8 87 T167 3 T46 377
valid_sources[0x01] 6907 1 T8 100 T46 412 T17 1134
valid_sources[0x02] 5918 1 T8 89 T46 380 T17 1100
valid_sources[0x03] 5831 1 T8 78 T46 355 T17 1094
valid_sources[0x04] 5954 1 T38 1 T24 1 T8 123
valid_sources[0x05] 6445 1 T8 101 T46 412 T17 1153
valid_sources[0x06] 6128 1 T8 111 T46 367 T17 1081
valid_sources[0x07] 5583 1 T8 50 T15 2 T46 384
valid_sources[0x08] 6159 1 T8 82 T45 1 T42 1
valid_sources[0x09] 5581 1 T8 109 T155 1 T42 1
valid_sources[0x0a] 6310 1 T38 1 T8 75 T46 400
valid_sources[0x0b] 7659 1 T8 97 T155 1 T46 353
valid_sources[0x0c] 6318 1 T38 1 T8 93 T148 1
valid_sources[0x0d] 5956 1 T5 1 T38 1 T8 98
valid_sources[0x0e] 6328 1 T8 178 T46 387 T17 1134
valid_sources[0x0f] 6078 1 T8 79 T45 1 T46 368
valid_sources[0x10] 6223 1 T8 62 T46 351 T17 1075
valid_sources[0x11] 6362 1 T8 136 T46 377 T17 1054
valid_sources[0x12] 6717 1 T8 101 T44 1 T149 4
valid_sources[0x13] 6124 1 T8 85 T46 368 T17 1080
valid_sources[0x14] 6219 1 T8 119 T44 2 T46 383
valid_sources[0x15] 6038 1 T8 121 T155 1 T42 2
valid_sources[0x16] 6142 1 T8 112 T46 390 T17 1094
valid_sources[0x17] 6150 1 T8 110 T46 364 T17 1082
valid_sources[0x18] 5964 1 T8 127 T46 372 T17 1126
valid_sources[0x19] 5857 1 T8 136 T155 1 T46 364
valid_sources[0x1a] 5859 1 T8 57 T46 360 T17 1104
valid_sources[0x1b] 8435 1 T8 85 T89 1 T46 397
valid_sources[0x1c] 6129 1 T38 1 T8 99 T149 1
valid_sources[0x1d] 6582 1 T8 55 T46 405 T17 1128
valid_sources[0x1e] 6197 1 T8 54 T149 7 T46 414
valid_sources[0x1f] 6697 1 T32 1 T8 124 T46 356
valid_sources[0x20] 6188 1 T8 69 T46 350 T17 1111
valid_sources[0x21] 6394 1 T8 107 T46 384 T17 1131
valid_sources[0x22] 6432 1 T8 111 T46 346 T17 1082
valid_sources[0x23] 6103 1 T8 141 T46 373 T17 1085
valid_sources[0x24] 6271 1 T8 110 T46 378 T17 1097
valid_sources[0x25] 6308 1 T38 1 T8 117 T42 1
valid_sources[0x26] 6323 1 T8 89 T47 3 T46 381
valid_sources[0x27] 7385 1 T38 1 T8 89 T46 375
valid_sources[0x28] 5702 1 T8 52 T46 385 T17 1100
valid_sources[0x29] 7019 1 T38 3 T8 63 T46 391
valid_sources[0x2a] 6091 1 T8 142 T46 362 T17 1076
valid_sources[0x2b] 6362 1 T8 81 T168 4 T46 386
valid_sources[0x2c] 6269 1 T38 1 T8 67 T44 1
valid_sources[0x2d] 6047 1 T8 73 T46 378 T17 1046
valid_sources[0x2e] 6285 1 T8 166 T47 3 T36 6
valid_sources[0x2f] 7184 1 T24 1 T8 73 T47 2
valid_sources[0x30] 6489 1 T20 1 T8 79 T155 1
valid_sources[0x31] 6753 1 T8 72 T46 361 T17 1098
valid_sources[0x32] 6627 1 T6 5 T38 1 T8 109
valid_sources[0x33] 6024 1 T38 2 T8 67 T47 1
valid_sources[0x34] 6439 1 T28 1 T8 116 T46 363
valid_sources[0x35] 5667 1 T20 2 T8 111 T148 1
valid_sources[0x36] 5894 1 T8 89 T47 1 T37 2
valid_sources[0x37] 6186 1 T8 59 T41 1 T25 1
valid_sources[0x38] 6017 1 T8 121 T46 379 T17 1083
valid_sources[0x39] 5622 1 T8 109 T42 1 T46 351
valid_sources[0x3a] 6905 1 T8 93 T36 8 T46 351
valid_sources[0x3b] 5945 1 T38 1 T8 87 T25 1
valid_sources[0x3c] 6023 1 T8 81 T46 347 T17 1057
valid_sources[0x3d] 6009 1 T38 1 T8 68 T25 4
valid_sources[0x3e] 6202 1 T8 119 T46 368 T17 1112
valid_sources[0x3f] 6490 1 T8 93 T46 381 T135 4
valid_sources[0x40] 7458 1 T38 5 T8 81 T47 1
valid_sources[0x41] 6414 1 T24 2 T8 101 T46 385
valid_sources[0x42] 5583 1 T8 79 T46 353 T17 1084
valid_sources[0x43] 5838 1 T8 111 T89 1 T46 374
valid_sources[0x44] 6220 1 T8 54 T141 1 T46 342
valid_sources[0x45] 7485 1 T38 1 T8 83 T45 3
valid_sources[0x46] 6580 1 T38 1 T8 120 T155 1
valid_sources[0x47] 6583 1 T48 11 T8 56 T46 398
valid_sources[0x48] 6889 1 T8 114 T125 1 T45 1
valid_sources[0x49] 6288 1 T8 89 T46 384 T17 1101
valid_sources[0x4a] 6075 1 T8 109 T46 376 T17 1117
valid_sources[0x4b] 6231 1 T8 100 T46 382 T17 1057
valid_sources[0x4c] 5744 1 T8 113 T46 339 T17 1091
valid_sources[0x4d] 6668 1 T38 1 T8 124 T46 399
valid_sources[0x4e] 5643 1 T8 103 T18 2 T46 356
valid_sources[0x4f] 6033 1 T8 88 T46 376 T17 1051
valid_sources[0x50] 5808 1 T8 109 T46 365 T17 1082
valid_sources[0x51] 5733 1 T8 109 T46 367 T17 1062
valid_sources[0x52] 5763 1 T8 114 T46 350 T17 1056
valid_sources[0x53] 6270 1 T38 1 T8 146 T46 359
valid_sources[0x54] 6353 1 T2 1 T8 90 T11 5
valid_sources[0x55] 6105 1 T8 85 T45 1 T46 358
valid_sources[0x56] 6129 1 T8 87 T169 1 T46 388
valid_sources[0x57] 7137 1 T8 43 T46 378 T17 1066
valid_sources[0x58] 6398 1 T8 73 T40 7 T46 382
valid_sources[0x59] 6960 1 T8 69 T46 362 T17 1111
valid_sources[0x5a] 6142 1 T38 1 T8 132 T46 360
valid_sources[0x5b] 6376 1 T5 1 T24 1 T8 95
valid_sources[0x5c] 5916 1 T8 79 T46 399 T17 1121
valid_sources[0x5d] 6715 1 T8 66 T46 375 T17 1104
valid_sources[0x5e] 6359 1 T8 140 T46 405 T17 1147
valid_sources[0x5f] 6243 1 T5 2 T38 1 T8 64
valid_sources[0x60] 6182 1 T38 1 T8 92 T41 1
valid_sources[0x61] 6715 1 T38 2 T8 85 T46 394
valid_sources[0x62] 6504 1 T8 74 T9 69 T46 359
valid_sources[0x63] 6158 1 T38 1 T8 126 T46 387
valid_sources[0x64] 6387 1 T38 2 T8 54 T46 354
valid_sources[0x65] 6241 1 T8 135 T155 1 T46 379
valid_sources[0x66] 5934 1 T8 75 T46 350 T17 1126
valid_sources[0x67] 6400 1 T5 2 T8 116 T41 2
valid_sources[0x68] 6189 1 T8 87 T46 360 T17 1108
valid_sources[0x69] 6196 1 T8 94 T46 401 T17 1048
valid_sources[0x6a] 5673 1 T8 119 T46 354 T17 1069
valid_sources[0x6b] 6372 1 T8 117 T46 354 T17 1035
valid_sources[0x6c] 6796 1 T8 87 T44 4 T46 347
valid_sources[0x6d] 6892 1 T8 126 T15 3 T46 386
valid_sources[0x6e] 6117 1 T8 116 T21 3 T46 350
valid_sources[0x6f] 6196 1 T8 77 T46 373 T17 1117
valid_sources[0x70] 6395 1 T8 104 T37 4 T46 370
valid_sources[0x71] 6672 1 T8 81 T37 2 T46 388
valid_sources[0x72] 6639 1 T8 108 T46 357 T17 1067
valid_sources[0x73] 6391 1 T28 2 T38 2 T8 71
valid_sources[0x74] 6319 1 T8 43 T44 1 T149 1
valid_sources[0x75] 7031 1 T8 72 T46 359 T170 2
valid_sources[0x76] 5794 1 T8 68 T149 3 T46 325
valid_sources[0x77] 6456 1 T38 1 T8 69 T46 381
valid_sources[0x78] 6508 1 T38 2 T8 58 T46 357
valid_sources[0x79] 6177 1 T38 1 T8 74 T45 1
valid_sources[0x7a] 6193 1 T24 1 T8 55 T46 383
valid_sources[0x7b] 6239 1 T28 2 T8 71 T46 361
valid_sources[0x7c] 5982 1 T38 1 T8 44 T46 369
valid_sources[0x7d] 6386 1 T8 102 T155 1 T46 373
valid_sources[0x7e] 6060 1 T8 118 T46 372 T17 1070
valid_sources[0x7f] 6106 1 T8 97 T39 80 T46 419
valid_sources[0x80] 6593 1 T8 55 T46 360 T17 1124



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 396533 1 T5 1 T28 1 T48 6
values[0x0] all_enables biggest_size 274522 1 T6 1 T28 1 T48 1
values[0x1] all_enables biggest_size 273333 1 T5 4 T6 1 T20 1


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29469 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 633175 1 T1 1 T7 1 T2 1



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 171673 1 T8 4283 T46 17090 T17 52870
values[0x0] 239063 1 T2 1 T4 1 T5 4
values[0x1] 251908 1 T1 1 T7 1 T3 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 16017 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 646627 1 T1 1 T7 1 T2 1



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2823 1 T51 1 T8 63 T46 263
valid_sources[0x01] 2669 1 T8 74 T79 2 T46 249
valid_sources[0x02] 2329 1 T8 56 T46 288 T17 781
valid_sources[0x03] 2625 1 T8 65 T171 2 T172 1
valid_sources[0x04] 2800 1 T8 69 T29 1 T30 1
valid_sources[0x05] 2558 1 T8 76 T46 271 T17 792
valid_sources[0x06] 2721 1 T8 71 T46 281 T17 818
valid_sources[0x07] 2459 1 T8 45 T25 1 T46 277
valid_sources[0x08] 2680 1 T8 52 T171 1 T173 1
valid_sources[0x09] 2188 1 T8 63 T174 1 T46 255
valid_sources[0x0a] 2091 1 T8 71 T56 4 T40 2
valid_sources[0x0b] 2240 1 T8 67 T46 271 T17 704
valid_sources[0x0c] 2173 1 T8 68 T46 240 T17 792
valid_sources[0x0d] 2663 1 T28 1 T8 73 T175 1
valid_sources[0x0e] 2436 1 T8 52 T89 9 T176 1
valid_sources[0x0f] 2297 1 T8 68 T177 1 T46 220
valid_sources[0x10] 2336 1 T8 67 T86 1 T178 1
valid_sources[0x11] 2580 1 T51 1 T8 65 T86 1
valid_sources[0x12] 2315 1 T8 62 T46 251 T17 766
valid_sources[0x13] 2403 1 T8 45 T40 2 T46 286
valid_sources[0x14] 2473 1 T8 67 T179 1 T46 253
valid_sources[0x15] 2456 1 T8 67 T180 16 T173 1
valid_sources[0x16] 2999 1 T8 64 T181 1 T155 1
valid_sources[0x17] 2483 1 T8 56 T46 270 T17 801
valid_sources[0x18] 2580 1 T8 68 T182 1 T44 2
valid_sources[0x19] 2572 1 T8 63 T182 1 T46 273
valid_sources[0x1a] 2421 1 T8 84 T137 1 T183 1
valid_sources[0x1b] 2522 1 T28 1 T8 57 T67 1
valid_sources[0x1c] 3207 1 T48 1 T8 65 T46 247
valid_sources[0x1d] 2288 1 T8 66 T46 222 T17 866
valid_sources[0x1e] 2431 1 T8 62 T184 1 T44 2
valid_sources[0x1f] 2147 1 T8 59 T185 1 T46 250
valid_sources[0x20] 2547 1 T8 60 T9 4 T186 4
valid_sources[0x21] 2657 1 T8 64 T181 1 T44 1
valid_sources[0x22] 2592 1 T33 2 T8 62 T25 1
valid_sources[0x23] 3223 1 T8 66 T187 1 T176 1
valid_sources[0x24] 2836 1 T8 69 T181 1 T182 1
valid_sources[0x25] 2958 1 T8 65 T188 3 T46 277
valid_sources[0x26] 2363 1 T8 62 T189 4 T46 242
valid_sources[0x27] 3078 1 T8 67 T80 1 T171 1
valid_sources[0x28] 2654 1 T8 68 T190 6 T46 256
valid_sources[0x29] 2414 1 T8 72 T46 253 T170 1
valid_sources[0x2a] 2337 1 T8 67 T46 248 T17 837
valid_sources[0x2b] 2355 1 T8 65 T191 1 T179 1
valid_sources[0x2c] 2871 1 T8 59 T63 2 T192 1
valid_sources[0x2d] 2567 1 T8 58 T46 284 T17 704
valid_sources[0x2e] 2404 1 T8 62 T67 1 T137 2
valid_sources[0x2f] 2424 1 T57 1 T8 55 T46 243
valid_sources[0x30] 2809 1 T8 69 T125 1 T46 256
valid_sources[0x31] 2363 1 T8 56 T46 260 T17 783
valid_sources[0x32] 2474 1 T8 61 T143 1 T46 251
valid_sources[0x33] 2446 1 T8 68 T175 1 T46 282
valid_sources[0x34] 2661 1 T8 60 T88 1 T46 255
valid_sources[0x35] 2393 1 T8 67 T86 2 T88 1
valid_sources[0x36] 2712 1 T8 63 T193 4 T185 1
valid_sources[0x37] 2453 1 T8 71 T46 286 T17 833
valid_sources[0x38] 2869 1 T8 51 T184 2 T194 22
valid_sources[0x39] 2722 1 T32 5 T8 64 T195 1
valid_sources[0x3a] 2319 1 T8 54 T46 259 T17 804
valid_sources[0x3b] 2303 1 T8 55 T178 2 T190 1
valid_sources[0x3c] 2784 1 T14 1 T8 75 T72 1
valid_sources[0x3d] 2476 1 T1 1 T8 66 T37 1
valid_sources[0x3e] 2484 1 T8 65 T178 1 T177 1
valid_sources[0x3f] 2654 1 T8 68 T46 276 T196 2
valid_sources[0x40] 3058 1 T8 62 T72 2 T197 2
valid_sources[0x41] 2381 1 T4 1 T8 57 T46 260
valid_sources[0x42] 2487 1 T8 58 T179 1 T46 228
valid_sources[0x43] 2594 1 T7 1 T8 61 T25 2
valid_sources[0x44] 2868 1 T8 72 T46 224 T17 845
valid_sources[0x45] 2140 1 T8 60 T137 1 T197 2
valid_sources[0x46] 2462 1 T8 48 T142 5 T46 233
valid_sources[0x47] 2224 1 T8 57 T46 286 T198 1
valid_sources[0x48] 2349 1 T8 64 T15 7 T46 287
valid_sources[0x49] 2991 1 T8 65 T168 5 T12 1
valid_sources[0x4a] 2108 1 T8 65 T46 251 T17 756
valid_sources[0x4b] 2554 1 T8 47 T179 1 T46 284
valid_sources[0x4c] 2238 1 T8 57 T46 232 T17 843
valid_sources[0x4d] 2507 1 T8 64 T31 1 T193 1
valid_sources[0x4e] 2748 1 T8 75 T88 1 T199 1
valid_sources[0x4f] 2541 1 T8 75 T174 1 T46 245
valid_sources[0x50] 2581 1 T8 55 T200 2 T46 280
valid_sources[0x51] 2799 1 T8 53 T185 2 T46 243
valid_sources[0x52] 3049 1 T8 81 T174 1 T46 229
valid_sources[0x53] 3273 1 T55 1 T8 77 T177 1
valid_sources[0x54] 2475 1 T8 55 T46 272 T17 909
valid_sources[0x55] 2456 1 T8 66 T67 1 T179 1
valid_sources[0x56] 2378 1 T8 63 T175 1 T152 1
valid_sources[0x57] 2396 1 T8 71 T46 243 T17 797
valid_sources[0x58] 2440 1 T8 59 T186 8 T46 302
valid_sources[0x59] 2366 1 T8 71 T43 1 T46 263
valid_sources[0x5a] 2372 1 T8 63 T46 296 T196 1
valid_sources[0x5b] 3131 1 T8 81 T37 1 T46 262
valid_sources[0x5c] 2275 1 T8 75 T21 1 T185 1
valid_sources[0x5d] 2269 1 T8 60 T184 1 T46 239
valid_sources[0x5e] 3147 1 T8 73 T40 1 T37 2
valid_sources[0x5f] 2713 1 T8 78 T47 8 T46 260
valid_sources[0x60] 2576 1 T8 74 T201 9 T46 261
valid_sources[0x61] 3048 1 T8 68 T46 284 T17 886
valid_sources[0x62] 2598 1 T8 87 T152 1 T46 277
valid_sources[0x63] 2418 1 T28 1 T8 59 T9 5
valid_sources[0x64] 2489 1 T8 60 T202 3 T46 257
valid_sources[0x65] 2682 1 T8 67 T46 268 T17 927
valid_sources[0x66] 2325 1 T51 1 T8 56 T175 1
valid_sources[0x67] 2452 1 T28 1 T8 70 T86 2
valid_sources[0x68] 2514 1 T8 54 T67 1 T46 259
valid_sources[0x69] 2604 1 T8 59 T46 256 T17 829
valid_sources[0x6a] 2350 1 T8 46 T175 1 T46 279
valid_sources[0x6b] 2751 1 T8 70 T174 1 T179 2
valid_sources[0x6c] 2829 1 T8 56 T185 1 T46 264
valid_sources[0x6d] 2304 1 T8 51 T152 1 T46 254
valid_sources[0x6e] 3109 1 T3 1 T8 87 T86 3
valid_sources[0x6f] 3082 1 T8 71 T203 1 T46 277
valid_sources[0x70] 2774 1 T8 68 T46 237 T17 797
valid_sources[0x71] 2367 1 T8 70 T202 2 T46 212
valid_sources[0x72] 2378 1 T8 54 T181 1 T152 1
valid_sources[0x73] 2452 1 T8 58 T204 1 T205 9
valid_sources[0x74] 2527 1 T8 73 T12 1 T46 281
valid_sources[0x75] 2862 1 T8 76 T151 7 T206 1
valid_sources[0x76] 2543 1 T8 60 T46 253 T17 911
valid_sources[0x77] 2533 1 T8 61 T174 1 T181 1
valid_sources[0x78] 2834 1 T8 73 T207 1 T173 1
valid_sources[0x79] 2819 1 T8 72 T208 2 T141 1
valid_sources[0x7a] 2884 1 T8 64 T189 2 T46 261
valid_sources[0x7b] 2608 1 T8 68 T46 255 T17 808
valid_sources[0x7c] 2399 1 T8 52 T31 1 T190 1
valid_sources[0x7d] 2370 1 T8 58 T46 253 T209 1
valid_sources[0x7e] 2397 1 T8 62 T200 1 T139 5
valid_sources[0x7f] 2159 1 T8 41 T208 1 T46 261
valid_sources[0x80] 2149 1 T8 66 T86 1 T46 259



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 159920 1 T8 4061 T46 16079 T17 50223
values[0x0] all_enables biggest_size 236558 1 T2 1 T4 1 T5 4
values[0x1] all_enables biggest_size 236697 1 T1 1 T7 1 T3 1

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