SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_mubi32_sync_late_debug_enable | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
94.16 | 100.00 | 85.71 | 97.60 | 100.00 | 87.50 | dut |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 5 | 5 | 100.00 | |
ALWAYS | 145 | 0 | 0 | |
CONT_ASSIGN | 155 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
145 | unreachable | ||
146 | unreachable | ||
148 | unreachable | ||
155 | 1 | 1 | |
168 | 4 | 4 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 243 | 243 | 0 | 0 |
OutputsKnown_A | 82852046 | 82803655 | 0 | 0 |
gen_no_flops.OutputDelay_A | 82852046 | 82803655 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 243 | 243 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T6 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
T29 | 1 | 1 | 0 | 0 |
T33 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 82852046 | 82803655 | 0 | 0 |
T1 | 2015 | 1937 | 0 | 0 |
T2 | 94221 | 94164 | 0 | 0 |
T3 | 65904 | 65538 | 0 | 0 |
T4 | 32146 | 31784 | 0 | 0 |
T5 | 46658 | 46586 | 0 | 0 |
T6 | 294599 | 294405 | 0 | 0 |
T7 | 7177 | 7127 | 0 | 0 |
T13 | 180883 | 180822 | 0 | 0 |
T29 | 4200 | 4137 | 0 | 0 |
T33 | 2965 | 2905 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 82852046 | 82803655 | 0 | 0 |
T1 | 2015 | 1937 | 0 | 0 |
T2 | 94221 | 94164 | 0 | 0 |
T3 | 65904 | 65538 | 0 | 0 |
T4 | 32146 | 31784 | 0 | 0 |
T5 | 46658 | 46586 | 0 | 0 |
T6 | 294599 | 294405 | 0 | 0 |
T7 | 7177 | 7127 | 0 | 0 |
T13 | 180883 | 180822 | 0 | 0 |
T29 | 4200 | 4137 | 0 | 0 |
T33 | 2965 | 2905 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |