Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi32_cov::mubi_cg

Group : dv_base_reg_pkg::mubi32_cov::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
9.48	9.48	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable	9.48	1	100	1	64	64

---

Group Instance : mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
9.48	1	100	1	64	64

---

Summary for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	348	315	33	9.48

Variables for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	348	315	33	9.48	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	348	315	33	9.48

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
false	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[0]	0	1	1
others[1]	0	1	1
others[0]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	6	1			T39	1		T11	1		T167	1
others[1]	716	1			T1	7		T2	1		T3	6
others[2]	4	1			T24	1		T5	1		T168	1
others[3]	8	1			T39	1		T169	1		T170	1
others[4]	4	1			T1	1		T167	1		T171	1
others[5]	3	1			T20	2		T172	1		-	-
others[6]	5	1			T48	1		T12	1		T173	1
others[7]	6	1			T21	1		T10	1		T174	2
others[8]	6	1			T6	1		T106	1		T175	1
others[9]	6	1			T24	1		T21	1		T39	1
others[10]	10	1			T2	1		T6	1		T18	1
others[11]	3	1			T4	1		T176	1		T126	1
others[12]	4	1			T24	1		T175	1		T169	1
others[13]	8	1			T25	1		T84	1		T175	1
others[14]	8	1			T1	1		T51	1		T177	1
others[15]	8	1			T24	1		T5	1		T28	2
others[16]	6	1			T4	1		T65	1		T28	1
others[17]	7	1			T1	2		T105	1		T175	1
others[18]	521	1			T3	6		T4	7		T8	1
others[19]	8	1			T1	2		T177	1		T178	1
others[20]	4	1			T110	1		T179	1		T180	1
others[21]	7	1			T181	1		T178	1		T182	1
others[22]	4	1			T183	1		T184	1		T173	1
others[23]	9	1			T185	1		T175	1		T10	1
others[24]	7	1			T4	1		T109	1		T20	1
others[25]	5	1			T20	1		T10	1		T186	1
others[26]	4	1			T184	1		T187	1		T188	1
others[27]	2	1			T184	1		T189	1		-	-
others[28]	10	1			T30	1		T177	1		T11	1
others[29]	6	1			T106	1		T14	1		T190	1
others[30]	8	1			T39	1		T179	1		T191	1
others[31]	126	1			T1	6		T30	1		T4	2
true	519	1			T3	6		T4	7		T8	1