SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_mubi8_sync_otp_dis_rv_dm_late_debug | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
96.66 | 100.00 | 85.71 | 97.60 | 100.00 | 100.00 | dut |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 6 | 6 | 100.00 | |
CONT_ASSIGN | 124 | 1 | 1 | 100.00 |
ALWAYS | 128 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
124 | 1 | 1 | |
128 | 1 | 1 | |
168 | 4 | 4 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 262 | 262 | 0 | 0 |
OutputsKnown_A | 45679662 | 45615389 | 0 | 0 |
gen_flops.gen_no_stable_chks.OutputDelay_A | 45679662 | 45612983 | 0 | 786 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 262 | 262 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T24 | 1 | 1 | 0 | 0 |
T29 | 1 | 1 | 0 | 0 |
T30 | 1 | 1 | 0 | 0 |
T31 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 45679662 | 45615389 | 0 | 0 |
T1 | 692381 | 691859 | 0 | 0 |
T2 | 113715 | 113635 | 0 | 0 |
T3 | 456823 | 456433 | 0 | 0 |
T4 | 472011 | 471740 | 0 | 0 |
T5 | 66783 | 66530 | 0 | 0 |
T8 | 10632 | 10580 | 0 | 0 |
T24 | 36737 | 36458 | 0 | 0 |
T29 | 6185 | 6128 | 0 | 0 |
T30 | 143508 | 143422 | 0 | 0 |
T31 | 1691 | 1615 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 45679662 | 45612983 | 0 | 786 |
T1 | 692381 | 691838 | 0 | 3 |
T2 | 113715 | 113632 | 0 | 3 |
T3 | 456823 | 456415 | 0 | 3 |
T4 | 472011 | 471728 | 0 | 3 |
T5 | 66783 | 66518 | 0 | 3 |
T8 | 10632 | 10577 | 0 | 3 |
T24 | 36737 | 36446 | 0 | 3 |
T29 | 6185 | 6125 | 0 | 3 |
T30 | 143508 | 143419 | 0 | 3 |
T31 | 1691 | 1612 | 0 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |