Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	265075	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

588862

1

T1

2

T4

7

T7

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	505539	1			T1	1		T4	2		T7	2
values[0x0]	149465	1			T1	1		T4	6		T7	4
values[0x1]	198933	1			T4	3		T7	1		T8	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	178234	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

675703

1

T1

2

T4

8

T7

4

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3471	1			T9	19		T23	48		T25	27
valid_sources[0x01]	3297	1			T8	1		T9	20		T23	47
valid_sources[0x02]	2740	1			T46	1		T9	32		T23	42
valid_sources[0x03]	3524	1			T9	15		T23	42		T25	27
valid_sources[0x04]	3363	1			T9	31		T23	47		T25	42
valid_sources[0x05]	3561	1			T9	89		T22	1		T23	51
valid_sources[0x06]	3076	1			T9	46		T23	45		T25	47
valid_sources[0x07]	2972	1			T9	15		T23	49		T25	39
valid_sources[0x08]	3916	1			T9	41		T23	46		T25	33
valid_sources[0x09]	3019	1			T9	22		T23	40		T25	31
valid_sources[0x0a]	2880	1			T32	1		T9	92		T48	1
valid_sources[0x0b]	3632	1			T9	6		T23	39		T25	42
valid_sources[0x0c]	3202	1			T46	1		T9	42		T23	44
valid_sources[0x0d]	2979	1			T9	16		T23	41		T25	34
valid_sources[0x0e]	3521	1			T9	6		T23	25		T25	42
valid_sources[0x0f]	4574	1			T8	1		T9	5		T23	37
valid_sources[0x10]	3494	1			T59	1		T9	86		T23	34
valid_sources[0x11]	3490	1			T9	39		T23	45		T25	30
valid_sources[0x12]	3154	1			T9	94		T23	38		T25	37
valid_sources[0x13]	3032	1			T42	1		T9	29		T23	42
valid_sources[0x14]	4024	1			T9	13		T23	52		T25	37
valid_sources[0x15]	2949	1			T9	16		T23	42		T25	44
valid_sources[0x16]	3978	1			T9	36		T48	1		T23	47
valid_sources[0x17]	2858	1			T9	78		T23	33		T25	32
valid_sources[0x18]	2849	1			T9	7		T23	65		T25	42
valid_sources[0x19]	2949	1			T9	52		T48	1		T23	42
valid_sources[0x1a]	4146	1			T9	34		T22	1		T23	45
valid_sources[0x1b]	3389	1			T9	23		T23	38		T25	40
valid_sources[0x1c]	3154	1			T9	36		T23	52		T25	37
valid_sources[0x1d]	3502	1			T9	32		T23	39		T25	35
valid_sources[0x1e]	4196	1			T9	65		T23	40		T25	49
valid_sources[0x1f]	3264	1			T9	71		T23	44		T25	38
valid_sources[0x20]	3170	1			T9	16		T23	31		T25	42
valid_sources[0x21]	2857	1			T9	68		T23	41		T25	29
valid_sources[0x22]	3521	1			T9	40		T23	31		T25	47
valid_sources[0x23]	3254	1			T9	3		T23	45		T25	38
valid_sources[0x24]	2946	1			T9	44		T23	44		T25	28
valid_sources[0x25]	2798	1			T9	32		T23	41		T25	34
valid_sources[0x26]	3042	1			T9	32		T12	1		T23	41
valid_sources[0x27]	3310	1			T4	11		T9	233		T51	1
valid_sources[0x28]	3299	1			T9	16		T23	38		T25	29
valid_sources[0x29]	3541	1			T9	28		T23	38		T25	32
valid_sources[0x2a]	4182	1			T9	51		T26	5		T23	40
valid_sources[0x2b]	4454	1			T9	24		T23	38		T25	62
valid_sources[0x2c]	3019	1			T7	7		T9	6		T51	1
valid_sources[0x2d]	3460	1			T9	3		T23	41		T25	35
valid_sources[0x2e]	2379	1			T9	57		T48	2		T23	38
valid_sources[0x2f]	3348	1			T9	21		T23	54		T25	56
valid_sources[0x30]	3386	1			T9	39		T23	38		T25	29
valid_sources[0x31]	3288	1			T9	26		T22	1		T23	40
valid_sources[0x32]	3370	1			T9	27		T13	16		T23	37
valid_sources[0x33]	3287	1			T9	20		T23	36		T25	34
valid_sources[0x34]	2934	1			T9	17		T23	55		T25	26
valid_sources[0x35]	3017	1			T9	35		T23	56		T25	24
valid_sources[0x36]	3861	1			T8	1		T9	27		T22	1
valid_sources[0x37]	3317	1			T9	12		T23	54		T25	41
valid_sources[0x38]	3010	1			T42	2		T9	57		T23	36
valid_sources[0x39]	2680	1			T9	12		T12	2		T23	41
valid_sources[0x3a]	3303	1			T9	39		T23	50		T25	46
valid_sources[0x3b]	2930	1			T8	2		T9	29		T23	42
valid_sources[0x3c]	2867	1			T9	12		T23	41		T25	33
valid_sources[0x3d]	3216	1			T9	35		T23	43		T25	41
valid_sources[0x3e]	3096	1			T9	28		T23	41		T25	47
valid_sources[0x3f]	3030	1			T9	58		T23	51		T25	47
valid_sources[0x40]	3487	1			T9	45		T23	45		T25	34
valid_sources[0x41]	3801	1			T9	174		T23	51		T25	23
valid_sources[0x42]	3295	1			T59	3		T9	98		T23	45
valid_sources[0x43]	2757	1			T9	32		T22	1		T23	41
valid_sources[0x44]	3594	1			T9	48		T23	35		T25	32
valid_sources[0x45]	2777	1			T9	30		T23	33		T25	32
valid_sources[0x46]	3550	1			T9	52		T23	44		T25	67
valid_sources[0x47]	3012	1			T9	9		T23	37		T25	36
valid_sources[0x48]	3084	1			T9	11		T22	1		T23	38
valid_sources[0x49]	3409	1			T6	1		T9	45		T23	55
valid_sources[0x4a]	3300	1			T9	9		T23	39		T25	25
valid_sources[0x4b]	2990	1			T9	13		T23	31		T25	34
valid_sources[0x4c]	3114	1			T9	15		T23	39		T25	50
valid_sources[0x4d]	2975	1			T46	2		T9	38		T23	36
valid_sources[0x4e]	3752	1			T21	4		T9	25		T23	37
valid_sources[0x4f]	3172	1			T9	45		T23	37		T25	35
valid_sources[0x50]	2976	1			T9	25		T23	41		T25	35
valid_sources[0x51]	3201	1			T9	15		T23	40		T25	32
valid_sources[0x52]	3709	1			T61	2		T9	17		T23	33
valid_sources[0x53]	3219	1			T9	29		T23	37		T25	47
valid_sources[0x54]	3673	1			T9	63		T23	43		T25	27
valid_sources[0x55]	3076	1			T9	12		T23	42		T25	45
valid_sources[0x56]	3632	1			T9	57		T23	38		T25	25
valid_sources[0x57]	3394	1			T9	5		T23	35		T25	38
valid_sources[0x58]	2833	1			T9	44		T23	55		T25	36
valid_sources[0x59]	3319	1			T9	59		T51	1		T23	42
valid_sources[0x5a]	3241	1			T9	44		T23	53		T25	31
valid_sources[0x5b]	2878	1			T9	21		T23	31		T25	30
valid_sources[0x5c]	3265	1			T6	3		T9	74		T23	45
valid_sources[0x5d]	3500	1			T9	17		T23	45		T25	37
valid_sources[0x5e]	3482	1			T8	1		T9	70		T23	47
valid_sources[0x5f]	2979	1			T30	7		T9	9		T23	46
valid_sources[0x60]	3126	1			T9	19		T23	37		T25	46
valid_sources[0x61]	3212	1			T9	15		T23	48		T25	43
valid_sources[0x62]	3136	1			T46	1		T9	17		T23	51
valid_sources[0x63]	2808	1			T9	15		T23	46		T25	44
valid_sources[0x64]	2921	1			T46	1		T9	26		T22	1
valid_sources[0x65]	3594	1			T9	41		T23	40		T25	36
valid_sources[0x66]	3325	1			T9	54		T51	1		T23	56
valid_sources[0x67]	3698	1			T9	15		T23	46		T25	21
valid_sources[0x68]	3074	1			T9	20		T23	40		T25	41
valid_sources[0x69]	2827	1			T9	16		T23	29		T25	44
valid_sources[0x6a]	3655	1			T9	29		T23	42		T25	38
valid_sources[0x6b]	3336	1			T9	28		T22	1		T23	52
valid_sources[0x6c]	2758	1			T9	29		T23	52		T25	51
valid_sources[0x6d]	3733	1			T9	13		T23	39		T25	26
valid_sources[0x6e]	3001	1			T9	75		T23	42		T25	37
valid_sources[0x6f]	2623	1			T1	1		T9	10		T22	1
valid_sources[0x70]	2954	1			T9	53		T23	39		T25	35
valid_sources[0x71]	3757	1			T42	1		T9	8		T23	41
valid_sources[0x72]	3273	1			T9	19		T23	40		T25	35
valid_sources[0x73]	3941	1			T9	24		T23	38		T25	46
valid_sources[0x74]	3526	1			T9	16		T23	52		T25	46
valid_sources[0x75]	3613	1			T8	4		T9	21		T23	30
valid_sources[0x76]	3943	1			T9	53		T23	51		T25	42
valid_sources[0x77]	2792	1			T9	41		T22	1		T23	23
valid_sources[0x78]	2842	1			T9	22		T12	4		T23	37
valid_sources[0x79]	3219	1			T9	17		T22	1		T23	44
valid_sources[0x7a]	4215	1			T9	35		T51	1		T22	1
valid_sources[0x7b]	3189	1			T9	36		T23	44		T25	46
valid_sources[0x7c]	3226	1			T9	13		T23	38		T25	36
valid_sources[0x7d]	3570	1			T9	64		T23	32		T25	38
valid_sources[0x7e]	3640	1			T9	15		T23	35		T25	39
valid_sources[0x7f]	2777	1			T9	11		T23	47		T25	38
valid_sources[0x80]	3270	1			T9	20		T22	1		T23	43

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

303229

1

T1

1

T4

2

T8

2

values[0x0]

all_enables

biggest_size

143094

1

T1

1

T4

5

T7

3

values[0x1]

all_enables

biggest_size

142539

1

T7

1

T8

2

T6

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7348	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

97419

1

T1

1

T2

1

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	29011	1			T9	1396		T23	1395		T25	1625
values[0x0]	36837	1			T2	1		T33	6		T4	3
values[0x1]	38919	1			T1	1		T3	1		T33	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4725	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

100042

1

T1

1

T2

1

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	442	1			T9	26		T113	1		T23	12
valid_sources[0x01]	386	1			T156	1		T9	8		T23	18
valid_sources[0x02]	360	1			T9	6		T22	1		T23	23
valid_sources[0x03]	381	1			T9	4		T23	13		T25	26
valid_sources[0x04]	346	1			T9	20		T23	23		T25	29
valid_sources[0x05]	353	1			T9	29		T23	20		T203	1
valid_sources[0x06]	720	1			T9	35		T23	32		T25	25
valid_sources[0x07]	316	1			T9	14		T114	1		T23	12
valid_sources[0x08]	406	1			T9	25		T13	1		T23	26
valid_sources[0x09]	385	1			T9	40		T13	1		T23	25
valid_sources[0x0a]	402	1			T9	30		T23	21		T25	14
valid_sources[0x0b]	335	1			T9	14		T55	1		T23	11
valid_sources[0x0c]	562	1			T9	1		T23	25		T25	20
valid_sources[0x0d]	412	1			T9	24		T23	23		T204	1
valid_sources[0x0e]	422	1			T9	44		T23	22		T31	7
valid_sources[0x0f]	452	1			T9	34		T23	20		T10	1
valid_sources[0x10]	668	1			T34	1		T9	41		T113	1
valid_sources[0x11]	523	1			T59	8		T9	28		T23	18
valid_sources[0x12]	353	1			T9	2		T23	28		T25	30
valid_sources[0x13]	327	1			T9	4		T12	1		T23	14
valid_sources[0x14]	342	1			T9	14		T113	1		T23	22
valid_sources[0x15]	316	1			T35	1		T9	48		T13	1
valid_sources[0x16]	358	1			T9	26		T23	19		T25	21
valid_sources[0x17]	441	1			T3	1		T9	32		T23	25
valid_sources[0x18]	396	1			T69	1		T61	1		T9	8
valid_sources[0x19]	518	1			T9	9		T23	19		T25	29
valid_sources[0x1a]	327	1			T9	37		T23	24		T25	20
valid_sources[0x1b]	415	1			T9	42		T113	1		T23	18
valid_sources[0x1c]	408	1			T9	15		T23	17		T25	31
valid_sources[0x1d]	483	1			T29	2		T9	30		T23	25
valid_sources[0x1e]	311	1			T9	7		T26	3		T23	18
valid_sources[0x1f]	383	1			T9	16		T23	16		T205	1
valid_sources[0x20]	366	1			T9	4		T23	18		T25	20
valid_sources[0x21]	364	1			T88	1		T9	37		T23	17
valid_sources[0x22]	350	1			T9	28		T23	33		T206	1
valid_sources[0x23]	354	1			T9	9		T23	19		T25	17
valid_sources[0x24]	357	1			T9	3		T23	19		T25	29
valid_sources[0x25]	359	1			T9	4		T23	25		T25	26
valid_sources[0x26]	407	1			T9	34		T23	23		T25	26
valid_sources[0x27]	384	1			T156	1		T9	30		T23	28
valid_sources[0x28]	299	1			T9	13		T23	9		T25	23
valid_sources[0x29]	434	1			T9	17		T23	30		T25	24
valid_sources[0x2a]	469	1			T33	1		T9	35		T23	23
valid_sources[0x2b]	325	1			T9	28		T23	19		T25	25
valid_sources[0x2c]	329	1			T111	1		T9	18		T23	22
valid_sources[0x2d]	519	1			T8	1		T9	30		T23	24
valid_sources[0x2e]	439	1			T9	21		T23	27		T25	20
valid_sources[0x2f]	377	1			T9	31		T23	20		T25	23
valid_sources[0x30]	344	1			T9	15		T23	26		T25	33
valid_sources[0x31]	348	1			T9	21		T23	23		T25	13
valid_sources[0x32]	311	1			T9	4		T23	21		T25	20
valid_sources[0x33]	488	1			T9	9		T23	29		T25	19
valid_sources[0x34]	329	1			T9	6		T23	26		T25	21
valid_sources[0x35]	463	1			T9	22		T23	39		T203	2
valid_sources[0x36]	364	1			T29	1		T9	19		T113	1
valid_sources[0x37]	535	1			T9	31		T23	20		T25	25
valid_sources[0x38]	425	1			T35	2		T155	1		T9	3
valid_sources[0x39]	443	1			T155	1		T9	6		T23	6
valid_sources[0x3a]	378	1			T1	1		T34	1		T9	17
valid_sources[0x3b]	370	1			T9	23		T23	15		T203	2
valid_sources[0x3c]	499	1			T69	1		T42	1		T9	15
valid_sources[0x3d]	465	1			T9	31		T23	22		T25	21
valid_sources[0x3e]	396	1			T9	5		T23	30		T90	1
valid_sources[0x3f]	363	1			T9	31		T23	24		T25	28
valid_sources[0x40]	423	1			T23	24		T25	23		T14	6
valid_sources[0x41]	390	1			T4	1		T9	12		T23	21
valid_sources[0x42]	578	1			T155	1		T9	9		T23	18
valid_sources[0x43]	610	1			T9	46		T113	1		T23	26
valid_sources[0x44]	359	1			T9	14		T23	29		T25	24
valid_sources[0x45]	346	1			T9	25		T23	25		T25	16
valid_sources[0x46]	477	1			T9	37		T23	16		T25	26
valid_sources[0x47]	470	1			T101	1		T9	28		T23	28
valid_sources[0x48]	423	1			T9	31		T23	15		T45	8
valid_sources[0x49]	377	1			T9	11		T23	23		T25	26
valid_sources[0x4a]	537	1			T36	1		T28	1		T9	69
valid_sources[0x4b]	328	1			T9	15		T23	21		T25	20
valid_sources[0x4c]	346	1			T9	13		T23	21		T203	1
valid_sources[0x4d]	376	1			T7	2		T69	1		T9	26
valid_sources[0x4e]	404	1			T9	66		T23	23		T25	25
valid_sources[0x4f]	380	1			T9	3		T23	22		T203	2
valid_sources[0x50]	409	1			T9	29		T23	16		T25	26
valid_sources[0x51]	542	1			T9	6		T23	11		T25	25
valid_sources[0x52]	364	1			T9	22		T23	18		T25	28
valid_sources[0x53]	346	1			T9	23		T23	14		T25	13
valid_sources[0x54]	415	1			T9	44		T23	7		T25	16
valid_sources[0x55]	381	1			T35	1		T6	1		T29	2
valid_sources[0x56]	629	1			T9	20		T23	17		T25	18
valid_sources[0x57]	421	1			T9	17		T23	22		T25	26
valid_sources[0x58]	439	1			T33	1		T69	1		T9	24
valid_sources[0x59]	535	1			T33	1		T9	32		T23	21
valid_sources[0x5a]	362	1			T69	1		T9	15		T23	19
valid_sources[0x5b]	405	1			T4	1		T9	21		T13	1
valid_sources[0x5c]	354	1			T33	1		T9	11		T23	30
valid_sources[0x5d]	582	1			T155	1		T9	29		T23	18
valid_sources[0x5e]	426	1			T8	1		T9	35		T23	24
valid_sources[0x5f]	340	1			T9	3		T23	23		T25	30
valid_sources[0x60]	356	1			T9	28		T23	21		T25	34
valid_sources[0x61]	488	1			T9	7		T113	2		T23	22
valid_sources[0x62]	351	1			T33	1		T9	54		T48	1
valid_sources[0x63]	520	1			T9	42		T23	20		T203	1
valid_sources[0x64]	368	1			T9	36		T23	20		T25	27
valid_sources[0x65]	360	1			T9	14		T23	31		T25	38
valid_sources[0x66]	452	1			T9	10		T23	22		T25	30
valid_sources[0x67]	365	1			T9	8		T23	20		T25	27
valid_sources[0x68]	491	1			T9	31		T23	19		T25	29
valid_sources[0x69]	380	1			T9	31		T23	18		T25	15
valid_sources[0x6a]	399	1			T9	23		T23	19		T25	21
valid_sources[0x6b]	328	1			T33	1		T9	3		T23	16
valid_sources[0x6c]	382	1			T8	1		T71	1		T156	1
valid_sources[0x6d]	412	1			T9	20		T23	28		T25	26
valid_sources[0x6e]	359	1			T9	14		T23	23		T25	17
valid_sources[0x6f]	329	1			T34	1		T9	28		T26	1
valid_sources[0x70]	342	1			T29	1		T9	2		T23	23
valid_sources[0x71]	371	1			T9	4		T23	35		T25	24
valid_sources[0x72]	338	1			T35	1		T9	2		T23	34
valid_sources[0x73]	432	1			T9	12		T23	30		T25	28
valid_sources[0x74]	374	1			T4	1		T34	1		T156	1
valid_sources[0x75]	316	1			T9	7		T23	20		T25	23
valid_sources[0x76]	311	1			T9	15		T23	18		T25	21
valid_sources[0x77]	331	1			T34	1		T9	19		T23	18
valid_sources[0x78]	356	1			T9	6		T23	14		T203	1
valid_sources[0x79]	346	1			T9	29		T23	25		T25	16
valid_sources[0x7a]	379	1			T33	2		T9	29		T12	2
valid_sources[0x7b]	621	1			T9	2		T23	15		T25	26
valid_sources[0x7c]	379	1			T29	1		T9	16		T23	21
valid_sources[0x7d]	330	1			T89	1		T9	43		T23	27
valid_sources[0x7e]	508	1			T69	1		T9	32		T23	21
valid_sources[0x7f]	391	1			T9	50		T23	24		T10	1
valid_sources[0x80]	393	1			T46	5		T9	17		T23	17

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

25572

1

T9

1277

T23

1302

T25

1546

values[0x0]

all_enables

biggest_size

35948

1

T2

1

T33

4

T4

3

values[0x1]

all_enables

biggest_size

35899

1

T1

1

T3

1

T33

1