Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61525589	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	69039930	1		T1	84396		T2	48042		T3	213563

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	124145006	1		T1	169038		T2	23997		T3	427858
values[0x0]	3047056	1		T1	38		T2	15843		T3	16
values[0x1]	3373457	1		T1	25		T2	17282		T3	23

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48985584	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	81579935	1		T1	101318		T2	50750		T3	256477

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	415912	1		T2	223		T3	1664		T4	4114
valid_sources[0x01]	575069	1		T2	210		T3	1667		T4	4093
valid_sources[0x02]	421218	1		T2	172		T3	1642		T4	4319
valid_sources[0x03]	885789	1		T2	199		T3	1704		T4	4173
valid_sources[0x04]	414661	1		T2	204		T3	1719		T4	4062
valid_sources[0x05]	453379	1		T2	234		T3	1648		T4	4130
valid_sources[0x06]	482582	1		T2	218		T3	1683		T4	4398
valid_sources[0x07]	422535	1		T2	265		T3	1700		T4	4037
valid_sources[0x08]	418736	1		T2	189		T3	1678		T4	4284
valid_sources[0x09]	1145149	1		T2	280		T3	1691		T4	4085
valid_sources[0x0a]	424061	1		T2	203		T3	1692		T4	4258
valid_sources[0x0b]	424012	1		T2	326		T3	1732		T4	4203
valid_sources[0x0c]	419306	1		T2	206		T3	1744		T4	4005
valid_sources[0x0d]	417034	1		T2	183		T3	1715		T4	4051
valid_sources[0x0e]	423619	1		T2	287		T3	1604		T4	3986
valid_sources[0x0f]	420229	1		T2	319		T3	1621		T4	4017
valid_sources[0x10]	422532	1		T2	274		T3	1681		T4	4124
valid_sources[0x11]	418327	1		T2	270		T3	1737		T4	4376
valid_sources[0x12]	1011873	1		T2	187		T3	1634		T4	3957
valid_sources[0x13]	414971	1		T2	235		T3	1780		T4	4024
valid_sources[0x14]	421243	1		T2	193		T3	1708		T4	4145
valid_sources[0x15]	418041	1		T2	175		T3	1588		T4	4271
valid_sources[0x16]	417336	1		T2	252		T3	1720		T4	4108
valid_sources[0x17]	428727	1		T2	191		T3	1608		T4	4261
valid_sources[0x18]	738954	1		T2	158		T3	1675		T4	4077
valid_sources[0x19]	1074512	1		T2	117		T3	1696		T4	3988
valid_sources[0x1a]	421728	1		T2	141		T3	1682		T4	4124
valid_sources[0x1b]	419785	1		T2	206		T3	1664		T4	4321
valid_sources[0x1c]	416505	1		T2	177		T3	1662		T4	4164
valid_sources[0x1d]	423469	1		T2	191		T3	1768		T4	4175
valid_sources[0x1e]	416676	1		T2	182		T3	1622		T4	4190
valid_sources[0x1f]	420350	1		T2	142		T3	1666		T4	4006
valid_sources[0x20]	414403	1		T2	197		T3	1542		T4	4025
valid_sources[0x21]	625968	1		T2	221		T3	1679		T4	4403
valid_sources[0x22]	444406	1		T2	226		T3	1675		T4	3994
valid_sources[0x23]	418103	1		T2	192		T3	1669		T4	4152
valid_sources[0x24]	2430039	1		T2	167		T3	1679		T4	4199
valid_sources[0x25]	418091	1		T2	282		T3	1619		T4	4024
valid_sources[0x26]	422304	1		T2	220		T3	1684		T4	4087
valid_sources[0x27]	537212	1		T2	224		T3	1647		T4	4262
valid_sources[0x28]	446213	1		T2	210		T3	1693		T4	3974
valid_sources[0x29]	418611	1		T2	188		T3	1642		T4	3957
valid_sources[0x2a]	415174	1		T2	183		T3	1768		T4	4291
valid_sources[0x2b]	418583	1		T2	147		T3	1645		T4	4139
valid_sources[0x2c]	419049	1		T2	193		T3	1616		T4	4150
valid_sources[0x2d]	561398	1		T2	200		T3	1556		T4	3995
valid_sources[0x2e]	417836	1		T2	189		T3	1684		T4	4055
valid_sources[0x2f]	413924	1		T2	180		T3	1670		T4	4134
valid_sources[0x30]	469043	1		T2	193		T3	1744		T4	4112
valid_sources[0x31]	813349	1		T2	242		T3	1645		T4	4174
valid_sources[0x32]	420574	1		T2	291		T3	1618		T4	4215
valid_sources[0x33]	415278	1		T2	191		T3	1653		T4	4080
valid_sources[0x34]	415508	1		T2	274		T3	1652		T4	4236
valid_sources[0x35]	420417	1		T2	263		T3	1628		T4	4120
valid_sources[0x36]	422333	1		T2	167		T3	1608		T4	3979
valid_sources[0x37]	420626	1		T2	205		T3	1719		T4	4213
valid_sources[0x38]	426066	1		T2	235		T3	1693		T4	3834
valid_sources[0x39]	415651	1		T2	209		T3	1694		T4	4005
valid_sources[0x3a]	417681	1		T2	264		T3	1660		T4	4217
valid_sources[0x3b]	1019483	1		T2	277		T3	1518		T4	4250
valid_sources[0x3c]	421046	1		T2	156		T3	1725		T4	3955
valid_sources[0x3d]	416591	1		T2	181		T3	1728		T4	4086
valid_sources[0x3e]	419168	1		T2	273		T3	1719		T4	4053
valid_sources[0x3f]	417143	1		T2	247		T3	1665		T4	4307
valid_sources[0x40]	580398	1		T2	152		T3	1679		T4	4269
valid_sources[0x41]	417372	1		T2	213		T3	1559		T4	4002
valid_sources[0x42]	618404	1		T2	197		T3	1691		T4	3878
valid_sources[0x43]	413718	1		T2	241		T3	1669		T4	4169
valid_sources[0x44]	414625	1		T2	205		T3	1824		T4	4068
valid_sources[0x45]	425415	1		T2	246		T3	1630		T4	4075
valid_sources[0x46]	421549	1		T2	306		T3	1679		T4	4226
valid_sources[0x47]	411706	1		T2	185		T3	1746		T4	4048
valid_sources[0x48]	420090	1		T2	180		T3	1669		T4	4049
valid_sources[0x49]	418747	1		T2	346		T3	1754		T4	4061
valid_sources[0x4a]	416798	1		T2	189		T3	1610		T4	4202
valid_sources[0x4b]	416448	1		T2	260		T3	1686		T4	4004
valid_sources[0x4c]	418797	1		T2	310		T3	1724		T4	4189
valid_sources[0x4d]	415171	1		T2	230		T3	1640		T4	4175
valid_sources[0x4e]	422737	1		T2	159		T3	1660		T4	4424
valid_sources[0x4f]	450766	1		T2	364		T3	1730		T4	4211
valid_sources[0x50]	418105	1		T2	374		T3	1720		T4	4137
valid_sources[0x51]	417427	1		T2	189		T3	1771		T4	4277
valid_sources[0x52]	416926	1		T2	205		T3	1671		T4	4081
valid_sources[0x53]	421118	1		T2	212		T3	1698		T4	4009
valid_sources[0x54]	424086	1		T2	236		T3	1646		T4	4109
valid_sources[0x55]	416309	1		T2	182		T3	1735		T4	3974
valid_sources[0x56]	421361	1		T2	226		T3	1614		T4	4045
valid_sources[0x57]	448168	1		T2	179		T3	1718		T4	4201
valid_sources[0x58]	442319	1		T2	177		T3	1667		T4	4127
valid_sources[0x59]	1464165	1		T2	274		T3	1569		T4	4149
valid_sources[0x5a]	421534	1		T2	212		T3	1657		T4	4139
valid_sources[0x5b]	1188520	1		T2	179		T3	1631		T4	4059
valid_sources[0x5c]	419538	1		T2	200		T3	1709		T4	4060
valid_sources[0x5d]	420364	1		T2	230		T3	1714		T4	4104
valid_sources[0x5e]	415829	1		T2	215		T3	1660		T4	4292
valid_sources[0x5f]	516038	1		T2	206		T3	1732		T4	4019
valid_sources[0x60]	416436	1		T2	283		T3	1670		T4	4076
valid_sources[0x61]	424097	1		T2	205		T3	1563		T4	4198
valid_sources[0x62]	3329004	1		T2	186		T3	1630		T4	4162
valid_sources[0x63]	504846	1		T2	221		T3	1726		T4	4198
valid_sources[0x64]	415183	1		T2	333		T3	1738		T4	4101
valid_sources[0x65]	417569	1		T2	189		T3	1710		T4	4011
valid_sources[0x66]	442124	1		T2	236		T3	1607		T4	4319
valid_sources[0x67]	422798	1		T2	186		T3	1499		T4	4112
valid_sources[0x68]	478574	1		T2	307		T3	1650		T4	4105
valid_sources[0x69]	417595	1		T2	190		T3	1697		T4	3970
valid_sources[0x6a]	423330	1		T2	205		T3	1699		T4	4255
valid_sources[0x6b]	423164	1		T2	207		T3	1693		T4	4170
valid_sources[0x6c]	416846	1		T2	199		T3	1693		T4	4138
valid_sources[0x6d]	415092	1		T2	195		T3	1641		T4	4171
valid_sources[0x6e]	422607	1		T2	291		T3	1659		T4	4083
valid_sources[0x6f]	422086	1		T2	262		T3	1642		T4	4185
valid_sources[0x70]	415487	1		T2	216		T3	1734		T4	4128
valid_sources[0x71]	413984	1		T2	179		T3	1662		T4	4126
valid_sources[0x72]	421386	1		T2	308		T3	1679		T4	4157
valid_sources[0x73]	443122	1		T2	230		T3	1693		T4	4046
valid_sources[0x74]	422097	1		T2	252		T3	1669		T4	3976
valid_sources[0x75]	418733	1		T2	239		T3	1697		T4	4063
valid_sources[0x76]	419202	1		T2	182		T3	1635		T4	4120
valid_sources[0x77]	430781	1		T2	185		T3	1666		T4	4056
valid_sources[0x78]	419635	1		T2	217		T3	1634		T4	4179
valid_sources[0x79]	414312	1		T2	228		T3	1637		T4	3975
valid_sources[0x7a]	421607	1		T2	217		T3	1658		T4	4089
valid_sources[0x7b]	434783	1		T2	237		T3	1728		T4	3836
valid_sources[0x7c]	417171	1		T2	214		T3	1733		T4	4082
valid_sources[0x7d]	572110	1		T2	226		T3	1635		T4	4076
valid_sources[0x7e]	416892	1		T2	206		T3	1698		T4	4096
valid_sources[0x7f]	412235	1		T2	235		T3	1678		T4	4114
valid_sources[0x80]	682556	1		T2	198		T3	1653		T4	4395

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

63026768

1

T1

84350

T2

16886

T3

213537

values[0x0]

all_enables

biggest_size

3006560

1

T1

28

T2

15656

T3

10

values[0x1]

all_enables

biggest_size

3006602

1

T1

18

T2

15500

T3

16