Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 66197889 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 71862270 1 T1 22161 T2 8582 T3 16353



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 133218851 1 T1 44183 T2 17194 T3 32424
values[0x0] 2301482 1 T1 26 T2 11 T3 5
values[0x1] 2539826 1 T1 25 T2 9 T3 5



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 52762986 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 85297173 1 T1 26659 T2 10263 T3 19554



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 450064 1 T1 183 T3 120 T4 168
valid_sources[0x01] 459014 1 T1 188 T3 121 T4 187
valid_sources[0x02] 444800 1 T1 170 T3 147 T4 176
valid_sources[0x03] 452410 1 T1 155 T3 122 T4 210
valid_sources[0x04] 450891 1 T1 149 T3 118 T4 174
valid_sources[0x05] 458859 1 T1 180 T3 128 T4 209
valid_sources[0x06] 445465 1 T1 182 T3 143 T4 155
valid_sources[0x07] 451552 1 T1 161 T3 127 T4 195
valid_sources[0x08] 448132 1 T1 146 T3 118 T4 187
valid_sources[0x09] 453308 1 T1 152 T3 116 T4 218
valid_sources[0x0a] 449722 1 T1 176 T3 117 T4 185
valid_sources[0x0b] 461849 1 T1 191 T3 125 T4 166
valid_sources[0x0c] 1097885 1 T1 179 T3 137 T4 204
valid_sources[0x0d] 487283 1 T1 177 T3 111 T4 174
valid_sources[0x0e] 448983 1 T1 178 T3 122 T4 165
valid_sources[0x0f] 457822 1 T1 166 T3 107 T4 173
valid_sources[0x10] 461658 1 T1 164 T3 128 T4 181
valid_sources[0x11] 483310 1 T1 164 T3 141 T4 227
valid_sources[0x12] 456903 1 T1 179 T3 128 T4 164
valid_sources[0x13] 447620 1 T1 188 T3 107 T4 193
valid_sources[0x14] 451736 1 T1 180 T3 132 T4 159
valid_sources[0x15] 588658 1 T1 179 T3 122 T4 156
valid_sources[0x16] 445468 1 T1 193 T3 112 T4 159
valid_sources[0x17] 451034 1 T1 173 T3 128 T4 196
valid_sources[0x18] 455644 1 T1 160 T3 109 T4 173
valid_sources[0x19] 999561 1 T1 179 T3 119 T4 204
valid_sources[0x1a] 654965 1 T1 152 T3 134 T4 221
valid_sources[0x1b] 445067 1 T1 167 T3 122 T4 180
valid_sources[0x1c] 450305 1 T1 188 T3 118 T4 162
valid_sources[0x1d] 568472 1 T1 158 T3 109 T4 169
valid_sources[0x1e] 454317 1 T1 179 T3 149 T4 155
valid_sources[0x1f] 456202 1 T1 176 T3 118 T4 195
valid_sources[0x20] 447123 1 T1 185 T3 143 T4 187
valid_sources[0x21] 448707 1 T1 187 T3 128 T4 217
valid_sources[0x22] 471140 1 T1 183 T3 116 T4 174
valid_sources[0x23] 461566 1 T1 188 T3 130 T4 170
valid_sources[0x24] 440294 1 T1 161 T3 115 T4 151
valid_sources[0x25] 445428 1 T1 175 T3 126 T4 190
valid_sources[0x26] 453981 1 T1 174 T3 136 T4 199
valid_sources[0x27] 487259 1 T1 161 T3 134 T4 151
valid_sources[0x28] 450201 1 T1 201 T3 118 T4 216
valid_sources[0x29] 544348 1 T1 167 T3 89 T4 178
valid_sources[0x2a] 458603 1 T1 187 T3 112 T4 120
valid_sources[0x2b] 455892 1 T1 150 T3 126 T4 210
valid_sources[0x2c] 451630 1 T1 170 T3 118 T4 230
valid_sources[0x2d] 449462 1 T1 171 T3 136 T4 170
valid_sources[0x2e] 445755 1 T1 195 T3 120 T4 191
valid_sources[0x2f] 448019 1 T1 175 T3 127 T4 190
valid_sources[0x30] 450402 1 T1 186 T3 118 T4 180
valid_sources[0x31] 452143 1 T1 166 T3 127 T4 160
valid_sources[0x32] 616297 1 T1 180 T3 122 T4 153
valid_sources[0x33] 457825 1 T1 190 T3 153 T4 134
valid_sources[0x34] 450910 1 T1 167 T3 113 T4 195
valid_sources[0x35] 445925 1 T1 169 T3 135 T4 153
valid_sources[0x36] 447027 1 T1 167 T3 95 T4 160
valid_sources[0x37] 457091 1 T1 158 T3 142 T4 173
valid_sources[0x38] 443389 1 T1 170 T3 127 T4 202
valid_sources[0x39] 450702 1 T1 197 T3 119 T4 225
valid_sources[0x3a] 456378 1 T1 190 T3 129 T4 164
valid_sources[0x3b] 452565 1 T1 153 T3 152 T4 187
valid_sources[0x3c] 833084 1 T1 178 T3 140 T4 175
valid_sources[0x3d] 455146 1 T1 186 T3 123 T4 159
valid_sources[0x3e] 451977 1 T1 163 T3 152 T4 194
valid_sources[0x3f] 453118 1 T1 177 T3 131 T4 168
valid_sources[0x40] 456766 1 T1 168 T3 129 T4 168
valid_sources[0x41] 520011 1 T1 157 T3 112 T4 179
valid_sources[0x42] 446480 1 T1 154 T3 140 T4 188
valid_sources[0x43] 457827 1 T1 168 T3 143 T4 164
valid_sources[0x44] 451369 1 T1 189 T3 120 T4 212
valid_sources[0x45] 487218 1 T1 140 T3 115 T4 157
valid_sources[0x46] 454031 1 T1 160 T3 127 T4 178
valid_sources[0x47] 450073 1 T1 146 T3 120 T4 230
valid_sources[0x48] 2526152 1 T1 162 T3 140 T4 197
valid_sources[0x49] 452842 1 T1 176 T3 137 T4 151
valid_sources[0x4a] 450706 1 T1 173 T3 108 T4 168
valid_sources[0x4b] 448632 1 T1 152 T3 133 T4 187
valid_sources[0x4c] 452112 1 T1 212 T3 119 T4 194
valid_sources[0x4d] 451123 1 T1 174 T3 133 T4 171
valid_sources[0x4e] 461644 1 T1 166 T2 17214 T3 149
valid_sources[0x4f] 487421 1 T1 164 T3 126 T4 150
valid_sources[0x50] 495543 1 T1 189 T3 129 T4 154
valid_sources[0x51] 446664 1 T1 154 T3 111 T4 174
valid_sources[0x52] 444530 1 T1 170 T3 155 T4 155
valid_sources[0x53] 454675 1 T1 173 T3 120 T4 158
valid_sources[0x54] 449208 1 T1 173 T3 142 T4 146
valid_sources[0x55] 508355 1 T1 157 T3 122 T4 187
valid_sources[0x56] 459567 1 T1 181 T3 135 T4 162
valid_sources[0x57] 465028 1 T1 179 T3 132 T4 179
valid_sources[0x58] 546086 1 T1 162 T3 155 T4 183
valid_sources[0x59] 450120 1 T1 190 T3 122 T4 216
valid_sources[0x5a] 456133 1 T1 157 T3 119 T4 204
valid_sources[0x5b] 459774 1 T1 173 T3 133 T4 172
valid_sources[0x5c] 485622 1 T1 162 T3 111 T4 188
valid_sources[0x5d] 452913 1 T1 169 T3 109 T4 179
valid_sources[0x5e] 448812 1 T1 200 T3 123 T4 172
valid_sources[0x5f] 456080 1 T1 162 T3 146 T4 203
valid_sources[0x60] 459871 1 T1 161 T3 105 T4 170
valid_sources[0x61] 758713 1 T1 182 T3 150 T4 177
valid_sources[0x62] 498432 1 T1 162 T3 128 T4 190
valid_sources[0x63] 557405 1 T1 182 T3 135 T4 165
valid_sources[0x64] 454898 1 T1 183 T3 145 T4 173
valid_sources[0x65] 455851 1 T1 181 T3 121 T4 158
valid_sources[0x66] 451428 1 T1 152 T3 147 T4 142
valid_sources[0x67] 445004 1 T1 177 T3 123 T4 180
valid_sources[0x68] 824231 1 T1 164 T3 107 T4 213
valid_sources[0x69] 445712 1 T1 186 T3 125 T4 176
valid_sources[0x6a] 470235 1 T1 175 T3 91 T4 163
valid_sources[0x6b] 2833567 1 T1 181 T3 127 T4 168
valid_sources[0x6c] 584577 1 T1 168 T3 136 T4 215
valid_sources[0x6d] 446418 1 T1 159 T3 114 T4 193
valid_sources[0x6e] 450725 1 T1 145 T3 136 T4 171
valid_sources[0x6f] 451571 1 T1 179 T3 121 T4 167
valid_sources[0x70] 455202 1 T1 197 T3 136 T4 179
valid_sources[0x71] 446270 1 T1 165 T3 131 T4 191
valid_sources[0x72] 451482 1 T1 183 T3 120 T4 196
valid_sources[0x73] 2003698 1 T1 192 T3 134 T4 170
valid_sources[0x74] 451054 1 T1 165 T3 151 T4 213
valid_sources[0x75] 448680 1 T1 181 T3 124 T4 215
valid_sources[0x76] 450637 1 T1 161 T3 128 T4 181
valid_sources[0x77] 462670 1 T1 192 T3 111 T4 188
valid_sources[0x78] 584243 1 T1 162 T3 126 T4 154
valid_sources[0x79] 446402 1 T1 146 T3 121 T4 198
valid_sources[0x7a] 452039 1 T1 191 T3 116 T4 180
valid_sources[0x7b] 448724 1 T1 179 T3 128 T4 160
valid_sources[0x7c] 446633 1 T1 160 T3 136 T4 180
valid_sources[0x7d] 449504 1 T1 169 T3 118 T4 184
valid_sources[0x7e] 445942 1 T1 204 T3 128 T4 181
valid_sources[0x7f] 560412 1 T1 186 T3 123 T4 212
valid_sources[0x80] 468816 1 T1 177 T3 167 T4 168



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 67329330 1 T1 22124 T2 8568 T3 16346
values[0x0] all_enables biggest_size 2269426 1 T1 19 T2 7 T3 5
values[0x1] all_enables biggest_size 2263514 1 T1 18 T2 7 T3 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%