Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61554603	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	62756837	1		T1	429013		T2	136386		T3	2584

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	123273762	1		T1	856830		T2	272471		T3	5109
values[0x0]	493012	1		T1	19		T2	6		T3	5
values[0x1]	544666	1		T1	32		T2	4		T3	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49163472	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	75147968	1		T1	515114		T2	163698		T3	3094

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	337864	1		T1	3368		T2	1060		T3	13
valid_sources[0x01]	569866	1		T1	3132		T2	1045		T3	18
valid_sources[0x02]	335462	1		T1	3361		T2	1063		T3	14
valid_sources[0x03]	335595	1		T1	3462		T2	1037		T3	6
valid_sources[0x04]	336536	1		T1	3217		T2	1122		T3	22
valid_sources[0x05]	336199	1		T1	3493		T2	1061		T3	16
valid_sources[0x06]	449651	1		T1	3540		T2	1078		T3	27
valid_sources[0x07]	334145	1		T1	3403		T2	1032		T3	19
valid_sources[0x08]	437484	1		T1	3330		T2	1019		T3	49
valid_sources[0x09]	337479	1		T1	3139		T2	1057		T3	15
valid_sources[0x0a]	360796	1		T1	3305		T2	1088		T6	1090
valid_sources[0x0b]	335439	1		T1	3381		T2	1077		T3	32
valid_sources[0x0c]	334656	1		T1	3259		T2	1065		T3	29
valid_sources[0x0d]	337767	1		T1	3125		T2	1002		T3	11
valid_sources[0x0e]	340072	1		T1	3211		T2	1059		T3	33
valid_sources[0x0f]	2886501	1		T1	3245		T2	1083		T3	14
valid_sources[0x10]	336768	1		T1	3355		T2	1077		T3	10
valid_sources[0x11]	334808	1		T1	3362		T2	1043		T3	35
valid_sources[0x12]	341579	1		T1	3297		T2	1062		T3	18
valid_sources[0x13]	332603	1		T1	3404		T2	1110		T3	30
valid_sources[0x14]	336830	1		T1	3439		T2	1099		T3	15
valid_sources[0x15]	335250	1		T1	3272		T2	1039		T3	18
valid_sources[0x16]	337731	1		T1	3385		T2	1147		T3	31
valid_sources[0x17]	334421	1		T1	3285		T2	1147		T3	12
valid_sources[0x18]	334961	1		T1	3372		T2	1050		T3	26
valid_sources[0x19]	345993	1		T1	3226		T2	1082		T3	28
valid_sources[0x1a]	333646	1		T1	3240		T2	1052		T3	13
valid_sources[0x1b]	337910	1		T1	3159		T2	1131		T3	16
valid_sources[0x1c]	1511786	1		T1	3494		T2	1116		T3	9
valid_sources[0x1d]	377830	1		T1	3215		T2	1065		T3	13
valid_sources[0x1e]	335375	1		T1	3378		T2	996		T3	24
valid_sources[0x1f]	341794	1		T1	3404		T2	1024		T3	22
valid_sources[0x20]	2050014	1		T1	3528		T2	1067		T3	41
valid_sources[0x21]	335050	1		T1	3462		T2	1031		T3	59
valid_sources[0x22]	336309	1		T1	3297		T2	1066		T3	12
valid_sources[0x23]	336947	1		T1	3225		T2	1062		T3	6
valid_sources[0x24]	346560	1		T1	3491		T2	1143		T3	8
valid_sources[0x25]	339391	1		T1	3550		T2	1078		T3	30
valid_sources[0x26]	336764	1		T1	3417		T2	1028		T3	51
valid_sources[0x27]	455800	1		T1	3192		T2	1073		T3	16
valid_sources[0x28]	337912	1		T1	3290		T2	1074		T3	16
valid_sources[0x29]	501063	1		T1	3281		T2	1077		T3	2
valid_sources[0x2a]	334464	1		T1	3498		T2	1053		T3	22
valid_sources[0x2b]	334292	1		T1	3124		T2	1180		T3	18
valid_sources[0x2c]	732104	1		T1	3127		T2	1089		T3	33
valid_sources[0x2d]	332048	1		T1	3353		T2	1064		T3	10
valid_sources[0x2e]	335623	1		T1	3295		T2	1095		T3	28
valid_sources[0x2f]	2504638	1		T1	3243		T2	1035		T3	34
valid_sources[0x30]	341240	1		T1	3234		T2	1001		T3	24
valid_sources[0x31]	335182	1		T1	3308		T2	1017		T3	45
valid_sources[0x32]	334439	1		T1	3357		T2	1005		T3	2
valid_sources[0x33]	339870	1		T1	3248		T2	1046		T3	9
valid_sources[0x34]	1864483	1		T1	3381		T2	1046		T3	47
valid_sources[0x35]	336683	1		T1	3392		T2	1035		T3	20
valid_sources[0x36]	360425	1		T1	3352		T2	1017		T3	11
valid_sources[0x37]	947060	1		T1	3267		T2	1052		T3	14
valid_sources[0x38]	339201	1		T1	3401		T2	1086		T3	17
valid_sources[0x39]	336635	1		T1	3307		T2	1114		T3	43
valid_sources[0x3a]	336731	1		T1	3408		T2	1063		T3	8
valid_sources[0x3b]	351744	1		T1	3614		T2	1098		T3	5
valid_sources[0x3c]	533473	1		T1	3584		T2	979		T3	10
valid_sources[0x3d]	1347093	1		T1	3239		T2	1067		T3	12
valid_sources[0x3e]	348673	1		T1	3437		T2	1074		T3	16
valid_sources[0x3f]	334488	1		T1	3351		T2	1089		T3	20
valid_sources[0x40]	337548	1		T1	3332		T2	1057		T3	15
valid_sources[0x41]	334222	1		T1	3375		T2	1059		T3	12
valid_sources[0x42]	339257	1		T1	3407		T2	1061		T3	17
valid_sources[0x43]	333350	1		T1	3252		T2	1056		T3	11
valid_sources[0x44]	336809	1		T1	3373		T2	1034		T3	26
valid_sources[0x45]	2323161	1		T1	3220		T2	1073		T3	18
valid_sources[0x46]	1104329	1		T1	3373		T2	1100		T3	46
valid_sources[0x47]	334452	1		T1	3180		T2	1131		T3	8
valid_sources[0x48]	335064	1		T1	3396		T2	1032		T3	23
valid_sources[0x49]	337306	1		T1	3420		T2	1093		T3	45
valid_sources[0x4a]	714961	1		T1	3416		T2	1081		T3	19
valid_sources[0x4b]	331861	1		T1	3260		T2	1030		T3	22
valid_sources[0x4c]	337072	1		T1	3297		T2	994		T3	11
valid_sources[0x4d]	338167	1		T1	3301		T2	1056		T3	11
valid_sources[0x4e]	336762	1		T1	3414		T2	1071		T3	28
valid_sources[0x4f]	336744	1		T1	3329		T2	1056		T3	35
valid_sources[0x50]	529661	1		T1	3186		T2	1047		T3	9
valid_sources[0x51]	334801	1		T1	3331		T2	1120		T3	15
valid_sources[0x52]	336930	1		T1	3394		T2	1070		T3	31
valid_sources[0x53]	335805	1		T1	3489		T2	1053		T3	21
valid_sources[0x54]	334538	1		T1	3407		T2	1060		T3	37
valid_sources[0x55]	333481	1		T1	3291		T2	999		T3	30
valid_sources[0x56]	337433	1		T1	3446		T2	1057		T3	4
valid_sources[0x57]	335150	1		T1	3327		T2	1128		T3	8
valid_sources[0x58]	339853	1		T1	3390		T2	1058		T3	9
valid_sources[0x59]	337132	1		T1	3424		T2	1061		T3	18
valid_sources[0x5a]	338196	1		T1	3338		T2	1089		T3	15
valid_sources[0x5b]	615159	1		T1	3260		T2	1014		T3	11
valid_sources[0x5c]	334562	1		T1	3381		T2	1042		T3	24
valid_sources[0x5d]	335816	1		T1	3455		T2	1069		T3	15
valid_sources[0x5e]	340935	1		T1	3265		T2	1017		T3	47
valid_sources[0x5f]	337025	1		T1	3311		T2	1092		T3	29
valid_sources[0x60]	336438	1		T1	3337		T2	1049		T3	25
valid_sources[0x61]	336016	1		T1	3247		T2	1101		T3	12
valid_sources[0x62]	335797	1		T1	3566		T2	1029		T3	24
valid_sources[0x63]	4300769	1		T1	3232		T2	1086		T3	21
valid_sources[0x64]	771303	1		T1	3294		T2	1081		T3	13
valid_sources[0x65]	334050	1		T1	3523		T2	1077		T3	23
valid_sources[0x66]	337824	1		T1	3465		T2	1106		T3	28
valid_sources[0x67]	332713	1		T1	3378		T2	1087		T3	13
valid_sources[0x68]	333445	1		T1	3547		T2	1034		T3	12
valid_sources[0x69]	1872138	1		T1	3311		T2	1062		T3	3
valid_sources[0x6a]	337339	1		T1	3297		T2	1055		T3	40
valid_sources[0x6b]	335241	1		T1	3161		T2	1122		T3	20
valid_sources[0x6c]	334537	1		T1	3552		T2	1071		T3	39
valid_sources[0x6d]	337821	1		T1	3325		T2	1079		T3	22
valid_sources[0x6e]	336452	1		T1	3394		T2	1116		T3	20
valid_sources[0x6f]	336363	1		T1	3194		T2	997		T3	26
valid_sources[0x70]	342117	1		T1	3265		T2	1061		T3	31
valid_sources[0x71]	337150	1		T1	3351		T2	1055		T3	25
valid_sources[0x72]	338146	1		T1	3448		T2	1096		T3	11
valid_sources[0x73]	334480	1		T1	3395		T2	1052		T3	15
valid_sources[0x74]	337931	1		T1	3201		T2	1045		T3	29
valid_sources[0x75]	364429	1		T1	3377		T2	1053		T3	14
valid_sources[0x76]	334642	1		T1	3332		T2	1054		T3	28
valid_sources[0x77]	337925	1		T1	3335		T2	993		T3	13
valid_sources[0x78]	701262	1		T1	3474		T2	1077		T3	47
valid_sources[0x79]	598756	1		T1	3336		T2	1065		T3	32
valid_sources[0x7a]	334575	1		T1	3420		T2	1117		T3	9
valid_sources[0x7b]	335182	1		T1	3383		T2	1069		T3	9
valid_sources[0x7c]	332377	1		T1	3400		T2	1088		T3	11
valid_sources[0x7d]	343036	1		T1	3491		T2	1075		T3	20
valid_sources[0x7e]	335649	1		T1	3225		T2	1073		T3	11
valid_sources[0x7f]	336583	1		T1	3356		T2	1045		T3	38
valid_sources[0x80]	334943	1		T1	3411		T2	1080		T3	20

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

61791574

1

T1

428977

T2

136379

T3

2576

values[0x0]

all_enables

biggest_size

483282

1

T1

15

T2

4

T3

4

values[0x1]

all_enables

biggest_size

481981

1

T1

21

T2

3

T3

4