Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67078097	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	68063242	1		T1	131974		T2	3767		T3	232745

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	134277101	1		T1	264026		T2	7416		T3	465726
values[0x0]	410821	1		T1	7		T2	12		T3	32
values[0x1]	453417	1		T1	11		T2	18		T3	28

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53583943	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	81557396	1		T1	158755		T2	4483		T3	279435

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	355113	1		T2	42		T3	18186		T4	1940
valid_sources[0x01]	350459	1		T2	24		T3	17908		T4	1872
valid_sources[0x02]	354492	1		T2	31		T3	18169		T4	1896
valid_sources[0x03]	353586	1		T2	26		T3	18262		T4	1842
valid_sources[0x04]	381265	1		T2	23		T3	18095		T4	1845
valid_sources[0x05]	354076	1		T2	33		T3	18176		T4	1859
valid_sources[0x06]	353963	1		T2	23		T3	18279		T4	1903
valid_sources[0x07]	352580	1		T2	30		T3	18104		T4	1911
valid_sources[0x08]	356362	1		T2	44		T3	18079		T4	1870
valid_sources[0x09]	383125	1		T2	40		T3	18002		T4	1887
valid_sources[0x0a]	354645	1		T2	35		T3	18343		T4	1796
valid_sources[0x0b]	353618	1		T2	27		T3	18066		T4	1924
valid_sources[0x0c]	354437	1		T2	42		T3	18207		T4	1906
valid_sources[0x0d]	353212	1		T2	48		T3	17994		T4	1835
valid_sources[0x0e]	354962	1		T2	21		T3	18059		T4	1846
valid_sources[0x0f]	2076855	1		T2	48		T3	18207		T4	1746
valid_sources[0x10]	354172	1		T2	34		T3	18297		T4	1894
valid_sources[0x11]	352744	1		T2	28		T3	18155		T4	1885
valid_sources[0x12]	814554	1		T2	20		T3	18402		T4	1945
valid_sources[0x13]	366669	1		T2	21		T3	18264		T4	1909
valid_sources[0x14]	353703	1		T2	27		T3	18015		T4	1894
valid_sources[0x15]	353723	1		T2	37		T3	18025		T4	1796
valid_sources[0x16]	354334	1		T2	22		T3	18136		T4	1884
valid_sources[0x17]	403044	1		T2	33		T3	18260		T4	1863
valid_sources[0x18]	353766	1		T2	23		T3	18010		T4	1889
valid_sources[0x19]	353880	1		T2	26		T3	18024		T4	1933
valid_sources[0x1a]	355166	1		T2	29		T3	18134		T4	1959
valid_sources[0x1b]	2992056	1		T2	24		T3	18196		T4	1880
valid_sources[0x1c]	355754	1		T2	37		T3	17968		T4	1780
valid_sources[0x1d]	356766	1		T2	32		T3	18062		T4	1863
valid_sources[0x1e]	957101	1		T2	17		T3	18404		T4	1867
valid_sources[0x1f]	353754	1		T2	23		T3	18289		T4	2015
valid_sources[0x20]	363427	1		T2	21		T3	17993		T4	1885
valid_sources[0x21]	351564	1		T2	27		T3	18268		T4	1970
valid_sources[0x22]	481877	1		T2	25		T3	18088		T4	1958
valid_sources[0x23]	368925	1		T2	29		T3	17923		T4	1891
valid_sources[0x24]	354753	1		T2	24		T3	18235		T4	1835
valid_sources[0x25]	350602	1		T2	28		T3	18230		T4	1900
valid_sources[0x26]	354304	1		T2	34		T3	18125		T4	1835
valid_sources[0x27]	352743	1		T2	45		T3	18471		T4	1863
valid_sources[0x28]	353571	1		T2	22		T3	17991		T4	1940
valid_sources[0x29]	354091	1		T2	36		T3	18117		T4	1896
valid_sources[0x2a]	354115	1		T2	22		T3	18070		T4	1902
valid_sources[0x2b]	353698	1		T2	29		T3	18326		T4	1828
valid_sources[0x2c]	353573	1		T2	36		T3	18069		T4	1901
valid_sources[0x2d]	352795	1		T2	27		T3	18310		T4	1986
valid_sources[0x2e]	1576588	1		T2	28		T3	18332		T4	1853
valid_sources[0x2f]	363619	1		T2	37		T3	18400		T4	1832
valid_sources[0x30]	352102	1		T2	35		T3	18258		T4	1799
valid_sources[0x31]	384622	1		T2	35		T3	18005		T4	1917
valid_sources[0x32]	354280	1		T2	32		T3	18249		T4	1896
valid_sources[0x33]	353150	1		T2	27		T3	18379		T4	1905
valid_sources[0x34]	398591	1		T2	35		T3	18176		T4	1754
valid_sources[0x35]	352947	1		T2	31		T3	18455		T4	1811
valid_sources[0x36]	352024	1		T2	21		T3	18277		T4	1899
valid_sources[0x37]	355977	1		T2	27		T3	18134		T4	1880
valid_sources[0x38]	355720	1		T2	22		T3	18197		T4	1899
valid_sources[0x39]	474198	1		T2	15		T3	18084		T4	1821
valid_sources[0x3a]	433645	1		T2	33		T3	18166		T4	1967
valid_sources[0x3b]	361539	1		T2	26		T3	18286		T4	1905
valid_sources[0x3c]	352425	1		T2	33		T3	18164		T4	1864
valid_sources[0x3d]	3008857	1		T2	47		T3	18127		T4	1875
valid_sources[0x3e]	1004093	1		T2	22		T3	18356		T4	1757
valid_sources[0x3f]	613995	1		T2	25		T3	18056		T4	1915
valid_sources[0x40]	352624	1		T2	20		T3	18272		T4	1982
valid_sources[0x41]	354868	1		T2	23		T3	18039		T4	1824
valid_sources[0x42]	354758	1		T2	33		T3	18397		T4	1887
valid_sources[0x43]	353096	1		T2	30		T3	18080		T4	1945
valid_sources[0x44]	352452	1		T2	31		T3	18032		T4	1868
valid_sources[0x45]	352884	1		T2	22		T3	18070		T4	1891
valid_sources[0x46]	354100	1		T2	26		T3	17851		T4	1888
valid_sources[0x47]	352505	1		T2	29		T3	18056		T4	1871
valid_sources[0x48]	670782	1		T2	36		T3	18499		T4	1936
valid_sources[0x49]	354386	1		T2	33		T3	18206		T4	1916
valid_sources[0x4a]	404715	1		T2	33		T3	18001		T4	1934
valid_sources[0x4b]	354361	1		T2	28		T3	18137		T4	1897
valid_sources[0x4c]	355834	1		T2	33		T3	18403		T4	1840
valid_sources[0x4d]	430126	1		T2	26		T3	17767		T4	1806
valid_sources[0x4e]	356699	1		T2	29		T3	18362		T4	1856
valid_sources[0x4f]	351691	1		T2	38		T3	18148		T4	1879
valid_sources[0x50]	352801	1		T2	22		T3	18178		T4	1909
valid_sources[0x51]	353601	1		T2	24		T3	18343		T4	1852
valid_sources[0x52]	1454268	1		T2	34		T3	18362		T4	1930
valid_sources[0x53]	354023	1		T2	37		T3	18433		T4	1877
valid_sources[0x54]	354300	1		T2	34		T3	18071		T4	1827
valid_sources[0x55]	354242	1		T2	30		T3	18244		T4	1927
valid_sources[0x56]	354151	1		T2	27		T3	18147		T4	1832
valid_sources[0x57]	355367	1		T2	28		T3	18154		T4	1837
valid_sources[0x58]	354987	1		T2	20		T3	18246		T4	1876
valid_sources[0x59]	352677	1		T2	38		T3	18183		T4	1844
valid_sources[0x5a]	352005	1		T2	32		T3	18342		T4	1943
valid_sources[0x5b]	608908	1		T2	29		T3	18168		T4	1893
valid_sources[0x5c]	355081	1		T2	29		T3	17896		T4	1916
valid_sources[0x5d]	353067	1		T2	28		T3	18189		T4	1829
valid_sources[0x5e]	354158	1		T2	27		T3	18344		T4	1889
valid_sources[0x5f]	370682	1		T2	30		T3	17979		T4	1835
valid_sources[0x60]	455798	1		T2	31		T3	18277		T4	1910
valid_sources[0x61]	355172	1		T2	16		T3	18361		T4	1836
valid_sources[0x62]	352956	1		T2	31		T3	17983		T4	1908
valid_sources[0x63]	355449	1		T2	21		T3	18141		T4	1815
valid_sources[0x64]	363610	1		T2	27		T3	18500		T4	1841
valid_sources[0x65]	353339	1		T2	31		T3	18128		T4	1801
valid_sources[0x66]	521389	1		T2	30		T3	18226		T4	1836
valid_sources[0x67]	1539455	1		T2	31		T3	18256		T4	1846
valid_sources[0x68]	355243	1		T2	35		T3	18165		T4	1930
valid_sources[0x69]	1176635	1		T2	30		T3	18315		T4	1888
valid_sources[0x6a]	353083	1		T2	23		T3	18440		T4	1870
valid_sources[0x6b]	354240	1		T2	21		T3	18214		T4	1895
valid_sources[0x6c]	356108	1		T2	22		T3	18219		T4	1790
valid_sources[0x6d]	2966826	1		T2	34		T3	18256		T4	1821
valid_sources[0x6e]	353535	1		T2	20		T3	18158		T4	1890
valid_sources[0x6f]	394903	1		T2	25		T3	18195		T4	1906
valid_sources[0x70]	382522	1		T2	39		T3	18223		T4	1912
valid_sources[0x71]	357864	1		T2	39		T3	18173		T4	1836
valid_sources[0x72]	352840	1		T2	27		T3	18069		T4	2008
valid_sources[0x73]	353142	1		T2	17		T3	18022		T4	1846
valid_sources[0x74]	363580	1		T2	29		T3	18402		T4	1907
valid_sources[0x75]	355133	1		T2	19		T3	18218		T4	1914
valid_sources[0x76]	352088	1		T2	38		T3	18040		T4	1832
valid_sources[0x77]	413758	1		T2	25		T3	18205		T4	1785
valid_sources[0x78]	352929	1		T2	34		T3	18322		T4	1898
valid_sources[0x79]	385861	1		T2	28		T3	18036		T4	1864
valid_sources[0x7a]	353669	1		T2	51		T3	18524		T4	1876
valid_sources[0x7b]	357573	1		T2	30		T3	18264		T4	1839
valid_sources[0x7c]	354558	1		T2	24		T3	18149		T4	1853
valid_sources[0x7d]	353785	1		T2	28		T3	18258		T4	1869
valid_sources[0x7e]	353755	1		T2	17		T3	18442		T4	1916
valid_sources[0x7f]	354559	1		T2	31		T3	18238		T4	1933
valid_sources[0x80]	354941	1		T2	26		T3	18150		T4	1834

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

67260400

1

T1

131961

T2

3744

T3

232741

values[0x0]

all_enables

biggest_size

401633

1

T1

7

T2

11

T3

27

values[0x1]

all_enables

biggest_size

401209

1

T1

6

T2

12

T3

21