Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67117533	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	68827433	1		T1	242616		T2	5339		T3	4041

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	134480515	1		T1	89957		T2	10858		T3	7961
values[0x0]	695076	1		T1	86336		T2	5		T3	5
values[0x1]	769375	1		T1	95975		T2	6		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53602069	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	82342897	1		T1	253796		T2	6422		T3	4857

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	428355	1		T1	1183		T2	68		T3	39
valid_sources[0x01]	426270	1		T1	928		T2	21		T3	35
valid_sources[0x02]	426785	1		T1	886		T2	24		T3	29
valid_sources[0x03]	443356	1		T1	1082		T2	35		T3	31
valid_sources[0x04]	433482	1		T1	920		T2	40		T3	18
valid_sources[0x05]	445643	1		T1	1128		T2	49		T3	24
valid_sources[0x06]	556040	1		T1	942		T2	40		T3	22
valid_sources[0x07]	429185	1		T1	807		T2	64		T3	33
valid_sources[0x08]	448130	1		T1	1164		T2	32		T3	37
valid_sources[0x09]	744812	1		T1	1151		T2	34		T3	30
valid_sources[0x0a]	1262863	1		T1	955		T2	23		T3	39
valid_sources[0x0b]	429494	1		T1	889		T2	55		T3	34
valid_sources[0x0c]	657523	1		T1	1153		T2	46		T3	25
valid_sources[0x0d]	423864	1		T1	1193		T2	3		T3	35
valid_sources[0x0e]	429076	1		T1	961		T2	56		T3	32
valid_sources[0x0f]	726076	1		T1	1247		T2	93		T3	20
valid_sources[0x10]	428519	1		T1	908		T2	61		T3	32
valid_sources[0x11]	429052	1		T1	918		T2	18		T3	30
valid_sources[0x12]	528878	1		T1	924		T2	9		T3	32
valid_sources[0x13]	428384	1		T1	808		T2	22		T3	33
valid_sources[0x14]	427280	1		T1	1032		T2	32		T3	22
valid_sources[0x15]	428879	1		T1	976		T2	44		T3	27
valid_sources[0x16]	628832	1		T1	1002		T2	5		T3	38
valid_sources[0x17]	426392	1		T1	972		T2	26		T3	46
valid_sources[0x18]	426665	1		T1	1021		T2	42		T3	39
valid_sources[0x19]	425274	1		T1	852		T2	7		T3	33
valid_sources[0x1a]	429711	1		T1	971		T2	31		T3	22
valid_sources[0x1b]	429804	1		T1	1170		T2	38		T3	24
valid_sources[0x1c]	428073	1		T1	1189		T2	56		T3	37
valid_sources[0x1d]	429665	1		T1	1097		T2	31		T3	30
valid_sources[0x1e]	1064902	1		T1	1032		T2	27		T3	33
valid_sources[0x1f]	431580	1		T1	1100		T2	58		T3	31
valid_sources[0x20]	428534	1		T1	1076		T2	3		T3	43
valid_sources[0x21]	423326	1		T1	1041		T2	29		T3	25
valid_sources[0x22]	428929	1		T1	1250		T2	38		T3	45
valid_sources[0x23]	805618	1		T1	965		T2	28		T3	35
valid_sources[0x24]	429253	1		T1	1079		T2	1		T3	31
valid_sources[0x25]	430019	1		T1	1190		T2	33		T3	22
valid_sources[0x26]	425419	1		T1	1087		T2	94		T3	34
valid_sources[0x27]	424931	1		T1	1050		T2	53		T3	47
valid_sources[0x28]	423652	1		T1	1039		T2	47		T3	38
valid_sources[0x29]	429350	1		T1	947		T2	56		T3	33
valid_sources[0x2a]	429731	1		T1	1275		T2	9		T3	29
valid_sources[0x2b]	424874	1		T1	1051		T2	75		T3	27
valid_sources[0x2c]	430344	1		T1	1212		T2	96		T3	30
valid_sources[0x2d]	469755	1		T1	1049		T2	15		T3	19
valid_sources[0x2e]	431796	1		T1	1036		T2	34		T3	37
valid_sources[0x2f]	730021	1		T1	1126		T2	75		T3	41
valid_sources[0x30]	428694	1		T1	929		T2	29		T3	29
valid_sources[0x31]	430411	1		T1	1036		T2	35		T3	27
valid_sources[0x32]	546492	1		T1	964		T2	95		T3	36
valid_sources[0x33]	3970149	1		T1	1203		T2	85		T3	27
valid_sources[0x34]	430513	1		T1	1174		T2	21		T3	42
valid_sources[0x35]	430618	1		T1	1093		T2	20		T3	34
valid_sources[0x36]	427559	1		T1	1197		T2	52		T3	35
valid_sources[0x37]	428905	1		T1	1257		T2	73		T3	19
valid_sources[0x38]	456430	1		T1	1053		T2	1		T3	42
valid_sources[0x39]	427992	1		T1	1313		T2	39		T3	31
valid_sources[0x3a]	431763	1		T1	1176		T2	37		T3	23
valid_sources[0x3b]	429380	1		T1	1090		T2	52		T3	35
valid_sources[0x3c]	522693	1		T1	871		T2	31		T3	28
valid_sources[0x3d]	429895	1		T1	1278		T2	18		T3	35
valid_sources[0x3e]	428872	1		T1	1087		T2	44		T3	23
valid_sources[0x3f]	426164	1		T1	912		T2	73		T3	29
valid_sources[0x40]	428400	1		T1	1191		T2	37		T3	32
valid_sources[0x41]	425915	1		T1	891		T2	38		T3	39
valid_sources[0x42]	428318	1		T1	1171		T2	33		T3	39
valid_sources[0x43]	426820	1		T1	928		T2	87		T3	32
valid_sources[0x44]	430179	1		T1	1026		T2	40		T3	35
valid_sources[0x45]	429027	1		T1	1046		T2	29		T3	20
valid_sources[0x46]	456364	1		T1	1222		T2	31		T3	45
valid_sources[0x47]	425597	1		T1	919		T2	29		T3	34
valid_sources[0x48]	428896	1		T1	1187		T2	3		T3	39
valid_sources[0x49]	428735	1		T1	945		T2	24		T3	22
valid_sources[0x4a]	427714	1		T1	985		T2	8		T3	30
valid_sources[0x4b]	924551	1		T1	751		T2	52		T3	40
valid_sources[0x4c]	428125	1		T1	998		T2	14		T3	33
valid_sources[0x4d]	456601	1		T1	1075		T2	67		T3	34
valid_sources[0x4e]	428636	1		T1	1053		T2	34		T3	34
valid_sources[0x4f]	431091	1		T1	1081		T2	119		T3	33
valid_sources[0x50]	428972	1		T1	1005		T2	52		T3	25
valid_sources[0x51]	2033722	1		T1	819		T2	54		T3	38
valid_sources[0x52]	426223	1		T1	1232		T2	44		T3	39
valid_sources[0x53]	430921	1		T1	873		T2	47		T3	30
valid_sources[0x54]	423117	1		T1	939		T2	30		T3	34
valid_sources[0x55]	428546	1		T1	1224		T2	56		T3	30
valid_sources[0x56]	425981	1		T1	939		T2	16		T3	29
valid_sources[0x57]	426910	1		T1	1018		T2	29		T3	34
valid_sources[0x58]	427624	1		T1	1218		T2	63		T3	25
valid_sources[0x59]	471778	1		T1	1028		T2	28		T3	28
valid_sources[0x5a]	427285	1		T1	1057		T2	5		T3	38
valid_sources[0x5b]	427170	1		T1	1269		T2	40		T3	21
valid_sources[0x5c]	1128316	1		T1	1099		T2	33		T3	41
valid_sources[0x5d]	428562	1		T1	1108		T2	34		T3	32
valid_sources[0x5e]	608827	1		T1	969		T2	31		T3	33
valid_sources[0x5f]	982620	1		T1	1249		T2	27		T3	20
valid_sources[0x60]	429360	1		T1	1113		T2	36		T3	33
valid_sources[0x61]	426262	1		T1	991		T2	36		T3	19
valid_sources[0x62]	426735	1		T1	1316		T2	57		T3	27
valid_sources[0x63]	431972	1		T1	957		T2	24		T3	35
valid_sources[0x64]	426989	1		T1	1058		T2	39		T3	35
valid_sources[0x65]	473705	1		T1	1330		T2	47		T3	30
valid_sources[0x66]	429627	1		T1	1094		T2	15		T3	38
valid_sources[0x67]	426561	1		T1	855		T2	81		T3	25
valid_sources[0x68]	431123	1		T1	1052		T2	60		T3	34
valid_sources[0x69]	477494	1		T1	1216		T2	56		T3	30
valid_sources[0x6a]	425612	1		T1	920		T2	42		T3	25
valid_sources[0x6b]	480775	1		T1	1051		T2	29		T3	42
valid_sources[0x6c]	428392	1		T1	1009		T2	23		T3	26
valid_sources[0x6d]	486923	1		T1	953		T2	79		T3	29
valid_sources[0x6e]	429104	1		T1	1041		T2	9		T3	30
valid_sources[0x6f]	428385	1		T1	859		T2	16		T3	25
valid_sources[0x70]	438662	1		T1	1087		T2	16		T3	36
valid_sources[0x71]	429157	1		T1	1078		T2	30		T3	21
valid_sources[0x72]	429028	1		T1	992		T2	62		T3	27
valid_sources[0x73]	710159	1		T1	956		T2	38		T3	23
valid_sources[0x74]	430239	1		T1	1055		T2	13		T3	25
valid_sources[0x75]	429924	1		T1	864		T2	8		T3	29
valid_sources[0x76]	426288	1		T1	1009		T2	46		T3	30
valid_sources[0x77]	428759	1		T1	1001		T2	52		T3	24
valid_sources[0x78]	949644	1		T1	1126		T2	21		T3	38
valid_sources[0x79]	427020	1		T1	921		T2	21		T3	38
valid_sources[0x7a]	428920	1		T1	1015		T2	43		T3	25
valid_sources[0x7b]	427459	1		T1	752		T2	39		T3	27
valid_sources[0x7c]	426246	1		T1	1026		T2	46		T3	40
valid_sources[0x7d]	484101	1		T1	1119		T2	92		T3	28
valid_sources[0x7e]	429751	1		T1	1319		T2	84		T3	19
valid_sources[0x7f]	558342	1		T1	1191		T2	14		T3	24
valid_sources[0x80]	428225	1		T1	1186		T2	20		T3	21

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

67461577

1

T1

71696

T2

5331

T3

4030

values[0x0]

all_enables

biggest_size

682448

1

T1

85291

T2

5

T3

5

values[0x1]

all_enables

biggest_size

683408

1

T1

85629

T2

3

T3

6