Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 70695681 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 71878419 1 T1 1145 T2 133221 T3 107925



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 141556906 1 T1 2278 T2 266402 T3 215204
values[0x0] 481776 1 T1 7 T2 13 T3 26
values[0x1] 535418 1 T1 6 T2 17 T3 25



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56467880 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 86106220 1 T1 1352 T2 159973 T3 129165



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 451459 1 T1 15 T2 10321 T3 915
valid_sources[0x01] 451687 1 T1 8 T2 10377 T3 994
valid_sources[0x02] 450677 1 T1 13 T2 10357 T3 922
valid_sources[0x03] 943879 1 T1 7 T2 10411 T3 895
valid_sources[0x04] 457833 1 T1 7 T2 10509 T3 853
valid_sources[0x05] 449089 1 T1 11 T2 10497 T3 858
valid_sources[0x06] 456640 1 T1 13 T2 10678 T3 920
valid_sources[0x07] 452969 1 T1 7 T2 10255 T3 675
valid_sources[0x08] 451188 1 T1 9 T2 10464 T3 858
valid_sources[0x09] 1261591 1 T1 4 T2 10363 T3 793
valid_sources[0x0a] 451536 1 T1 6 T2 10348 T3 900
valid_sources[0x0b] 454246 1 T1 11 T2 10116 T3 951
valid_sources[0x0c] 451115 1 T1 9 T2 10247 T3 782
valid_sources[0x0d] 454978 1 T1 9 T2 10293 T3 684
valid_sources[0x0e] 450358 1 T1 11 T2 10325 T3 931
valid_sources[0x0f] 452144 1 T1 11 T2 10481 T3 781
valid_sources[0x10] 452165 1 T1 12 T2 10479 T3 1076
valid_sources[0x11] 451891 1 T1 18 T2 10556 T3 797
valid_sources[0x12] 454772 1 T1 9 T2 10587 T3 645
valid_sources[0x13] 455118 1 T1 7 T2 10431 T3 731
valid_sources[0x14] 449619 1 T1 14 T2 10665 T3 880
valid_sources[0x15] 455293 1 T1 5 T2 10888 T3 750
valid_sources[0x16] 450318 1 T1 17 T2 10349 T3 822
valid_sources[0x17] 453243 1 T1 8 T2 10281 T3 816
valid_sources[0x18] 993996 1 T1 4 T2 10748 T3 709
valid_sources[0x19] 502042 1 T1 1 T2 10349 T3 804
valid_sources[0x1a] 452333 1 T1 8 T2 10218 T3 752
valid_sources[0x1b] 453481 1 T1 14 T2 10280 T3 781
valid_sources[0x1c] 2044827 1 T1 4 T2 10302 T3 623
valid_sources[0x1d] 452266 1 T1 6 T2 10499 T3 886
valid_sources[0x1e] 482924 1 T1 10 T2 10363 T3 807
valid_sources[0x1f] 466274 1 T1 11 T2 10565 T3 671
valid_sources[0x20] 452137 1 T1 13 T2 10276 T3 821
valid_sources[0x21] 454196 1 T1 11 T2 10347 T3 925
valid_sources[0x22] 454565 1 T1 6 T2 10526 T3 973
valid_sources[0x23] 455157 1 T1 6 T2 10493 T3 892
valid_sources[0x24] 448733 1 T1 10 T2 10359 T3 739
valid_sources[0x25] 452103 1 T1 11 T2 10400 T3 926
valid_sources[0x26] 599608 1 T1 17 T2 10468 T3 934
valid_sources[0x27] 3668825 1 T1 8 T2 10155 T3 822
valid_sources[0x28] 488426 1 T1 11 T2 10047 T3 803
valid_sources[0x29] 741316 1 T1 14 T2 10196 T3 801
valid_sources[0x2a] 453899 1 T1 12 T2 10569 T3 732
valid_sources[0x2b] 617550 1 T1 16 T2 10368 T3 848
valid_sources[0x2c] 648503 1 T1 7 T2 10239 T3 922
valid_sources[0x2d] 454689 1 T1 8 T2 10282 T3 765
valid_sources[0x2e] 452486 1 T1 10 T2 10505 T3 902
valid_sources[0x2f] 457756 1 T1 10 T2 10511 T3 811
valid_sources[0x30] 450371 1 T1 5 T2 10184 T3 831
valid_sources[0x31] 453115 1 T1 4 T2 10408 T3 844
valid_sources[0x32] 453030 1 T1 9 T2 10303 T3 820
valid_sources[0x33] 453289 1 T1 9 T2 10246 T3 836
valid_sources[0x34] 453260 1 T1 14 T2 10299 T3 905
valid_sources[0x35] 3158924 1 T1 8 T2 10321 T3 964
valid_sources[0x36] 455912 1 T1 4 T2 10504 T3 909
valid_sources[0x37] 449490 1 T1 6 T2 10323 T3 817
valid_sources[0x38] 452562 1 T1 6 T2 10726 T3 859
valid_sources[0x39] 452438 1 T1 6 T2 10539 T3 827
valid_sources[0x3a] 924686 1 T1 6 T2 10476 T3 999
valid_sources[0x3b] 453378 1 T1 12 T2 10147 T3 968
valid_sources[0x3c] 453960 1 T1 4 T2 10466 T3 738
valid_sources[0x3d] 456747 1 T1 9 T2 10325 T3 855
valid_sources[0x3e] 454873 1 T1 7 T2 10418 T3 738
valid_sources[0x3f] 448697 1 T1 15 T2 10425 T3 896
valid_sources[0x40] 454169 1 T1 9 T2 10132 T3 780
valid_sources[0x41] 452799 1 T1 14 T2 10320 T3 1015
valid_sources[0x42] 452281 1 T1 11 T2 10363 T3 745
valid_sources[0x43] 450041 1 T1 3 T2 10145 T3 1084
valid_sources[0x44] 452776 1 T1 5 T2 10220 T3 810
valid_sources[0x45] 453423 1 T1 8 T2 10413 T3 816
valid_sources[0x46] 497521 1 T1 13 T2 10322 T3 867
valid_sources[0x47] 449094 1 T1 7 T2 10563 T3 814
valid_sources[0x48] 455045 1 T1 8 T2 10716 T3 812
valid_sources[0x49] 682982 1 T1 11 T2 10441 T3 865
valid_sources[0x4a] 451723 1 T1 5 T2 10365 T3 868
valid_sources[0x4b] 450919 1 T1 17 T2 10459 T3 693
valid_sources[0x4c] 500357 1 T1 10 T2 10410 T3 738
valid_sources[0x4d] 453300 1 T1 11 T2 10600 T3 595
valid_sources[0x4e] 454191 1 T1 9 T2 10585 T3 774
valid_sources[0x4f] 453505 1 T1 11 T2 10295 T3 810
valid_sources[0x50] 462214 1 T1 4 T2 10364 T3 826
valid_sources[0x51] 450390 1 T1 8 T2 10545 T3 888
valid_sources[0x52] 455835 1 T1 9 T2 10426 T3 982
valid_sources[0x53] 451546 1 T1 11 T2 10021 T3 1049
valid_sources[0x54] 450377 1 T1 10 T2 10080 T3 887
valid_sources[0x55] 452807 1 T1 6 T2 10569 T3 799
valid_sources[0x56] 454416 1 T1 15 T2 10498 T3 851
valid_sources[0x57] 454546 1 T1 8 T2 10006 T3 916
valid_sources[0x58] 452340 1 T1 5 T2 10153 T3 763
valid_sources[0x59] 452493 1 T1 5 T2 10382 T3 772
valid_sources[0x5a] 497612 1 T1 3 T2 10779 T3 751
valid_sources[0x5b] 770351 1 T1 10 T2 10880 T3 929
valid_sources[0x5c] 457266 1 T1 7 T2 10576 T3 769
valid_sources[0x5d] 450265 1 T1 10 T2 10319 T3 868
valid_sources[0x5e] 453068 1 T1 13 T2 10303 T3 854
valid_sources[0x5f] 2385676 1 T1 11 T2 10246 T3 819
valid_sources[0x60] 452810 1 T1 9 T2 10499 T3 850
valid_sources[0x61] 452666 1 T1 10 T2 10230 T3 1003
valid_sources[0x62] 453945 1 T1 11 T2 10179 T3 800
valid_sources[0x63] 451050 1 T1 7 T2 10158 T3 777
valid_sources[0x64] 453323 1 T1 7 T2 10478 T3 852
valid_sources[0x65] 451156 1 T1 2 T2 10410 T3 726
valid_sources[0x66] 453283 1 T1 5 T2 10369 T3 708
valid_sources[0x67] 464832 1 T1 7 T2 10475 T3 840
valid_sources[0x68] 470675 1 T1 14 T2 10261 T3 747
valid_sources[0x69] 2374146 1 T1 5 T2 10496 T3 705
valid_sources[0x6a] 454087 1 T1 6 T2 10328 T3 1054
valid_sources[0x6b] 453658 1 T1 6 T2 10377 T3 882
valid_sources[0x6c] 456754 1 T1 11 T2 10336 T3 898
valid_sources[0x6d] 450787 1 T1 8 T2 10284 T3 855
valid_sources[0x6e] 459442 1 T1 7 T2 10269 T3 920
valid_sources[0x6f] 496505 1 T1 12 T2 10090 T3 820
valid_sources[0x70] 455236 1 T1 9 T2 10868 T3 706
valid_sources[0x71] 585918 1 T1 8 T2 10410 T3 681
valid_sources[0x72] 454160 1 T1 6 T2 10452 T3 1016
valid_sources[0x73] 454425 1 T1 14 T2 10308 T3 904
valid_sources[0x74] 465967 1 T1 6 T2 10346 T3 849
valid_sources[0x75] 459695 1 T1 13 T2 10342 T3 849
valid_sources[0x76] 450164 1 T1 15 T2 10248 T3 782
valid_sources[0x77] 453805 1 T1 9 T2 10679 T3 910
valid_sources[0x78] 453158 1 T1 12 T2 10306 T3 834
valid_sources[0x79] 452801 1 T1 12 T2 10684 T3 857
valid_sources[0x7a] 450568 1 T1 5 T2 10213 T3 858
valid_sources[0x7b] 453609 1 T1 11 T2 10390 T3 775
valid_sources[0x7c] 711505 1 T1 8 T2 10400 T3 880
valid_sources[0x7d] 452847 1 T1 7 T2 10548 T3 738
valid_sources[0x7e] 455001 1 T1 7 T2 10467 T3 862
valid_sources[0x7f] 454393 1 T1 12 T2 10339 T3 883
valid_sources[0x80] 454027 1 T1 8 T2 10322 T3 966



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 70934092 1 T1 1134 T2 133219 T3 107889
values[0x0] all_enables biggest_size 471748 1 T1 6 T2 9 T3 17
values[0x1] all_enables biggest_size 472579 1 T1 5 T2 10 T3 19

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%