Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67945740	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	69357595	1		T1	9974		T2	17444		T3	10376

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	136071561	1		T1	19635		T2	34853		T3	20659
values[0x0]	584781	1		T1	98		T2	17		T3	26
values[0x1]	646993	1		T1	114		T2	12		T3	25

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54260558	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	83042777	1		T1	12000		T2	21020		T3	12440

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2403650	1		T1	57		T2	160		T3	77
valid_sources[0x01]	427577	1		T1	87		T2	123		T3	81
valid_sources[0x02]	492940	1		T1	53		T2	130		T3	61
valid_sources[0x03]	427388	1		T1	75		T2	129		T3	81
valid_sources[0x04]	427860	1		T1	76		T2	144		T3	83
valid_sources[0x05]	428693	1		T1	84		T2	153		T3	87
valid_sources[0x06]	430560	1		T1	98		T2	126		T3	93
valid_sources[0x07]	429206	1		T1	57		T2	143		T3	82
valid_sources[0x08]	428789	1		T1	71		T2	136		T3	81
valid_sources[0x09]	544622	1		T1	75		T2	127		T3	75
valid_sources[0x0a]	433282	1		T1	47		T2	127		T3	87
valid_sources[0x0b]	1039122	1		T1	94		T2	147		T3	83
valid_sources[0x0c]	1117954	1		T1	79		T2	141		T3	69
valid_sources[0x0d]	490002	1		T1	66		T2	135		T3	81
valid_sources[0x0e]	427433	1		T1	96		T2	129		T3	81
valid_sources[0x0f]	427778	1		T1	80		T2	126		T3	76
valid_sources[0x10]	769836	1		T1	68		T2	170		T3	78
valid_sources[0x11]	427991	1		T1	76		T2	113		T3	105
valid_sources[0x12]	427946	1		T1	92		T2	170		T3	75
valid_sources[0x13]	433117	1		T1	76		T2	128		T3	75
valid_sources[0x14]	429878	1		T1	54		T2	129		T3	79
valid_sources[0x15]	1206058	1		T1	71		T2	153		T3	74
valid_sources[0x16]	426996	1		T1	82		T2	148		T3	77
valid_sources[0x17]	513213	1		T1	48		T2	149		T3	84
valid_sources[0x18]	461343	1		T1	71		T2	148		T3	75
valid_sources[0x19]	686371	1		T1	97		T2	163		T3	78
valid_sources[0x1a]	429301	1		T1	66		T2	128		T3	74
valid_sources[0x1b]	431629	1		T1	57		T2	126		T3	79
valid_sources[0x1c]	426997	1		T1	81		T2	134		T3	93
valid_sources[0x1d]	726365	1		T1	75		T2	140		T3	87
valid_sources[0x1e]	950054	1		T1	45		T2	136		T3	85
valid_sources[0x1f]	427153	1		T1	87		T2	148		T3	87
valid_sources[0x20]	424091	1		T1	65		T2	135		T3	81
valid_sources[0x21]	430147	1		T1	91		T2	142		T3	87
valid_sources[0x22]	532384	1		T1	72		T2	128		T3	88
valid_sources[0x23]	428857	1		T1	89		T2	141		T3	79
valid_sources[0x24]	433670	1		T1	85		T2	146		T3	82
valid_sources[0x25]	429859	1		T1	90		T2	115		T3	85
valid_sources[0x26]	427959	1		T1	68		T2	105		T3	64
valid_sources[0x27]	432753	1		T1	69		T2	156		T3	92
valid_sources[0x28]	428738	1		T1	67		T2	130		T3	77
valid_sources[0x29]	461136	1		T1	69		T2	125		T3	65
valid_sources[0x2a]	428975	1		T1	49		T2	123		T3	84
valid_sources[0x2b]	428316	1		T1	62		T2	143		T3	82
valid_sources[0x2c]	429152	1		T1	105		T2	124		T3	95
valid_sources[0x2d]	443435	1		T1	71		T2	131		T3	72
valid_sources[0x2e]	431770	1		T1	85		T2	153		T3	83
valid_sources[0x2f]	428729	1		T1	94		T2	150		T3	80
valid_sources[0x30]	556597	1		T1	76		T2	145		T3	96
valid_sources[0x31]	430946	1		T1	78		T2	134		T3	56
valid_sources[0x32]	449198	1		T1	50		T2	149		T3	69
valid_sources[0x33]	629226	1		T1	71		T2	145		T3	67
valid_sources[0x34]	439504	1		T1	79		T2	155		T3	73
valid_sources[0x35]	424979	1		T1	114		T2	159		T3	70
valid_sources[0x36]	997106	1		T1	73		T2	120		T3	87
valid_sources[0x37]	428412	1		T1	91		T2	143		T3	71
valid_sources[0x38]	431758	1		T1	78		T2	129		T3	78
valid_sources[0x39]	429211	1		T1	113		T2	128		T3	74
valid_sources[0x3a]	429091	1		T1	47		T2	135		T3	93
valid_sources[0x3b]	425978	1		T1	79		T2	167		T3	91
valid_sources[0x3c]	1150027	1		T1	53		T2	142		T3	86
valid_sources[0x3d]	430860	1		T1	88		T2	112		T3	66
valid_sources[0x3e]	988055	1		T1	72		T2	165		T3	97
valid_sources[0x3f]	427241	1		T1	64		T2	135		T3	79
valid_sources[0x40]	426667	1		T1	53		T2	140		T3	85
valid_sources[0x41]	426903	1		T1	90		T2	147		T3	87
valid_sources[0x42]	428007	1		T1	102		T2	144		T3	80
valid_sources[0x43]	464054	1		T1	53		T2	106		T3	94
valid_sources[0x44]	429979	1		T1	100		T2	156		T3	84
valid_sources[0x45]	430171	1		T1	81		T2	129		T3	74
valid_sources[0x46]	429050	1		T1	79		T2	134		T3	99
valid_sources[0x47]	1015777	1		T1	78		T2	131		T3	77
valid_sources[0x48]	427935	1		T1	84		T2	130		T3	77
valid_sources[0x49]	430165	1		T1	73		T2	123		T3	88
valid_sources[0x4a]	458917	1		T1	62		T2	141		T3	80
valid_sources[0x4b]	428685	1		T1	62		T2	150		T3	99
valid_sources[0x4c]	427874	1		T1	65		T2	113		T3	87
valid_sources[0x4d]	431139	1		T1	74		T2	145		T3	69
valid_sources[0x4e]	692339	1		T1	58		T2	132		T3	65
valid_sources[0x4f]	538092	1		T1	86		T2	146		T3	60
valid_sources[0x50]	429454	1		T1	60		T2	120		T3	87
valid_sources[0x51]	426935	1		T1	121		T2	168		T3	78
valid_sources[0x52]	2492878	1		T1	67		T2	120		T3	85
valid_sources[0x53]	427136	1		T1	71		T2	125		T3	109
valid_sources[0x54]	457295	1		T1	81		T2	133		T3	76
valid_sources[0x55]	429116	1		T1	82		T2	141		T3	61
valid_sources[0x56]	429622	1		T1	87		T2	139		T3	65
valid_sources[0x57]	426594	1		T1	76		T2	127		T3	70
valid_sources[0x58]	429258	1		T1	57		T2	153		T3	81
valid_sources[0x59]	427218	1		T1	76		T2	121		T3	83
valid_sources[0x5a]	428701	1		T1	89		T2	116		T3	74
valid_sources[0x5b]	426096	1		T1	61		T2	133		T3	88
valid_sources[0x5c]	424477	1		T1	92		T2	164		T3	88
valid_sources[0x5d]	426603	1		T1	100		T2	125		T3	71
valid_sources[0x5e]	937835	1		T1	97		T2	141		T3	88
valid_sources[0x5f]	429142	1		T1	104		T2	125		T3	84
valid_sources[0x60]	429372	1		T1	103		T2	123		T3	71
valid_sources[0x61]	427702	1		T1	65		T2	120		T3	74
valid_sources[0x62]	448712	1		T1	72		T2	152		T3	74
valid_sources[0x63]	426893	1		T1	73		T2	156		T3	88
valid_sources[0x64]	426938	1		T1	70		T2	162		T3	65
valid_sources[0x65]	471191	1		T1	102		T2	123		T3	72
valid_sources[0x66]	427655	1		T1	90		T2	135		T3	86
valid_sources[0x67]	903770	1		T1	48		T2	136		T3	85
valid_sources[0x68]	430898	1		T1	85		T2	123		T3	87
valid_sources[0x69]	430358	1		T1	71		T2	152		T3	96
valid_sources[0x6a]	1880907	1		T1	88		T2	136		T3	103
valid_sources[0x6b]	549109	1		T1	88		T2	125		T3	95
valid_sources[0x6c]	425337	1		T1	62		T2	135		T3	77
valid_sources[0x6d]	428504	1		T1	111		T2	117		T3	77
valid_sources[0x6e]	427466	1		T1	96		T2	168		T3	76
valid_sources[0x6f]	1490140	1		T1	98		T2	184		T3	68
valid_sources[0x70]	483581	1		T1	104		T2	158		T3	105
valid_sources[0x71]	426429	1		T1	78		T2	130		T3	92
valid_sources[0x72]	429379	1		T1	51		T2	129		T3	67
valid_sources[0x73]	428966	1		T1	81		T2	116		T3	62
valid_sources[0x74]	429381	1		T1	80		T2	149		T3	92
valid_sources[0x75]	428961	1		T1	66		T2	131		T3	87
valid_sources[0x76]	429876	1		T1	83		T2	169		T3	86
valid_sources[0x77]	426544	1		T1	71		T2	138		T3	102
valid_sources[0x78]	428792	1		T1	70		T2	130		T3	89
valid_sources[0x79]	428431	1		T1	52		T2	148		T3	88
valid_sources[0x7a]	424253	1		T1	83		T2	132		T3	99
valid_sources[0x7b]	428288	1		T1	77		T2	135		T3	82
valid_sources[0x7c]	473645	1		T1	73		T2	117		T3	81
valid_sources[0x7d]	427471	1		T1	86		T2	137		T3	76
valid_sources[0x7e]	644231	1		T1	81		T2	120		T3	66
valid_sources[0x7f]	424913	1		T1	39		T2	106		T3	78
valid_sources[0x80]	426264	1		T1	94		T2	106		T3	66

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

68210876

1

T1

9862

T2

17422

T3

10336

values[0x0]

all_enables

biggest_size

573663

1

T1

61

T2

12

T3

21

values[0x1]

all_enables

biggest_size

573056

1

T1

51

T2

10

T3

19