Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69749192	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	71508894	1		T1	5233		T2	98922		T3	21834

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	139751283	1		T1	10179		T2	197177		T3	43618
values[0x0]	715812	1		T1	26		T2	25		T3	13
values[0x1]	790991	1		T1	34		T2	23		T3	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55694758	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	85563328	1		T1	6212		T2	118827		T3	26211

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	470183	1		T2	745		T3	168		T4	1181
valid_sources[0x01]	465199	1		T2	911		T3	166		T4	1172
valid_sources[0x02]	467513	1		T2	735		T3	178		T4	1190
valid_sources[0x03]	467785	1		T2	800		T3	177		T4	1133
valid_sources[0x04]	492541	1		T2	711		T3	181		T4	1120
valid_sources[0x05]	467625	1		T2	750		T3	161		T4	1089
valid_sources[0x06]	470147	1		T2	894		T3	169		T4	1148
valid_sources[0x07]	471740	1		T2	790		T3	159		T4	1186
valid_sources[0x08]	2231120	1		T2	851		T3	150		T4	1152
valid_sources[0x09]	1574119	1		T2	762		T3	202		T4	1151
valid_sources[0x0a]	552045	1		T2	714		T3	178		T4	1210
valid_sources[0x0b]	463873	1		T2	765		T3	175		T4	1133
valid_sources[0x0c]	466967	1		T2	753		T3	181		T4	1115
valid_sources[0x0d]	464515	1		T2	849		T3	153		T4	1182
valid_sources[0x0e]	471642	1		T2	864		T3	164		T4	1083
valid_sources[0x0f]	463192	1		T2	859		T3	166		T4	1134
valid_sources[0x10]	465771	1		T2	890		T3	143		T4	1156
valid_sources[0x11]	470862	1		T2	751		T3	176		T4	1176
valid_sources[0x12]	466785	1		T2	836		T3	152		T4	1086
valid_sources[0x13]	471472	1		T2	755		T3	162		T4	1174
valid_sources[0x14]	468574	1		T2	721		T3	184		T4	1140
valid_sources[0x15]	469629	1		T2	744		T3	153		T4	1138
valid_sources[0x16]	463635	1		T2	725		T3	165		T4	1183
valid_sources[0x17]	466965	1		T2	713		T3	156		T4	1191
valid_sources[0x18]	466497	1		T2	767		T3	158		T4	1150
valid_sources[0x19]	471028	1		T2	720		T3	153		T4	1128
valid_sources[0x1a]	466564	1		T2	733		T3	159		T4	1116
valid_sources[0x1b]	555469	1		T2	894		T3	184		T4	1178
valid_sources[0x1c]	469119	1		T2	783		T3	182		T4	1083
valid_sources[0x1d]	503471	1		T2	700		T3	178		T4	1168
valid_sources[0x1e]	472999	1		T2	774		T3	177		T4	1144
valid_sources[0x1f]	465847	1		T2	849		T3	177		T4	1169
valid_sources[0x20]	469108	1		T2	827		T3	161		T4	1201
valid_sources[0x21]	471574	1		T2	703		T3	176		T4	1196
valid_sources[0x22]	483743	1		T2	821		T3	170		T4	1210
valid_sources[0x23]	500261	1		T2	727		T3	156		T4	1157
valid_sources[0x24]	467899	1		T2	715		T3	174		T4	1103
valid_sources[0x25]	472422	1		T2	824		T3	167		T4	1205
valid_sources[0x26]	463885	1		T2	759		T3	159		T4	1179
valid_sources[0x27]	478727	1		T2	724		T3	163		T4	1131
valid_sources[0x28]	468718	1		T2	840		T3	147		T4	1194
valid_sources[0x29]	485062	1		T2	787		T3	179		T4	1136
valid_sources[0x2a]	469940	1		T2	691		T3	181		T4	1214
valid_sources[0x2b]	468933	1		T2	743		T3	217		T4	1130
valid_sources[0x2c]	515261	1		T2	760		T3	157		T4	1074
valid_sources[0x2d]	772460	1		T2	762		T3	162		T4	1180
valid_sources[0x2e]	467274	1		T2	748		T3	175		T4	1200
valid_sources[0x2f]	469909	1		T2	758		T3	191		T4	1130
valid_sources[0x30]	461826	1		T2	853		T3	193		T4	1157
valid_sources[0x31]	469151	1		T2	916		T3	151		T4	1181
valid_sources[0x32]	467828	1		T2	763		T3	168		T4	1179
valid_sources[0x33]	466544	1		T2	719		T3	156		T4	1127
valid_sources[0x34]	1306364	1		T2	786		T3	173		T4	1128
valid_sources[0x35]	507101	1		T2	803		T3	197		T4	1140
valid_sources[0x36]	467629	1		T2	807		T3	182		T4	1129
valid_sources[0x37]	464934	1		T2	656		T3	185		T4	1090
valid_sources[0x38]	492064	1		T2	737		T3	173		T4	1159
valid_sources[0x39]	490814	1		T2	676		T3	172		T4	1170
valid_sources[0x3a]	466173	1		T2	840		T3	166		T4	1147
valid_sources[0x3b]	470652	1		T2	815		T3	166		T4	1134
valid_sources[0x3c]	465003	1		T2	754		T3	170		T4	1137
valid_sources[0x3d]	468738	1		T2	723		T3	204		T4	1181
valid_sources[0x3e]	467894	1		T2	723		T3	171		T4	1138
valid_sources[0x3f]	3715193	1		T2	782		T3	168		T4	1131
valid_sources[0x40]	465316	1		T2	765		T3	171		T4	1154
valid_sources[0x41]	468380	1		T2	712		T3	179		T4	1187
valid_sources[0x42]	468972	1		T2	638		T3	183		T4	1123
valid_sources[0x43]	465494	1		T2	758		T3	140		T4	1136
valid_sources[0x44]	469150	1		T2	860		T3	182		T4	1121
valid_sources[0x45]	466854	1		T2	800		T3	174		T4	1169
valid_sources[0x46]	467613	1		T2	696		T3	170		T4	1144
valid_sources[0x47]	465598	1		T2	719		T3	180		T4	1087
valid_sources[0x48]	463529	1		T2	831		T3	179		T4	1159
valid_sources[0x49]	465812	1		T2	809		T3	182		T4	1207
valid_sources[0x4a]	466250	1		T2	631		T3	178		T4	1185
valid_sources[0x4b]	466939	1		T2	729		T3	175		T4	1110
valid_sources[0x4c]	467349	1		T2	702		T3	187		T4	1176
valid_sources[0x4d]	464139	1		T2	753		T3	191		T4	1180
valid_sources[0x4e]	465248	1		T2	793		T3	198		T4	1125
valid_sources[0x4f]	466208	1		T2	743		T3	170		T4	1129
valid_sources[0x50]	464540	1		T2	699		T3	159		T4	1119
valid_sources[0x51]	464784	1		T2	675		T3	180		T4	1126
valid_sources[0x52]	464662	1		T2	865		T3	154		T4	1151
valid_sources[0x53]	465785	1		T2	836		T3	163		T4	1105
valid_sources[0x54]	463741	1		T2	686		T3	161		T4	1133
valid_sources[0x55]	468128	1		T2	787		T3	180		T4	1152
valid_sources[0x56]	464777	1		T2	884		T3	173		T4	1125
valid_sources[0x57]	469595	1		T2	785		T3	177		T4	1166
valid_sources[0x58]	465907	1		T2	750		T3	171		T4	1170
valid_sources[0x59]	467133	1		T2	736		T3	196		T4	1138
valid_sources[0x5a]	467726	1		T2	727		T3	203		T4	1157
valid_sources[0x5b]	469379	1		T2	766		T3	169		T4	1159
valid_sources[0x5c]	469092	1		T2	672		T3	164		T4	1182
valid_sources[0x5d]	468271	1		T2	757		T3	170		T4	1151
valid_sources[0x5e]	512324	1		T2	819		T3	156		T4	1170
valid_sources[0x5f]	469767	1		T2	746		T3	168		T4	1111
valid_sources[0x60]	470440	1		T2	768		T3	196		T4	1222
valid_sources[0x61]	468758	1		T2	833		T3	166		T4	1108
valid_sources[0x62]	466113	1		T2	815		T3	184		T4	1147
valid_sources[0x63]	468075	1		T2	775		T3	158		T4	1131
valid_sources[0x64]	467982	1		T2	694		T3	192		T4	1190
valid_sources[0x65]	469284	1		T2	892		T3	152		T4	1120
valid_sources[0x66]	468186	1		T2	735		T3	169		T4	1147
valid_sources[0x67]	466353	1		T2	736		T3	167		T4	1198
valid_sources[0x68]	489003	1		T2	801		T3	171		T4	1119
valid_sources[0x69]	468836	1		T2	687		T3	185		T4	1069
valid_sources[0x6a]	470743	1		T2	689		T3	172		T4	1141
valid_sources[0x6b]	463870	1		T2	724		T3	159		T4	1122
valid_sources[0x6c]	463078	1		T2	680		T3	162		T4	1108
valid_sources[0x6d]	466240	1		T2	768		T3	197		T4	1108
valid_sources[0x6e]	478718	1		T1	10239		T2	922		T3	160
valid_sources[0x6f]	471471	1		T2	739		T3	175		T4	1192
valid_sources[0x70]	1229261	1		T2	792		T3	165		T4	1115
valid_sources[0x71]	538936	1		T2	724		T3	175		T4	1177
valid_sources[0x72]	483450	1		T2	729		T3	162		T4	1165
valid_sources[0x73]	468592	1		T2	788		T3	158		T4	1210
valid_sources[0x74]	625171	1		T2	800		T3	158		T4	1142
valid_sources[0x75]	469065	1		T2	785		T3	154		T4	1115
valid_sources[0x76]	788913	1		T2	742		T3	188		T4	1110
valid_sources[0x77]	468190	1		T2	753		T3	170		T4	1156
valid_sources[0x78]	469197	1		T2	766		T3	159		T4	1082
valid_sources[0x79]	467913	1		T2	805		T3	177		T4	1121
valid_sources[0x7a]	470005	1		T2	794		T3	193		T4	1097
valid_sources[0x7b]	469133	1		T2	787		T3	179		T4	1099
valid_sources[0x7c]	467250	1		T2	751		T3	151		T4	1119
valid_sources[0x7d]	467632	1		T2	782		T3	201		T4	1074
valid_sources[0x7e]	1433808	1		T2	777		T3	159		T4	1093
valid_sources[0x7f]	465117	1		T2	847		T3	188		T4	1112
valid_sources[0x80]	902444	1		T2	739		T3	176		T4	1184

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70103681

1

T1

5194

T2

98889

T3

21819

values[0x0]

all_enables

biggest_size

703018

1

T1

19

T2

18

T3

12

values[0x1]

all_enables

biggest_size

702195

1

T1

20

T2

15

T3

3