Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	72197808	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	73892301	1		T1	224031		T2	28124		T3	86762

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	144639191	1		T1	448979		T2	56320		T3	173909
values[0x0]	690046	1		T1	21		T2	10		T3	39
values[0x1]	760872	1		T1	30		T2	11		T3	45

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57658388	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	88431721	1		T1	269006		T2	33759		T3	104348

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	380528	1		T1	1729		T2	222		T3	696
valid_sources[0x01]	861959	1		T1	1730		T2	217		T3	700
valid_sources[0x02]	369704	1		T1	1738		T2	232		T3	685
valid_sources[0x03]	376307	1		T1	1772		T2	226		T3	670
valid_sources[0x04]	437238	1		T1	1759		T2	243		T3	732
valid_sources[0x05]	374831	1		T1	1769		T2	235		T3	689
valid_sources[0x06]	377939	1		T1	1747		T2	251		T3	697
valid_sources[0x07]	375343	1		T1	1806		T2	227		T3	670
valid_sources[0x08]	1304167	1		T1	1738		T2	223		T3	736
valid_sources[0x09]	370462	1		T1	1832		T2	214		T3	684
valid_sources[0x0a]	372952	1		T1	1719		T2	217		T3	671
valid_sources[0x0b]	374162	1		T1	1699		T2	211		T3	712
valid_sources[0x0c]	375060	1		T1	1728		T2	205		T3	692
valid_sources[0x0d]	405930	1		T1	1700		T2	240		T3	703
valid_sources[0x0e]	1756623	1		T1	1773		T2	220		T3	637
valid_sources[0x0f]	375389	1		T1	1769		T2	210		T3	649
valid_sources[0x10]	372419	1		T1	1663		T2	241		T3	705
valid_sources[0x11]	375627	1		T1	1782		T2	212		T3	695
valid_sources[0x12]	380567	1		T1	1779		T2	211		T3	674
valid_sources[0x13]	372807	1		T1	1708		T2	214		T3	660
valid_sources[0x14]	2720824	1		T1	1721		T2	228		T3	676
valid_sources[0x15]	4878061	1		T1	1709		T2	205		T3	625
valid_sources[0x16]	380162	1		T1	1731		T2	242		T3	697
valid_sources[0x17]	375241	1		T1	1777		T2	200		T3	685
valid_sources[0x18]	833074	1		T1	1759		T2	210		T3	732
valid_sources[0x19]	374852	1		T1	1817		T2	207		T3	670
valid_sources[0x1a]	377253	1		T1	1784		T2	218		T3	657
valid_sources[0x1b]	369392	1		T1	1723		T2	214		T3	682
valid_sources[0x1c]	917930	1		T1	1788		T2	242		T3	653
valid_sources[0x1d]	374088	1		T1	1753		T2	192		T3	619
valid_sources[0x1e]	375787	1		T1	1741		T2	239		T3	726
valid_sources[0x1f]	393368	1		T1	1755		T2	223		T3	666
valid_sources[0x20]	372817	1		T1	1790		T2	242		T3	697
valid_sources[0x21]	374947	1		T1	1707		T2	219		T3	649
valid_sources[0x22]	414319	1		T1	1711		T2	173		T3	690
valid_sources[0x23]	375758	1		T1	1819		T2	221		T3	698
valid_sources[0x24]	395840	1		T1	1800		T2	223		T3	698
valid_sources[0x25]	520363	1		T1	1753		T2	226		T3	671
valid_sources[0x26]	372258	1		T1	1761		T2	241		T3	660
valid_sources[0x27]	373950	1		T1	1828		T2	204		T3	646
valid_sources[0x28]	376524	1		T1	1732		T2	204		T3	680
valid_sources[0x29]	374283	1		T1	1737		T2	172		T3	661
valid_sources[0x2a]	381145	1		T1	1781		T2	229		T3	662
valid_sources[0x2b]	2619237	1		T1	1765		T2	223		T3	680
valid_sources[0x2c]	373434	1		T1	1785		T2	208		T3	692
valid_sources[0x2d]	375146	1		T1	1746		T2	209		T3	652
valid_sources[0x2e]	377360	1		T1	1730		T2	251		T3	711
valid_sources[0x2f]	372771	1		T1	1855		T2	206		T3	713
valid_sources[0x30]	374531	1		T1	1775		T2	208		T3	675
valid_sources[0x31]	379438	1		T1	1713		T2	216		T3	677
valid_sources[0x32]	429449	1		T1	1754		T2	255		T3	673
valid_sources[0x33]	374835	1		T1	1728		T2	194		T3	675
valid_sources[0x34]	374854	1		T1	1763		T2	203		T3	630
valid_sources[0x35]	376257	1		T1	1793		T2	244		T3	687
valid_sources[0x36]	376348	1		T1	1816		T2	214		T3	670
valid_sources[0x37]	375733	1		T1	1783		T2	223		T3	653
valid_sources[0x38]	375748	1		T1	1779		T2	221		T3	719
valid_sources[0x39]	405815	1		T1	1780		T2	228		T3	717
valid_sources[0x3a]	389571	1		T1	1776		T2	201		T3	638
valid_sources[0x3b]	377240	1		T1	1718		T2	192		T3	638
valid_sources[0x3c]	379997	1		T1	1805		T2	247		T3	675
valid_sources[0x3d]	377531	1		T1	1788		T2	234		T3	626
valid_sources[0x3e]	458884	1		T1	1788		T2	255		T3	653
valid_sources[0x3f]	376163	1		T1	1796		T2	224		T3	688
valid_sources[0x40]	710584	1		T1	1745		T2	224		T3	702
valid_sources[0x41]	389698	1		T1	1717		T2	216		T3	680
valid_sources[0x42]	372194	1		T1	1704		T2	212		T3	733
valid_sources[0x43]	1106484	1		T1	1837		T2	256		T3	715
valid_sources[0x44]	374245	1		T1	1701		T2	226		T3	710
valid_sources[0x45]	1285550	1		T1	1794		T2	205		T3	619
valid_sources[0x46]	374284	1		T1	1774		T2	243		T3	669
valid_sources[0x47]	377650	1		T1	1744		T2	196		T3	686
valid_sources[0x48]	373970	1		T1	1840		T2	198		T3	635
valid_sources[0x49]	373861	1		T1	1785		T2	229		T3	715
valid_sources[0x4a]	377613	1		T1	1800		T2	187		T3	658
valid_sources[0x4b]	376067	1		T1	1793		T2	220		T3	642
valid_sources[0x4c]	372715	1		T1	1806		T2	211		T3	676
valid_sources[0x4d]	379085	1		T1	1809		T2	233		T3	693
valid_sources[0x4e]	373068	1		T1	1797		T2	196		T3	697
valid_sources[0x4f]	374319	1		T1	1755		T2	232		T3	674
valid_sources[0x50]	376544	1		T1	1764		T2	189		T3	688
valid_sources[0x51]	1221083	1		T1	1766		T2	214		T3	706
valid_sources[0x52]	373510	1		T1	1745		T2	223		T3	689
valid_sources[0x53]	373949	1		T1	1723		T2	199		T3	685
valid_sources[0x54]	375855	1		T1	1839		T2	240		T3	738
valid_sources[0x55]	374062	1		T1	1756		T2	265		T3	684
valid_sources[0x56]	376103	1		T1	1684		T2	232		T3	635
valid_sources[0x57]	373283	1		T1	1800		T2	253		T3	643
valid_sources[0x58]	1491497	1		T1	1724		T2	259		T3	705
valid_sources[0x59]	658771	1		T1	1814		T2	259		T3	638
valid_sources[0x5a]	387436	1		T1	1723		T2	242		T3	642
valid_sources[0x5b]	427526	1		T1	1744		T2	231		T3	695
valid_sources[0x5c]	378569	1		T1	1804		T2	229		T3	746
valid_sources[0x5d]	374250	1		T1	1714		T2	227		T3	680
valid_sources[0x5e]	375688	1		T1	1757		T2	216		T3	678
valid_sources[0x5f]	409998	1		T1	1750		T2	188		T3	696
valid_sources[0x60]	377826	1		T1	1734		T2	212		T3	677
valid_sources[0x61]	372426	1		T1	1768		T2	240		T3	690
valid_sources[0x62]	441100	1		T1	1829		T2	213		T3	676
valid_sources[0x63]	375934	1		T1	1730		T2	216		T3	646
valid_sources[0x64]	434818	1		T1	1705		T2	249		T3	709
valid_sources[0x65]	609293	1		T1	1806		T2	243		T3	669
valid_sources[0x66]	376818	1		T1	1763		T2	215		T3	669
valid_sources[0x67]	2187395	1		T1	1698		T2	209		T3	687
valid_sources[0x68]	375018	1		T1	1807		T2	210		T3	669
valid_sources[0x69]	376610	1		T1	1773		T2	247		T3	640
valid_sources[0x6a]	372684	1		T1	1845		T2	219		T3	712
valid_sources[0x6b]	372526	1		T1	1754		T2	259		T3	701
valid_sources[0x6c]	377868	1		T1	1716		T2	204		T3	638
valid_sources[0x6d]	371966	1		T1	1659		T2	226		T3	694
valid_sources[0x6e]	376339	1		T1	1817		T2	211		T3	687
valid_sources[0x6f]	603543	1		T1	1777		T2	226		T3	672
valid_sources[0x70]	381122	1		T1	1836		T2	226		T3	669
valid_sources[0x71]	375672	1		T1	1752		T2	214		T3	702
valid_sources[0x72]	373828	1		T1	1683		T2	232		T3	647
valid_sources[0x73]	577654	1		T1	1689		T2	212		T3	662
valid_sources[0x74]	375877	1		T1	1728		T2	237		T3	666
valid_sources[0x75]	376172	1		T1	1763		T2	212		T3	661
valid_sources[0x76]	470382	1		T1	1752		T2	230		T3	670
valid_sources[0x77]	2798610	1		T1	1631		T2	224		T3	644
valid_sources[0x78]	4236114	1		T1	1645		T2	238		T3	720
valid_sources[0x79]	512360	1		T1	1705		T2	204		T3	634
valid_sources[0x7a]	374185	1		T1	1693		T2	211		T3	692
valid_sources[0x7b]	371496	1		T1	1681		T2	190		T3	626
valid_sources[0x7c]	370444	1		T1	1759		T2	228		T3	642
valid_sources[0x7d]	375110	1		T1	1718		T2	233		T3	666
valid_sources[0x7e]	503323	1		T1	1690		T2	203		T3	669
valid_sources[0x7f]	373465	1		T1	1769		T2	207		T3	698
valid_sources[0x80]	372724	1		T1	1778		T2	234		T3	717

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

72538678

1

T1

223995

T2

28109

T3

86686

values[0x0]

all_enables

biggest_size

677875

1

T1

17

T2

6

T3

37

values[0x1]

all_enables

biggest_size

675748

1

T1

19

T2

9

T3

39