Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	75749661	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	77561122	1		T1	4205		T2	54850		T3	5671

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	151746378	1		T1	8446		T2	109732		T3	11461
values[0x0]	742648	1		T1	18		T2	25		T3	6
values[0x1]	821757	1		T1	22		T2	21		T3	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	60482448	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	92828335	1		T1	5102		T2	65968		T3	6875

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	477100	1		T1	29		T2	455		T5	2565
valid_sources[0x01]	638796	1		T1	31		T2	414		T5	2826
valid_sources[0x02]	494715	1		T1	32		T2	436		T5	2506
valid_sources[0x03]	472356	1		T1	32		T2	457		T5	2421
valid_sources[0x04]	473684	1		T1	31		T2	420		T5	2609
valid_sources[0x05]	2070694	1		T1	35		T2	445		T5	2532
valid_sources[0x06]	476508	1		T1	41		T2	422		T5	2448
valid_sources[0x07]	472722	1		T1	39		T2	465		T5	2415
valid_sources[0x08]	488126	1		T1	29		T2	416		T5	2615
valid_sources[0x09]	1454240	1		T1	24		T2	421		T5	2537
valid_sources[0x0a]	472566	1		T1	34		T2	435		T5	2520
valid_sources[0x0b]	469565	1		T1	37		T2	412		T5	2502
valid_sources[0x0c]	474277	1		T1	25		T2	431		T5	2515
valid_sources[0x0d]	470030	1		T1	29		T2	395		T5	2522
valid_sources[0x0e]	935252	1		T1	37		T2	390		T5	2396
valid_sources[0x0f]	471042	1		T1	27		T2	467		T5	2652
valid_sources[0x10]	474021	1		T1	30		T2	443		T5	2796
valid_sources[0x11]	470291	1		T1	34		T2	425		T5	2421
valid_sources[0x12]	477767	1		T1	39		T2	426		T5	2465
valid_sources[0x13]	473171	1		T1	35		T2	426		T5	2464
valid_sources[0x14]	479705	1		T1	31		T2	454		T5	2582
valid_sources[0x15]	475335	1		T1	37		T2	402		T5	2600
valid_sources[0x16]	492900	1		T1	35		T2	449		T5	2439
valid_sources[0x17]	473185	1		T1	39		T2	391		T5	2468
valid_sources[0x18]	473115	1		T1	35		T2	412		T5	2262
valid_sources[0x19]	782077	1		T1	44		T2	397		T5	2626
valid_sources[0x1a]	483947	1		T1	42		T2	477		T5	2422
valid_sources[0x1b]	489737	1		T1	31		T2	433		T5	2538
valid_sources[0x1c]	473265	1		T1	24		T2	410		T5	2552
valid_sources[0x1d]	966584	1		T1	41		T2	429		T5	2749
valid_sources[0x1e]	476624	1		T1	29		T2	449		T5	2523
valid_sources[0x1f]	476665	1		T1	32		T2	411		T5	2516
valid_sources[0x20]	474628	1		T1	37		T2	428		T5	2427
valid_sources[0x21]	474105	1		T1	27		T2	437		T5	2506
valid_sources[0x22]	471775	1		T1	34		T2	422		T5	2586
valid_sources[0x23]	473750	1		T1	44		T2	417		T5	2360
valid_sources[0x24]	471470	1		T1	36		T2	429		T5	2541
valid_sources[0x25]	473840	1		T1	33		T2	447		T5	2608
valid_sources[0x26]	687520	1		T1	26		T2	397		T5	2500
valid_sources[0x27]	473201	1		T1	41		T2	423		T5	2515
valid_sources[0x28]	470491	1		T1	37		T2	399		T5	2389
valid_sources[0x29]	472188	1		T1	27		T2	460		T5	2553
valid_sources[0x2a]	474818	1		T1	31		T2	457		T5	2546
valid_sources[0x2b]	473893	1		T1	42		T2	430		T5	2571
valid_sources[0x2c]	737236	1		T1	29		T2	430		T5	2549
valid_sources[0x2d]	473853	1		T1	35		T2	438		T5	2626
valid_sources[0x2e]	474989	1		T1	29		T2	443		T5	2526
valid_sources[0x2f]	476744	1		T1	29		T2	421		T5	2491
valid_sources[0x30]	470115	1		T1	30		T2	388		T5	2596
valid_sources[0x31]	473564	1		T1	29		T2	394		T5	2604
valid_sources[0x32]	472265	1		T1	44		T2	447		T5	2507
valid_sources[0x33]	471945	1		T1	21		T2	392		T5	2613
valid_sources[0x34]	853989	1		T1	34		T2	396		T5	2655
valid_sources[0x35]	474404	1		T1	30		T2	417		T5	2481
valid_sources[0x36]	472792	1		T1	32		T2	446		T5	2498
valid_sources[0x37]	473468	1		T1	40		T2	460		T5	2517
valid_sources[0x38]	675688	1		T1	27		T2	398		T5	2489
valid_sources[0x39]	474283	1		T1	27		T2	350		T5	2469
valid_sources[0x3a]	468407	1		T1	25		T2	402		T5	2439
valid_sources[0x3b]	471929	1		T1	36		T2	436		T5	2583
valid_sources[0x3c]	470262	1		T1	33		T2	460		T5	2540
valid_sources[0x3d]	477947	1		T1	42		T2	434		T5	2330
valid_sources[0x3e]	521958	1		T1	34		T2	401		T5	2568
valid_sources[0x3f]	473591	1		T1	27		T2	370		T5	2551
valid_sources[0x40]	527439	1		T1	30		T2	420		T5	2776
valid_sources[0x41]	1405841	1		T1	22		T2	424		T5	2544
valid_sources[0x42]	559460	1		T1	26		T2	409		T5	2726
valid_sources[0x43]	473392	1		T1	25		T2	394		T5	2526
valid_sources[0x44]	473034	1		T1	41		T2	436		T5	2550
valid_sources[0x45]	963162	1		T1	35		T2	491		T5	2408
valid_sources[0x46]	2233037	1		T1	23		T2	454		T5	2487
valid_sources[0x47]	474617	1		T1	30		T2	420		T5	2407
valid_sources[0x48]	598237	1		T1	25		T2	431		T5	2559
valid_sources[0x49]	470415	1		T1	30		T2	460		T5	2431
valid_sources[0x4a]	934037	1		T1	38		T2	440		T5	2619
valid_sources[0x4b]	592152	1		T1	35		T2	419		T5	2462
valid_sources[0x4c]	475464	1		T1	31		T2	409		T5	2430
valid_sources[0x4d]	472301	1		T1	35		T2	412		T5	2486
valid_sources[0x4e]	470722	1		T1	38		T2	396		T5	2470
valid_sources[0x4f]	473181	1		T1	35		T2	403		T5	2684
valid_sources[0x50]	472313	1		T1	32		T2	435		T5	2629
valid_sources[0x51]	516470	1		T1	33		T2	421		T5	2458
valid_sources[0x52]	475064	1		T1	35		T2	400		T5	2491
valid_sources[0x53]	471137	1		T1	30		T2	440		T5	2487
valid_sources[0x54]	474103	1		T1	40		T2	441		T5	2571
valid_sources[0x55]	474067	1		T1	31		T2	421		T5	2502
valid_sources[0x56]	475755	1		T1	27		T2	453		T5	2826
valid_sources[0x57]	472504	1		T1	29		T2	419		T5	2384
valid_sources[0x58]	1753637	1		T1	36		T2	459		T5	2549
valid_sources[0x59]	472616	1		T1	39		T2	396		T5	2369
valid_sources[0x5a]	1041642	1		T1	32		T2	495		T5	2559
valid_sources[0x5b]	1254168	1		T1	28		T2	393		T5	2493
valid_sources[0x5c]	475456	1		T1	30		T2	433		T5	2497
valid_sources[0x5d]	477824	1		T1	32		T2	451		T5	2427
valid_sources[0x5e]	473305	1		T1	36		T2	407		T5	2346
valid_sources[0x5f]	473519	1		T1	33		T2	437		T5	2344
valid_sources[0x60]	473068	1		T1	29		T2	431		T5	2412
valid_sources[0x61]	472607	1		T1	29		T2	422		T5	2492
valid_sources[0x62]	866721	1		T1	39		T2	447		T5	2374
valid_sources[0x63]	473144	1		T1	36		T2	459		T5	2619
valid_sources[0x64]	472045	1		T1	44		T2	407		T5	2454
valid_sources[0x65]	525430	1		T1	32		T2	421		T5	2611
valid_sources[0x66]	474520	1		T1	30		T2	424		T5	2587
valid_sources[0x67]	471945	1		T1	26		T2	443		T5	2497
valid_sources[0x68]	475757	1		T1	25		T2	373		T5	2449
valid_sources[0x69]	479462	1		T1	28		T2	429		T5	2542
valid_sources[0x6a]	474607	1		T1	43		T2	419		T5	2528
valid_sources[0x6b]	484333	1		T1	38		T2	422		T5	2396
valid_sources[0x6c]	532288	1		T1	26		T2	424		T5	2384
valid_sources[0x6d]	470984	1		T1	40		T2	431		T5	2575
valid_sources[0x6e]	473363	1		T1	34		T2	401		T5	2428
valid_sources[0x6f]	470941	1		T1	30		T2	429		T5	2438
valid_sources[0x70]	472684	1		T1	44		T2	429		T5	2641
valid_sources[0x71]	477549	1		T1	37		T2	454		T5	2382
valid_sources[0x72]	476522	1		T1	29		T2	461		T5	2488
valid_sources[0x73]	674771	1		T1	40		T2	408		T5	2522
valid_sources[0x74]	478382	1		T1	44		T2	457		T5	2460
valid_sources[0x75]	669923	1		T1	37		T2	426		T5	2518
valid_sources[0x76]	472904	1		T1	42		T2	441		T5	2678
valid_sources[0x77]	473543	1		T1	46		T2	464		T5	2686
valid_sources[0x78]	582043	1		T1	34		T2	439		T5	2449
valid_sources[0x79]	885515	1		T1	26		T2	448		T5	2824
valid_sources[0x7a]	472375	1		T1	32		T2	428		T5	2637
valid_sources[0x7b]	471516	1		T1	32		T2	446		T5	2489
valid_sources[0x7c]	476194	1		T1	28		T2	454		T5	2532
valid_sources[0x7d]	471814	1		T1	26		T2	426		T5	2448
valid_sources[0x7e]	479077	1		T1	34		T2	417		T5	2487
valid_sources[0x7f]	471346	1		T1	42		T2	418		T5	2503
valid_sources[0x80]	472380	1		T1	32		T2	461		T5	2528

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

76102279

1

T1

4172

T2

54812

T3

5666

values[0x0]

all_enables

biggest_size

729633

1

T1

15

T2

22

T3

4

values[0x1]

all_enables

biggest_size

729210

1

T1

18

T2

16

T3

1