Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	59136893	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	60339696	1		T1	293795		T2	362		T3	13327

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	118442950	1		T1	587546		T2	732		T3	26532
values[0x0]	491731	1		T1	22		T2	13		T3	70
values[0x1]	541908	1		T1	19		T2	17		T3	79

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47226173	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	72250416	1		T1	352724		T2	436		T3	16090

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	338622	1		T1	2391		T2	3		T3	84
valid_sources[0x01]	341294	1		T1	2292		T2	5		T3	117
valid_sources[0x02]	337921	1		T1	2361		T2	2		T3	97
valid_sources[0x03]	340288	1		T1	2431		T2	2		T3	101
valid_sources[0x04]	340283	1		T1	2187		T2	4		T3	98
valid_sources[0x05]	669388	1		T1	2266		T2	7		T3	113
valid_sources[0x06]	340552	1		T1	2357		T2	5		T3	129
valid_sources[0x07]	338558	1		T1	2332		T2	2		T3	99
valid_sources[0x08]	339460	1		T1	2304		T2	6		T3	111
valid_sources[0x09]	343113	1		T1	2304		T2	4		T3	120
valid_sources[0x0a]	337426	1		T1	2352		T2	5		T3	111
valid_sources[0x0b]	370389	1		T1	2373		T2	2		T3	95
valid_sources[0x0c]	339039	1		T1	2252		T3	118		T4	400
valid_sources[0x0d]	338722	1		T1	2378		T2	4		T3	103
valid_sources[0x0e]	339522	1		T1	2277		T2	2		T3	93
valid_sources[0x0f]	3440981	1		T1	2344		T2	4		T3	104
valid_sources[0x10]	337636	1		T1	2308		T2	6		T3	98
valid_sources[0x11]	338918	1		T1	2276		T2	1		T3	113
valid_sources[0x12]	339597	1		T1	2230		T2	2		T3	102
valid_sources[0x13]	337447	1		T1	2322		T2	3		T3	117
valid_sources[0x14]	339573	1		T1	2223		T2	2		T3	92
valid_sources[0x15]	619065	1		T1	2261		T2	2		T3	126
valid_sources[0x16]	341808	1		T1	2353		T2	1		T3	81
valid_sources[0x17]	1023200	1		T1	2266		T2	4		T3	114
valid_sources[0x18]	338119	1		T1	2378		T2	4		T3	94
valid_sources[0x19]	340215	1		T1	2354		T2	5		T3	102
valid_sources[0x1a]	339504	1		T1	2274		T2	2		T3	92
valid_sources[0x1b]	337434	1		T1	2279		T2	4		T3	116
valid_sources[0x1c]	342007	1		T1	2240		T2	1		T3	134
valid_sources[0x1d]	356330	1		T1	2330		T2	4		T3	90
valid_sources[0x1e]	339191	1		T1	2335		T2	3		T3	105
valid_sources[0x1f]	368369	1		T1	2223		T2	1		T3	114
valid_sources[0x20]	358644	1		T1	2373		T2	4		T3	81
valid_sources[0x21]	337762	1		T1	2269		T2	2		T3	107
valid_sources[0x22]	1569602	1		T1	2337		T2	5		T3	84
valid_sources[0x23]	341411	1		T1	2259		T2	1		T3	79
valid_sources[0x24]	338379	1		T1	2220		T2	2		T3	139
valid_sources[0x25]	354714	1		T1	2328		T2	3		T3	82
valid_sources[0x26]	338003	1		T1	2254		T3	103		T4	311
valid_sources[0x27]	372048	1		T1	2242		T2	2		T3	83
valid_sources[0x28]	338021	1		T1	2278		T2	2		T3	114
valid_sources[0x29]	678857	1		T1	2343		T2	1		T3	156
valid_sources[0x2a]	344347	1		T1	2336		T2	1		T3	89
valid_sources[0x2b]	638438	1		T1	2263		T3	114		T4	274
valid_sources[0x2c]	339147	1		T1	2354		T2	4		T3	132
valid_sources[0x2d]	2381206	1		T1	2279		T2	5		T3	127
valid_sources[0x2e]	337151	1		T1	2352		T2	13		T3	95
valid_sources[0x2f]	340547	1		T1	2258		T2	2		T3	112
valid_sources[0x30]	359716	1		T1	2324		T2	6		T3	156
valid_sources[0x31]	338836	1		T1	2363		T3	80		T4	321
valid_sources[0x32]	937626	1		T1	2237		T2	5		T3	79
valid_sources[0x33]	337630	1		T1	2249		T3	114		T4	238
valid_sources[0x34]	340475	1		T1	2314		T2	2		T3	109
valid_sources[0x35]	370835	1		T1	2317		T2	1		T3	101
valid_sources[0x36]	341670	1		T1	2232		T2	4		T3	124
valid_sources[0x37]	341070	1		T1	2235		T2	2		T3	115
valid_sources[0x38]	1120041	1		T1	2337		T2	2		T3	98
valid_sources[0x39]	340790	1		T1	2300		T2	1		T3	99
valid_sources[0x3a]	338739	1		T1	2287		T2	5		T3	96
valid_sources[0x3b]	340039	1		T1	2265		T3	102		T4	266
valid_sources[0x3c]	338842	1		T1	2247		T2	4		T3	114
valid_sources[0x3d]	855079	1		T1	2294		T2	3		T3	110
valid_sources[0x3e]	339748	1		T1	2257		T2	4		T3	101
valid_sources[0x3f]	411707	1		T1	2334		T2	5		T3	96
valid_sources[0x40]	355198	1		T1	2262		T2	5		T3	74
valid_sources[0x41]	1180480	1		T1	2200		T2	1		T3	115
valid_sources[0x42]	2044355	1		T1	2220		T2	2		T3	129
valid_sources[0x43]	338883	1		T1	2312		T2	5		T3	96
valid_sources[0x44]	338998	1		T1	2261		T2	2		T3	108
valid_sources[0x45]	336679	1		T1	2314		T2	1		T3	117
valid_sources[0x46]	359298	1		T1	2307		T2	3		T3	97
valid_sources[0x47]	520062	1		T1	2382		T2	2		T3	119
valid_sources[0x48]	338913	1		T1	2224		T2	4		T3	103
valid_sources[0x49]	337471	1		T1	2326		T2	3		T3	117
valid_sources[0x4a]	339538	1		T1	2284		T2	2		T3	92
valid_sources[0x4b]	339539	1		T1	2297		T2	2		T3	107
valid_sources[0x4c]	339854	1		T1	2319		T2	3		T3	114
valid_sources[0x4d]	338517	1		T1	2312		T2	6		T3	92
valid_sources[0x4e]	340637	1		T1	2347		T2	5		T3	96
valid_sources[0x4f]	339008	1		T1	2301		T2	4		T3	94
valid_sources[0x50]	339714	1		T1	2336		T2	2		T3	143
valid_sources[0x51]	485886	1		T1	2349		T2	5		T3	107
valid_sources[0x52]	338407	1		T1	2294		T2	3		T3	61
valid_sources[0x53]	337048	1		T1	2314		T2	2		T3	99
valid_sources[0x54]	358572	1		T1	2318		T2	3		T3	110
valid_sources[0x55]	2556402	1		T1	2267		T2	2		T3	89
valid_sources[0x56]	2853708	1		T1	2305		T3	150		T4	272
valid_sources[0x57]	342304	1		T1	2272		T2	3		T3	114
valid_sources[0x58]	372376	1		T1	2184		T2	6		T3	105
valid_sources[0x59]	339213	1		T1	2200		T2	4		T3	107
valid_sources[0x5a]	341175	1		T1	2267		T3	119		T4	333
valid_sources[0x5b]	467932	1		T1	2309		T2	4		T3	121
valid_sources[0x5c]	340776	1		T1	2308		T2	4		T3	95
valid_sources[0x5d]	342486	1		T1	2288		T2	10		T3	73
valid_sources[0x5e]	873971	1		T1	2318		T2	4		T3	104
valid_sources[0x5f]	337696	1		T1	2267		T2	2		T3	109
valid_sources[0x60]	339520	1		T1	2280		T2	3		T3	109
valid_sources[0x61]	339988	1		T1	2262		T2	7		T3	63
valid_sources[0x62]	337009	1		T1	2291		T2	2		T3	101
valid_sources[0x63]	343526	1		T1	2309		T2	6		T3	133
valid_sources[0x64]	338536	1		T1	2315		T2	2		T3	98
valid_sources[0x65]	338918	1		T1	2322		T2	4		T3	88
valid_sources[0x66]	340024	1		T1	2305		T2	3		T3	79
valid_sources[0x67]	346532	1		T1	2266		T2	1		T3	108
valid_sources[0x68]	336982	1		T1	2271		T3	72		T4	280
valid_sources[0x69]	340070	1		T1	2347		T2	9		T3	106
valid_sources[0x6a]	342948	1		T1	2226		T2	1		T3	95
valid_sources[0x6b]	340392	1		T1	2316		T2	2		T3	117
valid_sources[0x6c]	338566	1		T1	2289		T2	2		T3	91
valid_sources[0x6d]	340994	1		T1	2292		T2	3		T3	132
valid_sources[0x6e]	338822	1		T1	2278		T2	2		T3	96
valid_sources[0x6f]	497056	1		T1	2266		T2	4		T3	98
valid_sources[0x70]	338535	1		T1	2344		T2	3		T3	102
valid_sources[0x71]	352677	1		T1	2369		T2	3		T3	119
valid_sources[0x72]	339547	1		T1	2192		T2	1		T3	116
valid_sources[0x73]	337908	1		T1	2304		T2	2		T3	137
valid_sources[0x74]	1078022	1		T1	2255		T2	2		T3	101
valid_sources[0x75]	462817	1		T1	2316		T2	3		T3	87
valid_sources[0x76]	338929	1		T1	2294		T3	98		T4	335
valid_sources[0x77]	2240355	1		T1	2331		T2	4		T3	90
valid_sources[0x78]	340060	1		T1	2300		T2	3		T3	110
valid_sources[0x79]	337955	1		T1	2255		T2	3		T3	139
valid_sources[0x7a]	338207	1		T1	2262		T2	3		T3	109
valid_sources[0x7b]	339942	1		T1	2314		T2	4		T3	77
valid_sources[0x7c]	337142	1		T1	2334		T2	8		T3	129
valid_sources[0x7d]	338798	1		T1	2328		T2	2		T3	107
valid_sources[0x7e]	338989	1		T1	2367		T2	3		T3	87
valid_sources[0x7f]	340747	1		T1	2212		T2	2		T3	95
valid_sources[0x80]	339931	1		T1	2302		T2	6		T3	116

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

59379799

1

T1

293764

T2

344

T3

13250

values[0x0]

all_enables

biggest_size

481296

1

T1

18

T2

9

T3

39

values[0x1]

all_enables

biggest_size

478601

1

T1

13

T2

9

T3

38