Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	66648022	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	67568050	1		T1	75593		T2	181102		T3	9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	133411288	1		T1	151116		T2	362296		T3	12
values[0x0]	384056	1		T1	12		T2	15		T3	7
values[0x1]	420728	1		T1	19		T2	14		T3	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53238233	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	80977839	1		T1	90762		T2	217742		T3	11

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	427028	1		T2	1419		T4	160		T5	2
valid_sources[0x01]	954767	1		T2	1390		T4	154		T5	4
valid_sources[0x02]	668226	1		T2	1419		T4	187		T5	2
valid_sources[0x03]	425006	1		T2	1503		T4	177		T5	3
valid_sources[0x04]	426891	1		T2	1404		T4	132		T5	5
valid_sources[0x05]	427238	1		T2	1395		T4	207		T5	1
valid_sources[0x06]	446155	1		T2	1398		T4	152		T5	2
valid_sources[0x07]	425229	1		T2	1462		T4	173		T5	1
valid_sources[0x08]	425341	1		T2	1379		T4	168		T5	2
valid_sources[0x09]	537490	1		T2	1475		T4	179		T5	1
valid_sources[0x0a]	431261	1		T2	1469		T4	150		T5	10
valid_sources[0x0b]	444435	1		T2	1394		T4	114		T5	2
valid_sources[0x0c]	425434	1		T2	1435		T4	155		T5	3
valid_sources[0x0d]	425381	1		T2	1397		T4	204		T5	2
valid_sources[0x0e]	428389	1		T2	1359		T4	152		T5	5
valid_sources[0x0f]	433843	1		T2	1421		T4	195		T5	7
valid_sources[0x10]	421936	1		T2	1307		T4	133		T5	4
valid_sources[0x11]	430350	1		T2	1340		T4	170		T5	5
valid_sources[0x12]	424824	1		T2	1349		T4	190		T5	5
valid_sources[0x13]	517168	1		T2	1398		T4	161		T5	5
valid_sources[0x14]	423278	1		T2	1362		T4	153		T5	3
valid_sources[0x15]	423827	1		T2	1434		T4	158		T5	5
valid_sources[0x16]	426383	1		T2	1470		T3	2		T4	147
valid_sources[0x17]	426200	1		T2	1336		T4	186		T5	1
valid_sources[0x18]	424036	1		T2	1457		T4	190		T5	2
valid_sources[0x19]	424776	1		T2	1416		T4	143		T5	5
valid_sources[0x1a]	425884	1		T2	1416		T4	150		T5	2
valid_sources[0x1b]	430388	1		T2	1456		T4	191		T5	2
valid_sources[0x1c]	427292	1		T2	1462		T3	2		T4	161
valid_sources[0x1d]	577746	1		T2	1452		T4	185		T5	9
valid_sources[0x1e]	426941	1		T2	1503		T4	153		T5	4
valid_sources[0x1f]	424669	1		T2	1366		T4	140		T5	1
valid_sources[0x20]	425257	1		T2	1425		T3	4		T4	185
valid_sources[0x21]	424300	1		T2	1453		T4	130		T5	10
valid_sources[0x22]	429187	1		T2	1457		T4	144		T5	3
valid_sources[0x23]	420830	1		T2	1436		T4	179		T5	1
valid_sources[0x24]	425334	1		T2	1381		T4	148		T5	3
valid_sources[0x25]	1335355	1		T2	1432		T4	190		T5	2
valid_sources[0x26]	427388	1		T2	1426		T4	165		T6	1453
valid_sources[0x27]	3648653	1		T2	1441		T4	130		T5	6
valid_sources[0x28]	424362	1		T2	1465		T4	166		T5	2
valid_sources[0x29]	422209	1		T2	1404		T4	169		T5	3
valid_sources[0x2a]	424722	1		T2	1357		T4	160		T5	2
valid_sources[0x2b]	424758	1		T2	1456		T4	167		T5	3
valid_sources[0x2c]	423764	1		T2	1446		T4	175		T5	4
valid_sources[0x2d]	703520	1		T2	1449		T4	170		T5	4
valid_sources[0x2e]	425240	1		T2	1409		T4	188		T5	3
valid_sources[0x2f]	424190	1		T2	1367		T4	221		T5	3
valid_sources[0x30]	426124	1		T2	1449		T4	180		T5	2
valid_sources[0x31]	425063	1		T2	1373		T4	175		T5	3
valid_sources[0x32]	423954	1		T2	1429		T4	134		T5	3
valid_sources[0x33]	424195	1		T2	1448		T4	216		T5	4
valid_sources[0x34]	428800	1		T2	1474		T4	138		T5	1
valid_sources[0x35]	425313	1		T2	1388		T4	123		T5	4
valid_sources[0x36]	431465	1		T2	1449		T4	192		T5	3
valid_sources[0x37]	425591	1		T2	1353		T4	222		T5	4
valid_sources[0x38]	425267	1		T2	1442		T4	204		T5	2
valid_sources[0x39]	425301	1		T2	1320		T4	240		T5	2
valid_sources[0x3a]	422819	1		T2	1465		T4	124		T5	5
valid_sources[0x3b]	780369	1		T2	1387		T4	171		T5	4
valid_sources[0x3c]	3794424	1		T2	1421		T4	163		T5	5
valid_sources[0x3d]	547304	1		T2	1439		T4	149		T5	5
valid_sources[0x3e]	424870	1		T2	1378		T4	160		T5	2
valid_sources[0x3f]	424319	1		T2	1402		T4	174		T5	3
valid_sources[0x40]	424090	1		T2	1403		T4	105		T5	3
valid_sources[0x41]	427347	1		T2	1445		T4	164		T5	5
valid_sources[0x42]	424403	1		T2	1407		T4	176		T5	9
valid_sources[0x43]	426179	1		T2	1455		T4	156		T5	4
valid_sources[0x44]	424292	1		T2	1351		T4	211		T5	2
valid_sources[0x45]	467519	1		T2	1420		T4	129		T5	4
valid_sources[0x46]	906098	1		T2	1416		T3	1		T4	171
valid_sources[0x47]	424745	1		T2	1465		T4	131		T5	3
valid_sources[0x48]	781608	1		T2	1399		T4	157		T5	4
valid_sources[0x49]	426168	1		T2	1382		T4	121		T5	3
valid_sources[0x4a]	422832	1		T2	1377		T4	188		T5	2
valid_sources[0x4b]	575323	1		T1	151147		T2	1418		T4	201
valid_sources[0x4c]	527471	1		T2	1392		T4	168		T5	2
valid_sources[0x4d]	425337	1		T2	1410		T4	198		T5	5
valid_sources[0x4e]	428338	1		T2	1403		T4	159		T5	2
valid_sources[0x4f]	427010	1		T2	1424		T4	138		T5	3
valid_sources[0x50]	425743	1		T2	1368		T4	189		T5	2
valid_sources[0x51]	423166	1		T2	1411		T4	180		T5	5
valid_sources[0x52]	426441	1		T2	1451		T4	140		T5	5
valid_sources[0x53]	454264	1		T2	1443		T4	219		T5	2
valid_sources[0x54]	424727	1		T2	1436		T4	177		T5	3
valid_sources[0x55]	470937	1		T2	1373		T4	150		T5	6
valid_sources[0x56]	423823	1		T2	1403		T4	199		T5	5
valid_sources[0x57]	425560	1		T2	1410		T4	164		T5	2
valid_sources[0x58]	425876	1		T2	1488		T4	153		T5	4
valid_sources[0x59]	427012	1		T2	1447		T4	167		T5	5
valid_sources[0x5a]	426958	1		T2	1435		T4	170		T5	2
valid_sources[0x5b]	422443	1		T2	1384		T4	154		T5	5
valid_sources[0x5c]	458402	1		T2	1427		T3	1		T4	155
valid_sources[0x5d]	426181	1		T2	1458		T4	192		T5	4
valid_sources[0x5e]	2170582	1		T2	1503		T4	156		T5	5
valid_sources[0x5f]	424499	1		T2	1475		T4	178		T5	2
valid_sources[0x60]	420567	1		T2	1402		T4	147		T5	3
valid_sources[0x61]	437150	1		T2	1379		T4	187		T5	2
valid_sources[0x62]	423883	1		T2	1310		T4	132		T5	4
valid_sources[0x63]	422540	1		T2	1401		T4	92		T5	3
valid_sources[0x64]	428706	1		T2	1404		T4	115		T5	3
valid_sources[0x65]	422996	1		T2	1423		T4	115		T5	3
valid_sources[0x66]	423632	1		T2	1426		T4	144		T5	1
valid_sources[0x67]	424503	1		T2	1426		T4	181		T5	1
valid_sources[0x68]	496493	1		T2	1400		T4	174		T5	2
valid_sources[0x69]	429296	1		T2	1400		T4	140		T5	1
valid_sources[0x6a]	428701	1		T2	1468		T4	126		T5	3
valid_sources[0x6b]	1034665	1		T2	1420		T4	195		T5	4
valid_sources[0x6c]	429892	1		T2	1408		T4	171		T5	1
valid_sources[0x6d]	427762	1		T2	1490		T4	136		T5	1
valid_sources[0x6e]	426426	1		T2	1482		T4	230		T5	6
valid_sources[0x6f]	491360	1		T2	1440		T4	151		T5	5
valid_sources[0x70]	494613	1		T2	1367		T4	158		T5	1
valid_sources[0x71]	424968	1		T2	1423		T4	156		T5	2
valid_sources[0x72]	424045	1		T2	1391		T4	204		T5	2
valid_sources[0x73]	425398	1		T2	1436		T4	219		T5	4
valid_sources[0x74]	424179	1		T2	1469		T4	209		T5	1
valid_sources[0x75]	425442	1		T2	1397		T4	100		T5	4
valid_sources[0x76]	424041	1		T2	1433		T4	124		T5	2
valid_sources[0x77]	432007	1		T2	1406		T4	155		T5	4
valid_sources[0x78]	425857	1		T2	1402		T4	145		T5	4
valid_sources[0x79]	807264	1		T2	1472		T4	173		T5	6
valid_sources[0x7a]	426042	1		T2	1381		T4	182		T5	1
valid_sources[0x7b]	424820	1		T2	1419		T4	153		T5	5
valid_sources[0x7c]	421411	1		T2	1469		T4	190		T5	2
valid_sources[0x7d]	424488	1		T2	1390		T4	172		T5	7
valid_sources[0x7e]	424146	1		T2	1392		T4	191		T5	4
valid_sources[0x7f]	422480	1		T2	1396		T4	184		T5	3
valid_sources[0x80]	422744	1		T2	1441		T4	192		T6	1406

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

66820748

1

T1

75572

T2

181077

T3

5

values[0x0]

all_enables

biggest_size

375300

1

T1

9

T2

15

T3

4

values[0x1]

all_enables

biggest_size

372002

1

T1

12

T2

10

T4

11