Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 68703025 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 69409729 1 T1 346 T2 166651 T3 28373



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 137475148 1 T1 646 T2 333227 T3 57165
values[0x0] 303528 1 T1 4 T2 17 T3 19
values[0x1] 334078 1 T1 6 T2 14 T3 21



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 54889097 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 83223657 1 T1 398 T2 200148 T3 34168



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 438650 1 T2 1315 T3 222 T4 144
valid_sources[0x01] 433981 1 T2 1356 T3 224 T4 111
valid_sources[0x02] 434117 1 T2 1298 T3 247 T4 138
valid_sources[0x03] 468387 1 T2 1331 T3 230 T4 169
valid_sources[0x04] 437532 1 T2 1297 T3 234 T4 132
valid_sources[0x05] 435352 1 T2 1298 T3 227 T4 150
valid_sources[0x06] 440316 1 T2 1330 T3 210 T4 115
valid_sources[0x07] 967013 1 T2 1375 T3 233 T4 153
valid_sources[0x08] 437695 1 T2 1275 T3 231 T4 138
valid_sources[0x09] 529335 1 T2 1323 T3 230 T4 134
valid_sources[0x0a] 443260 1 T2 1326 T3 245 T4 134
valid_sources[0x0b] 439462 1 T2 1279 T3 207 T4 185
valid_sources[0x0c] 436063 1 T2 1273 T3 235 T4 130
valid_sources[0x0d] 435502 1 T2 1288 T3 221 T4 119
valid_sources[0x0e] 435113 1 T2 1317 T3 215 T4 143
valid_sources[0x0f] 429511 1 T2 1255 T3 249 T4 132
valid_sources[0x10] 1259841 1 T2 1287 T3 233 T4 151
valid_sources[0x11] 437588 1 T2 1359 T3 236 T4 148
valid_sources[0x12] 436552 1 T2 1331 T3 221 T4 159
valid_sources[0x13] 521053 1 T2 1249 T3 223 T4 130
valid_sources[0x14] 439028 1 T2 1264 T3 234 T4 165
valid_sources[0x15] 439615 1 T2 1352 T3 221 T4 142
valid_sources[0x16] 437990 1 T2 1292 T3 224 T4 141
valid_sources[0x17] 835189 1 T2 1283 T3 223 T4 130
valid_sources[0x18] 860969 1 T2 1310 T3 230 T4 143
valid_sources[0x19] 437412 1 T2 1342 T3 233 T4 133
valid_sources[0x1a] 437295 1 T2 1338 T3 209 T4 129
valid_sources[0x1b] 437986 1 T2 1275 T3 218 T4 129
valid_sources[0x1c] 437701 1 T2 1273 T3 209 T4 118
valid_sources[0x1d] 441014 1 T2 1285 T3 212 T4 141
valid_sources[0x1e] 435662 1 T2 1254 T3 253 T4 145
valid_sources[0x1f] 437487 1 T2 1356 T3 214 T4 115
valid_sources[0x20] 435557 1 T2 1309 T3 242 T4 155
valid_sources[0x21] 445802 1 T2 1279 T3 237 T4 120
valid_sources[0x22] 619370 1 T2 1291 T3 201 T4 129
valid_sources[0x23] 433565 1 T2 1355 T3 230 T4 155
valid_sources[0x24] 434534 1 T2 1291 T3 237 T4 126
valid_sources[0x25] 438751 1 T2 1290 T3 239 T4 138
valid_sources[0x26] 725419 1 T2 1335 T3 208 T4 150
valid_sources[0x27] 448842 1 T2 1339 T3 232 T4 125
valid_sources[0x28] 434225 1 T2 1326 T3 219 T4 125
valid_sources[0x29] 438248 1 T2 1310 T3 215 T4 138
valid_sources[0x2a] 1854279 1 T2 1338 T3 228 T4 145
valid_sources[0x2b] 440477 1 T2 1321 T3 257 T4 155
valid_sources[0x2c] 436577 1 T2 1342 T3 207 T4 109
valid_sources[0x2d] 437587 1 T2 1324 T3 208 T4 142
valid_sources[0x2e] 438210 1 T2 1293 T3 255 T4 130
valid_sources[0x2f] 438341 1 T2 1317 T3 209 T4 127
valid_sources[0x30] 656491 1 T2 1244 T3 212 T4 131
valid_sources[0x31] 439088 1 T2 1336 T3 199 T4 132
valid_sources[0x32] 436050 1 T2 1249 T3 227 T4 145
valid_sources[0x33] 441476 1 T2 1270 T3 215 T4 113
valid_sources[0x34] 436702 1 T2 1366 T3 227 T4 130
valid_sources[0x35] 449058 1 T2 1372 T3 216 T4 161
valid_sources[0x36] 435095 1 T2 1273 T3 240 T4 133
valid_sources[0x37] 750337 1 T2 1269 T3 217 T4 133
valid_sources[0x38] 564547 1 T2 1344 T3 210 T4 140
valid_sources[0x39] 446461 1 T2 1338 T3 245 T4 126
valid_sources[0x3a] 435511 1 T2 1304 T3 228 T4 190
valid_sources[0x3b] 633666 1 T2 1362 T3 207 T4 156
valid_sources[0x3c] 434823 1 T2 1323 T3 232 T4 141
valid_sources[0x3d] 438193 1 T2 1341 T3 255 T4 141
valid_sources[0x3e] 514503 1 T2 1308 T3 223 T4 142
valid_sources[0x3f] 1696008 1 T2 1289 T3 201 T4 138
valid_sources[0x40] 434462 1 T2 1227 T3 205 T4 140
valid_sources[0x41] 434702 1 T2 1270 T3 199 T4 141
valid_sources[0x42] 450111 1 T2 1311 T3 236 T4 136
valid_sources[0x43] 435583 1 T2 1331 T3 212 T4 125
valid_sources[0x44] 474345 1 T2 1276 T3 193 T4 134
valid_sources[0x45] 1028300 1 T2 1312 T3 229 T4 146
valid_sources[0x46] 438543 1 T2 1291 T3 188 T4 130
valid_sources[0x47] 453131 1 T2 1237 T3 237 T4 142
valid_sources[0x48] 682061 1 T2 1311 T3 208 T4 142
valid_sources[0x49] 432467 1 T2 1311 T3 196 T4 119
valid_sources[0x4a] 460215 1 T2 1254 T3 238 T4 160
valid_sources[0x4b] 434604 1 T2 1266 T3 213 T4 137
valid_sources[0x4c] 438710 1 T2 1288 T3 228 T4 118
valid_sources[0x4d] 460239 1 T2 1300 T3 239 T4 123
valid_sources[0x4e] 437395 1 T2 1287 T3 227 T4 117
valid_sources[0x4f] 437341 1 T2 1329 T3 248 T4 153
valid_sources[0x50] 438389 1 T2 1269 T3 219 T4 158
valid_sources[0x51] 435537 1 T2 1267 T3 222 T4 152
valid_sources[0x52] 438492 1 T2 1338 T3 220 T4 169
valid_sources[0x53] 436246 1 T2 1290 T3 254 T4 140
valid_sources[0x54] 461904 1 T2 1374 T3 229 T4 159
valid_sources[0x55] 449393 1 T2 1290 T3 190 T4 151
valid_sources[0x56] 434855 1 T2 1288 T3 217 T4 113
valid_sources[0x57] 435098 1 T2 1298 T3 204 T4 121
valid_sources[0x58] 433128 1 T2 1236 T3 235 T4 131
valid_sources[0x59] 438086 1 T2 1248 T3 243 T4 146
valid_sources[0x5a] 440532 1 T2 1262 T3 219 T4 152
valid_sources[0x5b] 441046 1 T2 1352 T3 213 T4 143
valid_sources[0x5c] 1076166 1 T2 1295 T3 230 T4 115
valid_sources[0x5d] 434869 1 T2 1326 T3 227 T4 130
valid_sources[0x5e] 447147 1 T2 1253 T3 227 T4 173
valid_sources[0x5f] 435535 1 T2 1286 T3 245 T4 140
valid_sources[0x60] 465364 1 T2 1317 T3 197 T4 152
valid_sources[0x61] 434299 1 T2 1284 T3 216 T4 150
valid_sources[0x62] 434716 1 T2 1285 T3 215 T4 155
valid_sources[0x63] 435150 1 T2 1355 T3 211 T4 121
valid_sources[0x64] 434340 1 T2 1304 T3 192 T4 143
valid_sources[0x65] 433635 1 T2 1276 T3 249 T4 144
valid_sources[0x66] 1109835 1 T2 1327 T3 220 T4 157
valid_sources[0x67] 737345 1 T2 1269 T3 218 T4 133
valid_sources[0x68] 438474 1 T2 1282 T3 253 T4 158
valid_sources[0x69] 438521 1 T2 1270 T3 229 T4 121
valid_sources[0x6a] 609784 1 T2 1310 T3 212 T4 105
valid_sources[0x6b] 435416 1 T2 1294 T3 239 T4 157
valid_sources[0x6c] 441506 1 T2 1336 T3 200 T4 123
valid_sources[0x6d] 433010 1 T2 1254 T3 218 T4 139
valid_sources[0x6e] 712816 1 T2 1295 T3 212 T4 165
valid_sources[0x6f] 1088206 1 T2 1290 T3 242 T4 119
valid_sources[0x70] 436186 1 T2 1320 T3 218 T4 147
valid_sources[0x71] 700367 1 T2 1336 T3 251 T4 132
valid_sources[0x72] 436508 1 T2 1331 T3 220 T4 150
valid_sources[0x73] 437960 1 T2 1316 T3 235 T4 124
valid_sources[0x74] 435795 1 T2 1316 T3 175 T4 131
valid_sources[0x75] 438790 1 T2 1266 T3 243 T4 131
valid_sources[0x76] 437974 1 T2 1301 T3 217 T4 121
valid_sources[0x77] 436965 1 T2 1339 T3 218 T4 168
valid_sources[0x78] 436234 1 T2 1290 T3 234 T4 144
valid_sources[0x79] 437388 1 T2 1252 T3 234 T4 147
valid_sources[0x7a] 905331 1 T2 1285 T3 206 T4 179
valid_sources[0x7b] 438574 1 T2 1320 T3 215 T4 120
valid_sources[0x7c] 431849 1 T2 1245 T3 227 T4 140
valid_sources[0x7d] 433080 1 T2 1282 T3 226 T4 131
valid_sources[0x7e] 433560 1 T2 1318 T3 271 T4 141
valid_sources[0x7f] 436183 1 T2 1304 T3 229 T4 153
valid_sources[0x80] 436233 1 T2 1324 T3 223 T4 142



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 68820567 1 T1 339 T2 166627 T3 28348
values[0x0] all_enables biggest_size 295597 1 T1 4 T2 13 T3 13
values[0x1] all_enables biggest_size 293565 1 T1 3 T2 11 T3 12

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%