Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 61708035 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 62906202 1 T1 155541 T2 36357 T3 6371



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 123568986 1 T1 311419 T2 72654 T3 12814
values[0x0] 497818 1 T1 11 T2 13 T3 11
values[0x1] 547433 1 T1 8 T2 18 T3 9



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 49282327 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 75331910 1 T1 186428 T2 43672 T3 7695



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 384320 1 T3 53 T6 344 T7 2387
valid_sources[0x01] 516503 1 T3 35 T6 291 T7 2274
valid_sources[0x02] 383998 1 T3 57 T6 383 T7 2258
valid_sources[0x03] 2697849 1 T3 40 T6 268 T7 2329
valid_sources[0x04] 385648 1 T3 53 T6 304 T7 2294
valid_sources[0x05] 419296 1 T3 55 T6 282 T7 2341
valid_sources[0x06] 384401 1 T3 68 T4 20 T6 359
valid_sources[0x07] 386366 1 T3 63 T6 274 T7 2272
valid_sources[0x08] 724795 1 T3 51 T6 329 T7 2289
valid_sources[0x09] 384036 1 T3 38 T6 339 T7 2052
valid_sources[0x0a] 382346 1 T3 48 T6 324 T7 2306
valid_sources[0x0b] 383541 1 T3 46 T6 286 T7 2376
valid_sources[0x0c] 387393 1 T3 52 T6 385 T7 2347
valid_sources[0x0d] 385211 1 T3 47 T6 348 T7 2484
valid_sources[0x0e] 405668 1 T3 53 T6 372 T7 2375
valid_sources[0x0f] 382159 1 T3 47 T6 328 T7 2274
valid_sources[0x10] 384166 1 T3 52 T6 307 T7 2099
valid_sources[0x11] 386350 1 T3 49 T6 307 T7 2526
valid_sources[0x12] 385311 1 T3 54 T6 333 T7 2147
valid_sources[0x13] 421831 1 T3 46 T6 201 T7 2327
valid_sources[0x14] 385053 1 T3 37 T6 338 T7 2446
valid_sources[0x15] 2514820 1 T3 53 T6 348 T7 2404
valid_sources[0x16] 385202 1 T3 43 T6 417 T7 2203
valid_sources[0x17] 389450 1 T3 39 T6 472 T7 2282
valid_sources[0x18] 386677 1 T3 51 T6 433 T7 2247
valid_sources[0x19] 456861 1 T2 72685 T3 47 T6 363
valid_sources[0x1a] 690732 1 T3 62 T6 312 T7 2269
valid_sources[0x1b] 382964 1 T3 38 T6 372 T7 2514
valid_sources[0x1c] 384563 1 T3 48 T4 69 T6 368
valid_sources[0x1d] 393438 1 T3 46 T6 269 T7 2271
valid_sources[0x1e] 2894195 1 T3 55 T6 296 T7 2079
valid_sources[0x1f] 388855 1 T3 50 T6 258 T7 2319
valid_sources[0x20] 384047 1 T3 53 T6 357 T7 2293
valid_sources[0x21] 2284726 1 T3 67 T6 401 T7 2271
valid_sources[0x22] 384766 1 T3 25 T6 311 T7 2645
valid_sources[0x23] 516973 1 T3 53 T6 321 T7 2218
valid_sources[0x24] 725926 1 T3 64 T6 307 T7 2294
valid_sources[0x25] 385657 1 T3 58 T6 325 T7 2277
valid_sources[0x26] 384410 1 T3 42 T6 340 T7 2174
valid_sources[0x27] 384905 1 T3 39 T4 174 T6 349
valid_sources[0x28] 383300 1 T3 46 T6 389 T7 2286
valid_sources[0x29] 384702 1 T3 48 T6 388 T7 2351
valid_sources[0x2a] 763988 1 T3 44 T6 353 T7 2256
valid_sources[0x2b] 1609473 1 T3 37 T6 299 T7 2246
valid_sources[0x2c] 382414 1 T3 47 T6 277 T7 2318
valid_sources[0x2d] 390637 1 T3 36 T6 423 T7 2507
valid_sources[0x2e] 384421 1 T3 53 T6 278 T7 2317
valid_sources[0x2f] 384713 1 T3 53 T6 230 T7 2386
valid_sources[0x30] 385670 1 T3 27 T6 320 T7 2302
valid_sources[0x31] 384259 1 T3 52 T6 344 T7 2364
valid_sources[0x32] 468993 1 T3 57 T6 245 T7 2377
valid_sources[0x33] 433693 1 T3 43 T6 273 T7 2319
valid_sources[0x34] 388916 1 T3 69 T6 248 T7 2288
valid_sources[0x35] 470742 1 T3 69 T6 335 T7 2536
valid_sources[0x36] 2355414 1 T3 52 T6 355 T7 2241
valid_sources[0x37] 415570 1 T3 51 T6 323 T7 2294
valid_sources[0x38] 385995 1 T3 39 T6 369 T7 2424
valid_sources[0x39] 401630 1 T3 74 T6 247 T7 2509
valid_sources[0x3a] 384023 1 T3 55 T4 17 T6 318
valid_sources[0x3b] 543886 1 T3 46 T6 256 T7 2227
valid_sources[0x3c] 512009 1 T3 54 T6 365 T7 2426
valid_sources[0x3d] 386994 1 T3 65 T6 309 T7 2467
valid_sources[0x3e] 384294 1 T3 58 T6 392 T7 2336
valid_sources[0x3f] 396973 1 T3 46 T5 13304 T6 320
valid_sources[0x40] 385371 1 T3 39 T4 30 T6 317
valid_sources[0x41] 384491 1 T3 60 T6 328 T7 2337
valid_sources[0x42] 383494 1 T3 42 T6 283 T7 2403
valid_sources[0x43] 384191 1 T3 54 T6 243 T7 2280
valid_sources[0x44] 394965 1 T3 56 T6 351 T7 2234
valid_sources[0x45] 384315 1 T3 48 T6 260 T7 2243
valid_sources[0x46] 1329241 1 T3 51 T6 394 T7 2237
valid_sources[0x47] 405501 1 T3 44 T6 311 T7 2191
valid_sources[0x48] 441874 1 T3 58 T6 312 T7 2513
valid_sources[0x49] 385702 1 T3 48 T6 313 T7 2342
valid_sources[0x4a] 399073 1 T3 74 T6 366 T7 2198
valid_sources[0x4b] 385373 1 T3 50 T6 334 T7 2556
valid_sources[0x4c] 384556 1 T3 70 T4 237 T6 377
valid_sources[0x4d] 384454 1 T3 68 T6 246 T7 2434
valid_sources[0x4e] 384067 1 T3 43 T6 335 T7 2128
valid_sources[0x4f] 382727 1 T3 47 T6 258 T7 2335
valid_sources[0x50] 387587 1 T3 45 T6 393 T7 2395
valid_sources[0x51] 383496 1 T3 56 T6 367 T7 2165
valid_sources[0x52] 388199 1 T3 72 T6 339 T7 2452
valid_sources[0x53] 382812 1 T3 39 T6 292 T7 2085
valid_sources[0x54] 387273 1 T3 53 T6 210 T7 2204
valid_sources[0x55] 384444 1 T3 42 T6 291 T7 2216
valid_sources[0x56] 380944 1 T3 41 T6 224 T7 2335
valid_sources[0x57] 384701 1 T3 33 T6 254 T7 2249
valid_sources[0x58] 383807 1 T3 50 T6 264 T7 2342
valid_sources[0x59] 381983 1 T3 55 T6 303 T7 2262
valid_sources[0x5a] 384353 1 T3 64 T6 352 T7 2330
valid_sources[0x5b] 385048 1 T3 40 T6 288 T7 2415
valid_sources[0x5c] 382228 1 T3 53 T6 246 T7 2403
valid_sources[0x5d] 384518 1 T3 64 T6 258 T7 2421
valid_sources[0x5e] 460238 1 T3 61 T6 363 T7 2248
valid_sources[0x5f] 382941 1 T3 57 T6 232 T7 2377
valid_sources[0x60] 387724 1 T3 37 T6 368 T7 2355
valid_sources[0x61] 385648 1 T3 64 T6 278 T7 2368
valid_sources[0x62] 383228 1 T3 49 T6 382 T7 2326
valid_sources[0x63] 387024 1 T3 34 T6 321 T7 2255
valid_sources[0x64] 383887 1 T3 34 T6 273 T7 2305
valid_sources[0x65] 504662 1 T3 45 T6 286 T7 2154
valid_sources[0x66] 380983 1 T3 54 T6 380 T7 2386
valid_sources[0x67] 384037 1 T3 48 T6 251 T7 2402
valid_sources[0x68] 621188 1 T3 41 T6 327 T7 2375
valid_sources[0x69] 384155 1 T3 45 T6 419 T7 2371
valid_sources[0x6a] 385923 1 T3 47 T6 243 T7 2162
valid_sources[0x6b] 416756 1 T3 42 T6 358 T7 2166
valid_sources[0x6c] 381153 1 T3 64 T6 250 T7 2434
valid_sources[0x6d] 381847 1 T3 49 T6 322 T7 2352
valid_sources[0x6e] 389425 1 T3 60 T6 396 T7 2335
valid_sources[0x6f] 383945 1 T3 45 T6 364 T7 2201
valid_sources[0x70] 384658 1 T3 63 T6 324 T7 2227
valid_sources[0x71] 384512 1 T3 39 T6 377 T7 2654
valid_sources[0x72] 394997 1 T3 69 T6 341 T7 2453
valid_sources[0x73] 384344 1 T3 57 T6 306 T7 2428
valid_sources[0x74] 384150 1 T3 63 T6 347 T7 2440
valid_sources[0x75] 387213 1 T3 39 T6 345 T7 2204
valid_sources[0x76] 386575 1 T3 51 T6 313 T7 2428
valid_sources[0x77] 383640 1 T3 41 T6 240 T7 2273
valid_sources[0x78] 429934 1 T3 57 T6 244 T7 2168
valid_sources[0x79] 384580 1 T3 44 T6 301 T7 2383
valid_sources[0x7a] 383489 1 T3 27 T6 310 T7 2171
valid_sources[0x7b] 382100 1 T3 41 T6 333 T7 2176
valid_sources[0x7c] 388617 1 T3 31 T6 316 T7 2233
valid_sources[0x7d] 384638 1 T3 59 T6 357 T7 2200
valid_sources[0x7e] 384648 1 T3 32 T6 373 T7 2434
valid_sources[0x7f] 383952 1 T3 51 T6 302 T7 2273
valid_sources[0x80] 386699 1 T3 45 T4 90 T6 255



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 61933281 1 T1 155526 T2 36334 T3 6353
values[0x0] all_enables biggest_size 487873 1 T1 9 T2 12 T3 10
values[0x1] all_enables biggest_size 485048 1 T1 6 T2 11 T3 8

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%