Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67906174	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	68898436	1		T1	20		T2	137974		T3	11603

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	135942525	1		T1	28		T2	275620		T3	23485
values[0x0]	410225	1		T1	6		T2	29		T3	8
values[0x1]	451860	1		T1	3		T2	31		T3	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54242025	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	82562585	1		T1	23		T2	165763		T3	13998

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	374653	1		T2	1023		T4	1498		T5	472
valid_sources[0x01]	372174	1		T2	1073		T4	1665		T5	496
valid_sources[0x02]	522868	1		T2	1025		T4	1575		T5	452
valid_sources[0x03]	479180	1		T2	1088		T4	1585		T5	483
valid_sources[0x04]	378476	1		T2	1015		T4	1582		T5	488
valid_sources[0x05]	1102656	1		T2	1089		T4	1513		T5	445
valid_sources[0x06]	799331	1		T2	1054		T4	1591		T5	455
valid_sources[0x07]	424273	1		T2	1092		T4	1582		T5	454
valid_sources[0x08]	375566	1		T2	1130		T4	1548		T5	463
valid_sources[0x09]	1651295	1		T2	1092		T4	1612		T5	488
valid_sources[0x0a]	374988	1		T2	1146		T4	1595		T5	456
valid_sources[0x0b]	375083	1		T2	1023		T4	1596		T5	507
valid_sources[0x0c]	374470	1		T2	1229		T4	1640		T5	445
valid_sources[0x0d]	373658	1		T2	1027		T4	1539		T5	460
valid_sources[0x0e]	401689	1		T2	1120		T4	1642		T5	446
valid_sources[0x0f]	375920	1		T2	1057		T4	1646		T5	471
valid_sources[0x10]	375541	1		T2	1058		T4	1458		T5	402
valid_sources[0x11]	372877	1		T2	984		T4	1588		T5	489
valid_sources[0x12]	391240	1		T2	1142		T4	1608		T5	418
valid_sources[0x13]	371495	1		T2	1073		T4	1562		T5	444
valid_sources[0x14]	377441	1		T2	1125		T4	1568		T5	452
valid_sources[0x15]	376563	1		T2	1110		T4	1606		T5	464
valid_sources[0x16]	376067	1		T2	1102		T4	1562		T5	476
valid_sources[0x17]	2303698	1		T2	1021		T4	1644		T5	505
valid_sources[0x18]	373983	1		T2	1037		T4	1519		T5	562
valid_sources[0x19]	374142	1		T2	1083		T4	1609		T5	461
valid_sources[0x1a]	368056	1		T2	1019		T4	1610		T5	497
valid_sources[0x1b]	378476	1		T2	1058		T4	1513		T5	419
valid_sources[0x1c]	428974	1		T2	1031		T4	1583		T5	462
valid_sources[0x1d]	418024	1		T2	1052		T4	1642		T5	457
valid_sources[0x1e]	375381	1		T2	1136		T4	1552		T5	450
valid_sources[0x1f]	647885	1		T2	1153		T4	1559		T5	396
valid_sources[0x20]	374482	1		T2	1098		T4	1574		T5	497
valid_sources[0x21]	428894	1		T2	1127		T4	1541		T5	464
valid_sources[0x22]	374364	1		T2	1095		T4	1539		T5	458
valid_sources[0x23]	374504	1		T2	1007		T4	1593		T5	468
valid_sources[0x24]	372850	1		T2	1202		T4	1506		T5	451
valid_sources[0x25]	372599	1		T2	932		T4	1494		T5	449
valid_sources[0x26]	374383	1		T2	1003		T4	1570		T5	464
valid_sources[0x27]	385847	1		T2	1117		T4	1676		T5	473
valid_sources[0x28]	750066	1		T2	980		T4	1612		T5	494
valid_sources[0x29]	375299	1		T2	1077		T4	1601		T5	459
valid_sources[0x2a]	401389	1		T2	1038		T4	1607		T5	465
valid_sources[0x2b]	414560	1		T2	1093		T4	1615		T5	493
valid_sources[0x2c]	377444	1		T2	1124		T4	1540		T5	466
valid_sources[0x2d]	374934	1		T2	1133		T4	1611		T5	516
valid_sources[0x2e]	387904	1		T2	1059		T4	1561		T5	482
valid_sources[0x2f]	373510	1		T2	1058		T4	1584		T5	461
valid_sources[0x30]	373751	1		T2	1080		T4	1500		T5	469
valid_sources[0x31]	377428	1		T2	1064		T4	1618		T5	481
valid_sources[0x32]	411382	1		T2	1063		T4	1625		T5	487
valid_sources[0x33]	373179	1		T2	1219		T4	1579		T5	478
valid_sources[0x34]	652679	1		T2	1135		T4	1638		T5	483
valid_sources[0x35]	375821	1		T2	1032		T4	1622		T5	458
valid_sources[0x36]	374739	1		T2	1138		T4	1556		T5	495
valid_sources[0x37]	374268	1		T2	997		T4	1613		T5	463
valid_sources[0x38]	496235	1		T2	1214		T4	1506		T5	485
valid_sources[0x39]	385783	1		T2	1007		T4	1498		T5	441
valid_sources[0x3a]	849700	1		T2	1076		T4	1636		T5	463
valid_sources[0x3b]	1302494	1		T2	1067		T4	1481		T5	457
valid_sources[0x3c]	373148	1		T2	1029		T4	1476		T5	507
valid_sources[0x3d]	378979	1		T2	990		T4	1523		T5	434
valid_sources[0x3e]	375511	1		T2	1097		T4	1628		T5	445
valid_sources[0x3f]	388726	1		T2	1153		T4	1557		T5	432
valid_sources[0x40]	831653	1		T2	1081		T4	1535		T5	513
valid_sources[0x41]	374767	1		T2	1106		T4	1531		T5	465
valid_sources[0x42]	1516324	1		T2	1061		T4	1697		T5	400
valid_sources[0x43]	452067	1		T2	1081		T4	1553		T5	487
valid_sources[0x44]	375127	1		T2	1123		T4	1590		T5	472
valid_sources[0x45]	377864	1		T2	1029		T4	1469		T5	473
valid_sources[0x46]	1585847	1		T2	1039		T3	23504		T4	1668
valid_sources[0x47]	615631	1		T2	1229		T4	1543		T5	461
valid_sources[0x48]	401931	1		T2	1174		T4	1582		T5	448
valid_sources[0x49]	376001	1		T2	1077		T4	1702		T5	439
valid_sources[0x4a]	376921	1		T2	1044		T4	1533		T5	436
valid_sources[0x4b]	373697	1		T2	1047		T4	1520		T5	445
valid_sources[0x4c]	375489	1		T2	1173		T4	1569		T5	438
valid_sources[0x4d]	557088	1		T2	946		T4	1521		T5	461
valid_sources[0x4e]	375682	1		T2	1171		T4	1603		T5	442
valid_sources[0x4f]	380160	1		T2	1038		T4	1625		T5	421
valid_sources[0x50]	375087	1		T2	1112		T4	1693		T5	446
valid_sources[0x51]	411057	1		T2	1210		T4	1598		T5	474
valid_sources[0x52]	378075	1		T2	1153		T4	1580		T5	500
valid_sources[0x53]	374896	1		T2	1063		T4	1609		T5	453
valid_sources[0x54]	371975	1		T2	1057		T4	1638		T5	417
valid_sources[0x55]	380053	1		T2	1198		T4	1568		T5	442
valid_sources[0x56]	376420	1		T2	1001		T4	1528		T5	430
valid_sources[0x57]	377390	1		T2	908		T4	1607		T5	491
valid_sources[0x58]	375082	1		T2	1241		T4	1615		T5	440
valid_sources[0x59]	373204	1		T2	1029		T4	1664		T5	503
valid_sources[0x5a]	372828	1		T2	1103		T4	1523		T5	479
valid_sources[0x5b]	376272	1		T2	1059		T4	1523		T5	469
valid_sources[0x5c]	491135	1		T2	1017		T4	1521		T5	471
valid_sources[0x5d]	374978	1		T2	1084		T4	1647		T5	432
valid_sources[0x5e]	376621	1		T2	1121		T4	1549		T5	461
valid_sources[0x5f]	374831	1		T2	1086		T4	1596		T5	502
valid_sources[0x60]	2289639	1		T2	969		T4	1486		T5	439
valid_sources[0x61]	376267	1		T2	1070		T4	1546		T5	501
valid_sources[0x62]	1304825	1		T2	1134		T4	1718		T5	467
valid_sources[0x63]	376779	1		T2	1163		T4	1612		T5	453
valid_sources[0x64]	378633	1		T2	1034		T4	1649		T5	421
valid_sources[0x65]	411178	1		T2	1122		T4	1568		T5	480
valid_sources[0x66]	373833	1		T2	1166		T4	1609		T5	453
valid_sources[0x67]	374876	1		T2	1085		T4	1593		T5	503
valid_sources[0x68]	373360	1		T2	1057		T4	1570		T5	404
valid_sources[0x69]	374517	1		T2	1136		T4	1614		T5	466
valid_sources[0x6a]	374159	1		T2	1070		T4	1591		T5	422
valid_sources[0x6b]	376751	1		T2	1086		T4	1552		T5	422
valid_sources[0x6c]	373274	1		T2	971		T4	1645		T5	459
valid_sources[0x6d]	374690	1		T2	1095		T4	1489		T5	472
valid_sources[0x6e]	374720	1		T2	1036		T4	1558		T5	448
valid_sources[0x6f]	375563	1		T2	916		T4	1454		T5	449
valid_sources[0x70]	375980	1		T2	1112		T4	1587		T5	431
valid_sources[0x71]	2873856	1		T2	1179		T4	1621		T5	458
valid_sources[0x72]	375634	1		T2	1085		T4	1590		T5	503
valid_sources[0x73]	374182	1		T2	930		T4	1726		T5	487
valid_sources[0x74]	378689	1		T2	1192		T4	1541		T5	458
valid_sources[0x75]	374220	1		T2	1201		T4	1554		T5	448
valid_sources[0x76]	2098363	1		T2	1153		T4	1559		T5	466
valid_sources[0x77]	381041	1		T2	1114		T4	1608		T5	445
valid_sources[0x78]	372698	1		T2	1085		T4	1544		T5	461
valid_sources[0x79]	374767	1		T2	1024		T4	1567		T5	459
valid_sources[0x7a]	377415	1		T2	1115		T4	1615		T5	456
valid_sources[0x7b]	382347	1		T2	1217		T4	1588		T5	421
valid_sources[0x7c]	405363	1		T2	1119		T4	1592		T5	448
valid_sources[0x7d]	377086	1		T1	37		T2	1199		T4	1602
valid_sources[0x7e]	377682	1		T2	1048		T4	1570		T5	424
valid_sources[0x7f]	419151	1		T2	1095		T4	1471		T5	439
valid_sources[0x80]	529038	1		T2	1049		T4	1484		T5	457

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

68098117

1

T1

14

T2

137929

T3

11592

values[0x0]

all_enables

biggest_size

401211

1

T1

4

T2

23

T3

6

values[0x1]

all_enables

biggest_size

399108

1

T1

2

T2

22

T3

5