Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	56688188	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	57988040	1		T1	1643		T2	144812		T3	110481

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	113556715	1		T1	3208		T2	48448		T3	220673
values[0x0]	533178	1		T1	6		T2	52761		T3	10
values[0x1]	586335	1		T1	5		T2	58103		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45270993	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	69405235	1		T1	1962		T2	150744		T3	132598

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	375173	1		T1	2		T2	786		T4	5872
valid_sources[0x01]	366404	1		T1	16		T2	723		T4	5444
valid_sources[0x02]	903125	1		T1	3		T2	301		T4	6102
valid_sources[0x03]	390644	1		T1	22		T2	1162		T4	5881
valid_sources[0x04]	367235	1		T1	14		T2	387		T4	5609
valid_sources[0x05]	364593	1		T1	18		T2	371		T4	5857
valid_sources[0x06]	369468	1		T1	17		T2	898		T4	5795
valid_sources[0x07]	370357	1		T1	45		T2	695		T4	5728
valid_sources[0x08]	370741	1		T1	7		T2	673		T4	5837
valid_sources[0x09]	408188	1		T1	26		T2	274		T4	5512
valid_sources[0x0a]	367198	1		T1	23		T2	910		T4	6393
valid_sources[0x0b]	365738	1		T1	6		T2	407		T4	5316
valid_sources[0x0c]	453730	1		T1	2		T2	690		T4	5953
valid_sources[0x0d]	417964	1		T1	13		T2	485		T4	5752
valid_sources[0x0e]	368497	1		T1	13		T2	165		T4	5962
valid_sources[0x0f]	364121	1		T1	21		T2	623		T4	5181
valid_sources[0x10]	368926	1		T1	1		T2	773		T4	5702
valid_sources[0x11]	393563	1		T1	14		T2	875		T4	5950
valid_sources[0x12]	369237	1		T1	19		T2	227		T4	5908
valid_sources[0x13]	365863	1		T1	19		T2	634		T4	5270
valid_sources[0x14]	365520	1		T1	13		T2	785		T4	5855
valid_sources[0x15]	368800	1		T1	4		T2	721		T4	5354
valid_sources[0x16]	366573	1		T1	40		T2	1074		T4	5684
valid_sources[0x17]	369621	1		T1	31		T2	1529		T4	5911
valid_sources[0x18]	999143	1		T1	13		T2	403		T4	6017
valid_sources[0x19]	1082684	1		T1	1		T2	1016		T4	5948
valid_sources[0x1a]	371465	1		T1	20		T2	271		T4	5446
valid_sources[0x1b]	371599	1		T1	11		T2	652		T4	5914
valid_sources[0x1c]	368457	1		T1	17		T2	720		T4	5709
valid_sources[0x1d]	371593	1		T1	16		T2	353		T4	5699
valid_sources[0x1e]	371212	1		T2	893		T4	5689		T5	229
valid_sources[0x1f]	365519	1		T2	812		T4	5505		T5	264
valid_sources[0x20]	489789	1		T1	27		T2	836		T4	5625
valid_sources[0x21]	368112	1		T1	3		T2	903		T4	6312
valid_sources[0x22]	368207	1		T1	22		T2	761		T4	5343
valid_sources[0x23]	366450	1		T1	1		T2	459		T4	5606
valid_sources[0x24]	369308	1		T1	5		T2	326		T4	5571
valid_sources[0x25]	370905	1		T1	27		T2	848		T4	6109
valid_sources[0x26]	366977	1		T1	24		T2	213		T4	5408
valid_sources[0x27]	365630	1		T1	13		T2	870		T4	5671
valid_sources[0x28]	371530	1		T1	12		T2	798		T4	5792
valid_sources[0x29]	409759	1		T1	7		T2	691		T4	6060
valid_sources[0x2a]	367351	1		T1	4		T2	368		T4	5606
valid_sources[0x2b]	378121	1		T1	18		T2	695		T4	5638
valid_sources[0x2c]	442135	1		T1	12		T2	608		T4	5341
valid_sources[0x2d]	367190	1		T1	9		T2	827		T4	5370
valid_sources[0x2e]	401184	1		T1	1		T2	596		T4	5360
valid_sources[0x2f]	370131	1		T1	13		T2	356		T4	5724
valid_sources[0x30]	409107	1		T1	13		T2	817		T4	5723
valid_sources[0x31]	373358	1		T1	43		T2	828		T4	5470
valid_sources[0x32]	372738	1		T1	15		T2	351		T4	6029
valid_sources[0x33]	368679	1		T1	18		T2	937		T4	5710
valid_sources[0x34]	842033	1		T1	14		T2	554		T4	5855
valid_sources[0x35]	562267	1		T1	12		T2	580		T4	5793
valid_sources[0x36]	366121	1		T1	14		T2	307		T4	5662
valid_sources[0x37]	369288	1		T1	29		T2	335		T4	5825
valid_sources[0x38]	836517	1		T1	13		T2	270		T4	5771
valid_sources[0x39]	373018	1		T1	3		T2	801		T4	5705
valid_sources[0x3a]	369986	1		T1	9		T2	350		T4	5316
valid_sources[0x3b]	368448	1		T1	15		T2	1286		T4	5480
valid_sources[0x3c]	365101	1		T1	20		T2	622		T4	5545
valid_sources[0x3d]	420810	1		T1	8		T2	758		T4	5529
valid_sources[0x3e]	367957	1		T1	2		T2	622		T4	5789
valid_sources[0x3f]	645320	1		T1	17		T2	788		T4	5743
valid_sources[0x40]	367703	1		T1	2		T2	887		T4	5453
valid_sources[0x41]	366753	1		T1	12		T2	162		T4	5132
valid_sources[0x42]	366921	1		T1	16		T2	569		T4	5755
valid_sources[0x43]	365154	1		T1	2		T2	145		T4	5485
valid_sources[0x44]	383547	1		T1	19		T2	334		T4	6118
valid_sources[0x45]	370410	1		T1	24		T2	402		T4	5492
valid_sources[0x46]	420464	1		T1	20		T2	652		T4	5528
valid_sources[0x47]	370946	1		T1	15		T2	444		T4	5503
valid_sources[0x48]	1402007	1		T1	4		T2	473		T4	5372
valid_sources[0x49]	694332	1		T2	786		T4	5438		T5	317
valid_sources[0x4a]	844209	1		T1	8		T2	768		T4	5902
valid_sources[0x4b]	445232	1		T1	27		T2	668		T4	5543
valid_sources[0x4c]	368933	1		T1	51		T2	124		T4	6052
valid_sources[0x4d]	371617	1		T1	8		T2	651		T4	5900
valid_sources[0x4e]	368605	1		T1	30		T2	548		T4	5547
valid_sources[0x4f]	369948	1		T1	38		T2	461		T4	5748
valid_sources[0x50]	683708	1		T1	9		T2	639		T4	5608
valid_sources[0x51]	368543	1		T2	1059		T4	5670		T5	154
valid_sources[0x52]	570220	1		T1	1		T2	799		T4	5617
valid_sources[0x53]	576764	1		T1	8		T2	1500		T4	5683
valid_sources[0x54]	622160	1		T1	6		T2	551		T4	5436
valid_sources[0x55]	365614	1		T1	12		T2	245		T4	5852
valid_sources[0x56]	365024	1		T1	20		T2	294		T4	5173
valid_sources[0x57]	366660	1		T1	22		T2	640		T4	5692
valid_sources[0x58]	619430	1		T1	3		T2	1038		T4	5336
valid_sources[0x59]	368417	1		T1	7		T2	951		T4	5595
valid_sources[0x5a]	375803	1		T1	18		T2	191		T4	5729
valid_sources[0x5b]	1035909	1		T1	5		T2	818		T4	5521
valid_sources[0x5c]	651146	1		T2	1375		T4	5443		T5	118
valid_sources[0x5d]	366706	1		T2	310		T4	5625		T5	316
valid_sources[0x5e]	824448	1		T2	174		T4	6164		T5	287
valid_sources[0x5f]	366278	1		T2	830		T4	5633		T5	114
valid_sources[0x60]	364964	1		T1	14		T2	536		T4	5070
valid_sources[0x61]	367981	1		T1	1		T2	699		T4	5295
valid_sources[0x62]	367332	1		T1	3		T2	893		T4	5924
valid_sources[0x63]	384316	1		T1	11		T2	296		T4	5922
valid_sources[0x64]	369003	1		T1	4		T2	653		T4	5479
valid_sources[0x65]	1482211	1		T1	24		T2	930		T4	5766
valid_sources[0x66]	367304	1		T1	10		T2	161		T4	5905
valid_sources[0x67]	364046	1		T1	21		T2	596		T4	5597
valid_sources[0x68]	390643	1		T1	11		T2	412		T4	5576
valid_sources[0x69]	370213	1		T1	21		T2	597		T4	5954
valid_sources[0x6a]	369046	1		T1	1		T2	715		T4	5253
valid_sources[0x6b]	367998	1		T1	6		T2	546		T4	5968
valid_sources[0x6c]	368835	1		T1	14		T2	771		T4	5592
valid_sources[0x6d]	366915	1		T2	496		T4	5232		T5	354
valid_sources[0x6e]	372825	1		T1	7		T2	835		T4	5739
valid_sources[0x6f]	377588	1		T1	8		T2	343		T4	5544
valid_sources[0x70]	537392	1		T1	15		T2	1040		T4	5984
valid_sources[0x71]	372848	1		T1	6		T2	999		T4	5351
valid_sources[0x72]	366379	1		T1	30		T2	240		T4	5618
valid_sources[0x73]	366765	1		T1	1		T2	568		T4	5731
valid_sources[0x74]	368364	1		T1	9		T2	362		T4	5699
valid_sources[0x75]	371177	1		T1	19		T2	994		T4	6199
valid_sources[0x76]	364775	1		T1	9		T2	557		T4	5730
valid_sources[0x77]	365511	1		T1	5		T2	544		T4	5196
valid_sources[0x78]	460129	1		T1	7		T2	816		T4	5905
valid_sources[0x79]	402393	1		T1	16		T2	638		T4	5722
valid_sources[0x7a]	726273	1		T1	39		T2	1259		T4	5939
valid_sources[0x7b]	369364	1		T1	11		T2	304		T4	5599
valid_sources[0x7c]	1153408	1		T1	4		T2	1276		T4	5607
valid_sources[0x7d]	370106	1		T1	14		T2	485		T4	5526
valid_sources[0x7e]	366345	1		T1	34		T2	655		T4	5507
valid_sources[0x7f]	383345	1		T1	13		T2	600		T4	5818
valid_sources[0x80]	368098	1		T1	2		T2	580		T4	5773

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

56946817

1

T1

1635

T2

40539

T3

110469

values[0x0]

all_enables

biggest_size

522151

1

T1

4

T2

52164

T3

8

values[0x1]

all_enables

biggest_size

519072

1

T1

4

T2

52109

T3

4