Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57146592	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	58736979	1		T1	33645		T2	215237		T3	34

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	114483730	1		T1	67239		T2	430615		T3	62
values[0x0]	663694	1		T1	35		T2	141		T3	5
values[0x1]	736147	1		T1	34		T2	143		T3	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45628466	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	70255105	1		T1	40470		T2	258489		T3	44

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	693880	1		T2	16795		T4	393		T7	254
valid_sources[0x01]	359634	1		T2	16841		T4	326		T7	249
valid_sources[0x02]	692607	1		T2	17006		T4	419		T5	326118
valid_sources[0x03]	360275	1		T2	16876		T4	443		T7	297
valid_sources[0x04]	387302	1		T2	16420		T4	369		T7	271
valid_sources[0x05]	462154	1		T2	16478		T4	333		T7	268
valid_sources[0x06]	360831	1		T2	17162		T4	388		T7	294
valid_sources[0x07]	360541	1		T2	16692		T4	335		T6	5
valid_sources[0x08]	360271	1		T2	16849		T4	340		T7	256
valid_sources[0x09]	360793	1		T2	16728		T4	433		T6	3
valid_sources[0x0a]	361611	1		T2	16490		T4	332		T7	253
valid_sources[0x0b]	559340	1		T2	16686		T3	1		T4	356
valid_sources[0x0c]	657337	1		T2	16746		T4	429		T6	3
valid_sources[0x0d]	361508	1		T2	17144		T4	375		T7	251
valid_sources[0x0e]	1079225	1		T2	16845		T4	397		T7	284
valid_sources[0x0f]	357390	1		T2	16856		T4	311		T6	3
valid_sources[0x10]	357267	1		T2	16719		T4	315		T7	242
valid_sources[0x11]	361059	1		T2	16583		T4	333		T7	241
valid_sources[0x12]	963469	1		T2	17236		T4	395		T7	271
valid_sources[0x13]	360318	1		T2	16667		T4	427		T7	248
valid_sources[0x14]	481733	1		T2	16915		T4	410		T7	276
valid_sources[0x15]	357033	1		T2	16508		T4	369		T7	243
valid_sources[0x16]	361467	1		T2	16779		T4	351		T6	1
valid_sources[0x17]	364979	1		T2	16688		T3	2		T4	408
valid_sources[0x18]	362818	1		T2	16861		T4	351		T7	302
valid_sources[0x19]	358247	1		T2	16785		T4	450		T7	252
valid_sources[0x1a]	362557	1		T2	16875		T4	425		T7	276
valid_sources[0x1b]	356516	1		T2	16588		T4	311		T7	273
valid_sources[0x1c]	360164	1		T2	16980		T4	389		T7	263
valid_sources[0x1d]	3221691	1		T2	16928		T4	368		T7	256
valid_sources[0x1e]	784437	1		T2	16942		T4	388		T7	278
valid_sources[0x1f]	361536	1		T2	16840		T4	370		T7	265
valid_sources[0x20]	608271	1		T2	16829		T4	395		T7	263
valid_sources[0x21]	505116	1		T2	16876		T4	416		T7	266
valid_sources[0x22]	376015	1		T2	16642		T4	369		T7	261
valid_sources[0x23]	359398	1		T2	16652		T4	364		T7	253
valid_sources[0x24]	357276	1		T2	16884		T4	390		T7	269
valid_sources[0x25]	360922	1		T2	16891		T4	347		T7	302
valid_sources[0x26]	379269	1		T2	16982		T4	369		T7	246
valid_sources[0x27]	361434	1		T2	16626		T4	384		T7	215
valid_sources[0x28]	358242	1		T2	16732		T4	338		T7	232
valid_sources[0x29]	363976	1		T2	16680		T4	351		T7	257
valid_sources[0x2a]	1019384	1		T2	16684		T4	370		T7	244
valid_sources[0x2b]	359098	1		T2	16895		T4	360		T7	242
valid_sources[0x2c]	360490	1		T2	16976		T4	331		T7	258
valid_sources[0x2d]	481438	1		T2	16841		T4	322		T7	264
valid_sources[0x2e]	368864	1		T2	16980		T4	311		T7	271
valid_sources[0x2f]	363476	1		T2	16917		T4	347		T6	11
valid_sources[0x30]	361099	1		T2	16689		T3	9		T4	333
valid_sources[0x31]	358382	1		T2	17006		T4	390		T7	269
valid_sources[0x32]	790481	1		T2	16665		T4	339		T7	324
valid_sources[0x33]	361665	1		T2	16959		T4	369		T7	265
valid_sources[0x34]	361305	1		T2	16944		T4	347		T7	289
valid_sources[0x35]	360851	1		T2	16804		T4	347		T7	279
valid_sources[0x36]	358111	1		T2	16658		T4	361		T7	279
valid_sources[0x37]	357715	1		T2	16525		T4	356		T7	246
valid_sources[0x38]	360843	1		T2	16728		T4	342		T7	306
valid_sources[0x39]	361882	1		T2	16875		T4	400		T7	269
valid_sources[0x3a]	363715	1		T2	17218		T3	5		T4	358
valid_sources[0x3b]	361402	1		T2	17008		T3	3		T4	388
valid_sources[0x3c]	377357	1		T2	16890		T4	366		T7	268
valid_sources[0x3d]	362782	1		T2	16828		T4	434		T7	233
valid_sources[0x3e]	1114451	1		T2	17089		T4	352		T7	259
valid_sources[0x3f]	360642	1		T2	16650		T4	332		T7	244
valid_sources[0x40]	361151	1		T2	16886		T4	415		T7	307
valid_sources[0x41]	360647	1		T2	16812		T4	351		T6	4
valid_sources[0x42]	363450	1		T2	16743		T4	379		T7	239
valid_sources[0x43]	362512	1		T2	16935		T4	418		T7	278
valid_sources[0x44]	363045	1		T2	16824		T4	447		T7	264
valid_sources[0x45]	357485	1		T2	17129		T4	323		T7	250
valid_sources[0x46]	740483	1		T2	17140		T4	338		T7	287
valid_sources[0x47]	359690	1		T2	17092		T4	338		T7	258
valid_sources[0x48]	359732	1		T2	16577		T4	426		T7	256
valid_sources[0x49]	402440	1		T2	16759		T4	317		T7	241
valid_sources[0x4a]	362944	1		T2	16942		T4	342		T7	251
valid_sources[0x4b]	360865	1		T2	17008		T4	369		T7	225
valid_sources[0x4c]	360236	1		T2	16960		T4	345		T7	256
valid_sources[0x4d]	369641	1		T2	16670		T4	425		T7	266
valid_sources[0x4e]	358901	1		T2	16809		T4	393		T7	261
valid_sources[0x4f]	363616	1		T2	16820		T4	358		T7	245
valid_sources[0x50]	361455	1		T2	16814		T4	362		T6	1
valid_sources[0x51]	365383	1		T2	16916		T4	384		T7	278
valid_sources[0x52]	358462	1		T2	16823		T3	2		T4	377
valid_sources[0x53]	427155	1		T1	67308		T2	16411		T4	326
valid_sources[0x54]	360196	1		T2	16868		T4	347		T7	259
valid_sources[0x55]	363139	1		T2	16782		T4	302		T7	259
valid_sources[0x56]	421919	1		T2	16867		T4	336		T7	258
valid_sources[0x57]	368962	1		T2	16768		T4	365		T7	250
valid_sources[0x58]	357088	1		T2	16932		T4	358		T7	262
valid_sources[0x59]	359835	1		T2	16439		T4	385		T7	225
valid_sources[0x5a]	362188	1		T2	16613		T4	407		T7	266
valid_sources[0x5b]	712765	1		T2	16802		T4	399		T7	251
valid_sources[0x5c]	361759	1		T2	16874		T4	356		T7	281
valid_sources[0x5d]	362428	1		T2	16900		T4	366		T7	258
valid_sources[0x5e]	409982	1		T2	16603		T4	340		T7	247
valid_sources[0x5f]	361501	1		T2	16763		T4	310		T7	268
valid_sources[0x60]	359919	1		T2	16666		T3	1		T4	362
valid_sources[0x61]	1030198	1		T2	16809		T4	332		T7	238
valid_sources[0x62]	420659	1		T2	16898		T4	345		T7	283
valid_sources[0x63]	373582	1		T2	16647		T4	380		T7	271
valid_sources[0x64]	465423	1		T2	16858		T4	358		T7	260
valid_sources[0x65]	359791	1		T2	16814		T4	375		T7	307
valid_sources[0x66]	417674	1		T2	16930		T4	363		T7	288
valid_sources[0x67]	782571	1		T2	16494		T4	326		T7	261
valid_sources[0x68]	359350	1		T2	17070		T4	428		T7	231
valid_sources[0x69]	360084	1		T2	16981		T4	409		T7	276
valid_sources[0x6a]	357900	1		T2	17016		T3	2		T4	384
valid_sources[0x6b]	372782	1		T2	16831		T4	335		T7	251
valid_sources[0x6c]	362445	1		T2	16620		T4	409		T7	256
valid_sources[0x6d]	360965	1		T2	16702		T3	4		T4	389
valid_sources[0x6e]	363415	1		T2	16596		T4	384		T7	222
valid_sources[0x6f]	361746	1		T2	16884		T4	341		T7	261
valid_sources[0x70]	422534	1		T2	16990		T4	372		T7	231
valid_sources[0x71]	788210	1		T2	17032		T4	364		T7	266
valid_sources[0x72]	361204	1		T2	16810		T4	379		T7	226
valid_sources[0x73]	1554153	1		T2	16788		T4	422		T7	266
valid_sources[0x74]	358636	1		T2	16826		T4	352		T6	6
valid_sources[0x75]	362752	1		T2	16778		T4	363		T7	226
valid_sources[0x76]	360381	1		T2	16769		T4	348		T7	254
valid_sources[0x77]	359961	1		T2	16864		T4	363		T7	265
valid_sources[0x78]	361574	1		T2	16731		T4	363		T7	207
valid_sources[0x79]	362440	1		T2	17130		T4	322		T7	293
valid_sources[0x7a]	362388	1		T2	16866		T4	385		T7	253
valid_sources[0x7b]	362962	1		T2	16546		T4	363		T7	283
valid_sources[0x7c]	360832	1		T2	16906		T4	405		T7	267
valid_sources[0x7d]	363304	1		T2	17037		T4	359		T7	242
valid_sources[0x7e]	361090	1		T2	16740		T4	350		T7	261
valid_sources[0x7f]	359637	1		T2	16887		T4	338		T7	275
valid_sources[0x80]	360729	1		T2	16967		T4	363		T7	254

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

57434717

1

T1

33584

T2

215218

T3

29

values[0x0]

all_enables

biggest_size

651047

1

T1

32

T2

96

T3

2

values[0x1]

all_enables

biggest_size

651215

1

T1

29

T2

98

T3

3