Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64179373	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	65887363	1		T1	19764		T2	46		T3	63271

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	128594389	1		T1	39672		T2	72		T3	126427
values[0x0]	698974	1		T1	16		T2	7		T3	26
values[0x1]	773373	1		T1	13		T2	3		T3	40

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	51244866	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	78821870	1		T1	23738		T2	52		T3	75873

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	401328	1		T1	165		T3	517		T4	828
valid_sources[0x01]	400308	1		T1	174		T3	503		T4	917
valid_sources[0x02]	403856	1		T1	170		T3	455		T4	873
valid_sources[0x03]	3216313	1		T1	152		T3	600		T4	1032
valid_sources[0x04]	408065	1		T1	166		T3	459		T4	853
valid_sources[0x05]	403674	1		T1	161		T3	457		T4	961
valid_sources[0x06]	407838	1		T1	166		T3	568		T4	882
valid_sources[0x07]	1325406	1		T1	148		T2	9		T3	478
valid_sources[0x08]	405326	1		T1	163		T2	6		T3	492
valid_sources[0x09]	403817	1		T1	148		T3	431		T4	1011
valid_sources[0x0a]	404313	1		T1	148		T3	477		T4	948
valid_sources[0x0b]	406442	1		T1	161		T3	519		T4	846
valid_sources[0x0c]	402727	1		T1	147		T3	566		T4	919
valid_sources[0x0d]	402920	1		T1	140		T3	487		T4	839
valid_sources[0x0e]	404121	1		T1	162		T3	441		T4	937
valid_sources[0x0f]	403824	1		T1	129		T2	2		T3	481
valid_sources[0x10]	404503	1		T1	149		T3	459		T4	953
valid_sources[0x11]	1173248	1		T1	145		T3	416		T4	816
valid_sources[0x12]	404199	1		T1	155		T3	537		T4	822
valid_sources[0x13]	400957	1		T1	167		T3	530		T4	1047
valid_sources[0x14]	409696	1		T1	175		T3	422		T4	854
valid_sources[0x15]	409493	1		T1	163		T3	622		T4	910
valid_sources[0x16]	398600	1		T1	174		T2	2		T3	461
valid_sources[0x17]	405174	1		T1	149		T3	390		T4	929
valid_sources[0x18]	403983	1		T1	156		T2	5		T3	467
valid_sources[0x19]	403894	1		T1	147		T3	565		T4	891
valid_sources[0x1a]	406893	1		T1	148		T3	462		T4	897
valid_sources[0x1b]	402503	1		T1	113		T2	3		T3	468
valid_sources[0x1c]	485264	1		T1	147		T3	498		T4	830
valid_sources[0x1d]	590053	1		T1	165		T3	534		T4	932
valid_sources[0x1e]	401875	1		T1	173		T3	456		T4	950
valid_sources[0x1f]	852712	1		T1	153		T3	489		T4	829
valid_sources[0x20]	406914	1		T1	161		T3	520		T4	940
valid_sources[0x21]	405028	1		T1	149		T3	549		T4	667
valid_sources[0x22]	601034	1		T1	165		T2	1		T3	470
valid_sources[0x23]	405910	1		T1	143		T3	441		T4	938
valid_sources[0x24]	403069	1		T1	147		T3	490		T4	874
valid_sources[0x25]	402282	1		T1	165		T3	486		T4	917
valid_sources[0x26]	404578	1		T1	154		T2	7		T3	484
valid_sources[0x27]	402571	1		T1	146		T3	578		T4	820
valid_sources[0x28]	443566	1		T1	175		T3	513		T4	942
valid_sources[0x29]	409161	1		T1	164		T3	535		T4	916
valid_sources[0x2a]	405179	1		T1	149		T3	466		T4	1018
valid_sources[0x2b]	404371	1		T1	140		T3	461		T4	954
valid_sources[0x2c]	411338	1		T1	142		T3	581		T4	867
valid_sources[0x2d]	426176	1		T1	163		T3	469		T4	862
valid_sources[0x2e]	406000	1		T1	163		T3	551		T4	946
valid_sources[0x2f]	809869	1		T1	159		T3	486		T4	915
valid_sources[0x30]	404163	1		T1	149		T3	545		T4	978
valid_sources[0x31]	414399	1		T1	172		T3	439		T4	934
valid_sources[0x32]	403338	1		T1	149		T3	496		T4	781
valid_sources[0x33]	406222	1		T1	146		T3	496		T4	892
valid_sources[0x34]	406007	1		T1	158		T3	488		T4	809
valid_sources[0x35]	406391	1		T1	147		T3	398		T4	922
valid_sources[0x36]	402900	1		T1	142		T3	541		T4	973
valid_sources[0x37]	402840	1		T1	158		T3	454		T4	916
valid_sources[0x38]	404063	1		T1	180		T3	468		T4	910
valid_sources[0x39]	542450	1		T1	156		T3	470		T4	970
valid_sources[0x3a]	416407	1		T1	166		T3	619		T4	816
valid_sources[0x3b]	438593	1		T1	162		T3	488		T4	853
valid_sources[0x3c]	405455	1		T1	178		T3	483		T4	839
valid_sources[0x3d]	404928	1		T1	164		T3	547		T4	930
valid_sources[0x3e]	406656	1		T1	161		T3	548		T4	892
valid_sources[0x3f]	401884	1		T1	166		T3	542		T4	1032
valid_sources[0x40]	405127	1		T1	149		T3	592		T4	877
valid_sources[0x41]	408471	1		T1	148		T2	1		T3	480
valid_sources[0x42]	420929	1		T1	146		T3	432		T4	893
valid_sources[0x43]	403967	1		T1	150		T3	501		T4	1028
valid_sources[0x44]	402039	1		T1	143		T3	550		T4	939
valid_sources[0x45]	404740	1		T1	173		T3	465		T4	1014
valid_sources[0x46]	1547668	1		T1	151		T2	1		T3	481
valid_sources[0x47]	403583	1		T1	160		T3	483		T4	942
valid_sources[0x48]	406759	1		T1	166		T3	528		T4	801
valid_sources[0x49]	404187	1		T1	151		T3	421		T4	935
valid_sources[0x4a]	403819	1		T1	160		T3	505		T4	983
valid_sources[0x4b]	402090	1		T1	158		T2	1		T3	542
valid_sources[0x4c]	406602	1		T1	166		T3	496		T4	948
valid_sources[0x4d]	404564	1		T1	153		T3	498		T4	866
valid_sources[0x4e]	471744	1		T1	164		T3	497		T4	992
valid_sources[0x4f]	404151	1		T1	165		T2	3		T3	484
valid_sources[0x50]	404756	1		T1	138		T3	499		T4	991
valid_sources[0x51]	425457	1		T1	153		T3	486		T4	964
valid_sources[0x52]	408048	1		T1	143		T3	507		T4	832
valid_sources[0x53]	405858	1		T1	142		T3	540		T4	804
valid_sources[0x54]	522167	1		T1	166		T2	1		T3	528
valid_sources[0x55]	403018	1		T1	157		T3	472		T4	785
valid_sources[0x56]	533153	1		T1	171		T3	621		T4	1006
valid_sources[0x57]	404000	1		T1	182		T3	530		T4	900
valid_sources[0x58]	407317	1		T1	156		T3	528		T4	847
valid_sources[0x59]	469241	1		T1	133		T3	489		T4	805
valid_sources[0x5a]	1188307	1		T1	145		T3	547		T4	979
valid_sources[0x5b]	415126	1		T1	148		T3	439		T4	982
valid_sources[0x5c]	611235	1		T1	158		T3	436		T4	878
valid_sources[0x5d]	403399	1		T1	182		T3	481		T4	954
valid_sources[0x5e]	431580	1		T1	158		T3	424		T4	923
valid_sources[0x5f]	407958	1		T1	157		T3	479		T4	969
valid_sources[0x60]	405443	1		T1	153		T3	458		T4	1010
valid_sources[0x61]	404772	1		T1	175		T3	420		T4	860
valid_sources[0x62]	406568	1		T1	163		T3	389		T4	903
valid_sources[0x63]	405373	1		T1	170		T3	482		T4	946
valid_sources[0x64]	404388	1		T1	146		T3	512		T4	860
valid_sources[0x65]	406239	1		T1	147		T3	513		T4	838
valid_sources[0x66]	488782	1		T1	147		T3	478		T4	919
valid_sources[0x67]	400980	1		T1	126		T3	448		T4	810
valid_sources[0x68]	1057282	1		T1	139		T3	543		T4	1016
valid_sources[0x69]	402891	1		T1	152		T3	540		T4	869
valid_sources[0x6a]	406079	1		T1	149		T3	525		T4	975
valid_sources[0x6b]	408627	1		T1	133		T3	433		T4	885
valid_sources[0x6c]	400480	1		T1	155		T3	530		T4	1029
valid_sources[0x6d]	404203	1		T1	156		T3	464		T4	915
valid_sources[0x6e]	436139	1		T1	156		T3	423		T4	934
valid_sources[0x6f]	409172	1		T1	169		T3	551		T4	865
valid_sources[0x70]	404616	1		T1	150		T3	476		T4	941
valid_sources[0x71]	414383	1		T1	152		T3	435		T4	1007
valid_sources[0x72]	576322	1		T1	152		T3	461		T4	965
valid_sources[0x73]	400113	1		T1	174		T2	15		T3	474
valid_sources[0x74]	403220	1		T1	138		T3	625		T4	1009
valid_sources[0x75]	404975	1		T1	154		T2	3		T3	510
valid_sources[0x76]	404182	1		T1	158		T3	393		T4	903
valid_sources[0x77]	406072	1		T1	137		T3	457		T4	837
valid_sources[0x78]	417053	1		T1	151		T3	553		T4	942
valid_sources[0x79]	402471	1		T1	147		T3	527		T4	1010
valid_sources[0x7a]	402962	1		T1	154		T3	571		T4	930
valid_sources[0x7b]	402550	1		T1	137		T3	462		T4	847
valid_sources[0x7c]	420988	1		T1	161		T3	519		T4	917
valid_sources[0x7d]	406878	1		T1	162		T3	540		T4	829
valid_sources[0x7e]	411860	1		T1	156		T3	465		T4	886
valid_sources[0x7f]	401256	1		T1	168		T3	477		T4	815
valid_sources[0x80]	407092	1		T1	157		T3	460		T4	878

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

64513273

1

T1

19742

T2

39

T3

63224

values[0x0]

all_enables

biggest_size

686749

1

T1

14

T2

5

T3

17

values[0x1]

all_enables

biggest_size

687341

1

T1

8

T2

2

T3

30