Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57905778	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	59582191	1		T1	10322		T2	1495		T3	21

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	116047560	1		T1	20268		T2	2926		T3	13
values[0x0]	684951	1		T1	71		T2	6		T3	9
values[0x1]	755458	1		T1	79		T2	6		T3	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46233463	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	71254506	1		T1	12427		T2	1786		T3	23

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	373799	1		T1	70		T2	7		T4	565
valid_sources[0x01]	373158	1		T1	95		T2	11		T4	525
valid_sources[0x02]	372564	1		T1	89		T2	7		T4	802
valid_sources[0x03]	853158	1		T1	88		T2	11		T4	396
valid_sources[0x04]	373559	1		T1	63		T2	5		T4	404
valid_sources[0x05]	489403	1		T1	93		T2	8		T4	590
valid_sources[0x06]	371627	1		T1	68		T2	21		T4	830
valid_sources[0x07]	750627	1		T1	62		T2	16		T4	514
valid_sources[0x08]	780298	1		T1	132		T2	8		T4	615
valid_sources[0x09]	372047	1		T1	92		T2	7		T4	496
valid_sources[0x0a]	373060	1		T1	82		T2	6		T4	560
valid_sources[0x0b]	374468	1		T1	80		T2	5		T4	471
valid_sources[0x0c]	373154	1		T1	75		T2	15		T4	558
valid_sources[0x0d]	375675	1		T1	121		T2	11		T4	384
valid_sources[0x0e]	375387	1		T1	68		T2	7		T4	516
valid_sources[0x0f]	371705	1		T1	55		T2	15		T4	585
valid_sources[0x10]	375126	1		T1	90		T2	7		T4	865
valid_sources[0x11]	374306	1		T1	72		T2	4		T4	408
valid_sources[0x12]	1246232	1		T1	100		T2	10		T4	537
valid_sources[0x13]	372316	1		T1	87		T2	2		T4	559
valid_sources[0x14]	475428	1		T1	85		T2	17		T4	670
valid_sources[0x15]	375480	1		T1	44		T2	10		T4	825
valid_sources[0x16]	375242	1		T1	101		T2	15		T4	713
valid_sources[0x17]	372064	1		T1	96		T2	22		T4	445
valid_sources[0x18]	376883	1		T1	80		T2	8		T4	487
valid_sources[0x19]	371232	1		T1	55		T2	5		T4	441
valid_sources[0x1a]	373752	1		T1	131		T2	9		T4	569
valid_sources[0x1b]	373227	1		T1	55		T2	7		T4	603
valid_sources[0x1c]	373381	1		T1	80		T2	4		T4	550
valid_sources[0x1d]	393165	1		T1	80		T2	13		T4	569
valid_sources[0x1e]	374459	1		T1	60		T2	8		T4	538
valid_sources[0x1f]	373710	1		T1	89		T2	15		T4	559
valid_sources[0x20]	373373	1		T1	94		T2	3		T4	753
valid_sources[0x21]	483531	1		T1	106		T2	15		T4	573
valid_sources[0x22]	374910	1		T1	134		T2	11		T4	878
valid_sources[0x23]	428204	1		T1	118		T2	19		T4	518
valid_sources[0x24]	1075238	1		T1	87		T2	9		T4	550
valid_sources[0x25]	373123	1		T1	66		T2	16		T4	528
valid_sources[0x26]	371799	1		T1	77		T2	10		T4	726
valid_sources[0x27]	369521	1		T1	68		T2	22		T4	622
valid_sources[0x28]	373655	1		T1	75		T2	9		T4	853
valid_sources[0x29]	371534	1		T1	64		T2	12		T4	615
valid_sources[0x2a]	372767	1		T1	69		T2	7		T4	490
valid_sources[0x2b]	372994	1		T1	74		T2	4		T4	637
valid_sources[0x2c]	390224	1		T1	95		T2	7		T4	391
valid_sources[0x2d]	403279	1		T1	79		T2	12		T4	613
valid_sources[0x2e]	375773	1		T1	62		T2	1		T3	2
valid_sources[0x2f]	643274	1		T1	152		T2	18		T4	392
valid_sources[0x30]	377099	1		T1	78		T2	6		T4	654
valid_sources[0x31]	374497	1		T1	73		T2	3		T4	768
valid_sources[0x32]	1036482	1		T1	111		T2	10		T4	577
valid_sources[0x33]	373324	1		T1	54		T2	13		T4	556
valid_sources[0x34]	372942	1		T1	58		T2	3		T4	483
valid_sources[0x35]	374158	1		T1	62		T2	12		T4	636
valid_sources[0x36]	374818	1		T1	70		T2	8		T4	542
valid_sources[0x37]	498141	1		T1	98		T2	11		T4	654
valid_sources[0x38]	734487	1		T1	65		T2	18		T4	561
valid_sources[0x39]	371393	1		T1	107		T2	12		T4	422
valid_sources[0x3a]	372492	1		T1	97		T2	9		T4	603
valid_sources[0x3b]	377635	1		T1	87		T2	6		T4	337
valid_sources[0x3c]	372215	1		T1	48		T2	13		T4	397
valid_sources[0x3d]	377266	1		T1	43		T2	7		T4	594
valid_sources[0x3e]	373240	1		T1	75		T2	9		T4	926
valid_sources[0x3f]	373863	1		T1	90		T2	10		T4	324
valid_sources[0x40]	373697	1		T1	48		T2	16		T4	466
valid_sources[0x41]	374576	1		T1	91		T2	14		T4	528
valid_sources[0x42]	1393442	1		T1	54		T2	10		T4	566
valid_sources[0x43]	374371	1		T1	50		T4	541		T7	339
valid_sources[0x44]	374784	1		T1	142		T2	31		T4	508
valid_sources[0x45]	374720	1		T1	101		T2	7		T4	451
valid_sources[0x46]	375319	1		T1	95		T2	9		T4	935
valid_sources[0x47]	375027	1		T1	75		T2	16		T4	751
valid_sources[0x48]	371525	1		T1	62		T2	11		T4	617
valid_sources[0x49]	455057	1		T1	94		T2	17		T4	761
valid_sources[0x4a]	371909	1		T1	72		T2	14		T4	410
valid_sources[0x4b]	372348	1		T1	77		T2	4		T4	555
valid_sources[0x4c]	374399	1		T1	99		T2	9		T4	507
valid_sources[0x4d]	405485	1		T1	75		T2	8		T4	613
valid_sources[0x4e]	495393	1		T1	81		T2	16		T4	604
valid_sources[0x4f]	373501	1		T1	74		T2	8		T4	590
valid_sources[0x50]	466085	1		T1	96		T2	17		T4	522
valid_sources[0x51]	372326	1		T1	48		T2	5		T4	613
valid_sources[0x52]	376214	1		T1	67		T2	11		T4	511
valid_sources[0x53]	373968	1		T1	53		T2	24		T4	722
valid_sources[0x54]	373344	1		T1	114		T2	6		T4	293
valid_sources[0x55]	451959	1		T1	87		T2	22		T4	367
valid_sources[0x56]	377265	1		T1	106		T2	11		T4	274
valid_sources[0x57]	377590	1		T1	118		T2	9		T4	828
valid_sources[0x58]	381383	1		T1	44		T2	24		T4	250
valid_sources[0x59]	372453	1		T1	93		T2	19		T4	532
valid_sources[0x5a]	372106	1		T1	82		T2	12		T4	754
valid_sources[0x5b]	2387459	1		T1	96		T2	18		T4	828
valid_sources[0x5c]	374043	1		T1	61		T2	12		T4	629
valid_sources[0x5d]	746043	1		T1	44		T2	4		T4	240
valid_sources[0x5e]	374984	1		T1	118		T2	16		T3	3
valid_sources[0x5f]	372161	1		T1	73		T2	4		T4	662
valid_sources[0x60]	374439	1		T1	62		T2	3		T3	9
valid_sources[0x61]	373952	1		T1	93		T2	7		T4	699
valid_sources[0x62]	373685	1		T1	106		T2	14		T4	753
valid_sources[0x63]	440485	1		T1	63		T2	17		T4	809
valid_sources[0x64]	481278	1		T1	78		T2	8		T4	740
valid_sources[0x65]	1031131	1		T1	63		T2	15		T3	1
valid_sources[0x66]	369264	1		T1	92		T2	1		T4	516
valid_sources[0x67]	420226	1		T1	36		T2	12		T4	535
valid_sources[0x68]	375865	1		T1	64		T2	7		T4	582
valid_sources[0x69]	723329	1		T1	145		T2	10		T4	566
valid_sources[0x6a]	494601	1		T1	61		T2	4		T4	555
valid_sources[0x6b]	376417	1		T1	100		T2	2		T4	420
valid_sources[0x6c]	372533	1		T1	37		T2	19		T4	416
valid_sources[0x6d]	376081	1		T1	56		T2	21		T4	756
valid_sources[0x6e]	375930	1		T1	69		T2	4		T4	583
valid_sources[0x6f]	373967	1		T1	67		T2	13		T4	499
valid_sources[0x70]	374489	1		T1	99		T2	21		T4	466
valid_sources[0x71]	372521	1		T1	105		T2	16		T4	624
valid_sources[0x72]	376452	1		T1	112		T2	24		T4	567
valid_sources[0x73]	372782	1		T1	101		T2	16		T4	298
valid_sources[0x74]	394056	1		T1	53		T2	23		T4	348
valid_sources[0x75]	378740	1		T1	95		T2	12		T4	607
valid_sources[0x76]	371212	1		T1	71		T2	20		T3	1
valid_sources[0x77]	372070	1		T1	94		T2	26		T4	358
valid_sources[0x78]	418390	1		T1	83		T2	7		T4	802
valid_sources[0x79]	865803	1		T1	82		T2	18		T4	616
valid_sources[0x7a]	373293	1		T1	42		T2	7		T4	975
valid_sources[0x7b]	371722	1		T1	55		T2	16		T4	567
valid_sources[0x7c]	381135	1		T1	80		T2	18		T4	647
valid_sources[0x7d]	374431	1		T1	75		T2	6		T4	710
valid_sources[0x7e]	423758	1		T1	129		T2	16		T4	621
valid_sources[0x7f]	371673	1		T1	55		T2	13		T4	446
valid_sources[0x80]	425971	1		T1	106		T2	22		T4	882

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

58239905

1

T1

10263

T2

1486

T3

9

values[0x0]

all_enables

biggest_size

672528

1

T1

33

T2

5

T3

6

values[0x1]

all_enables

biggest_size

669758

1

T1

26

T2

4

T3

6