Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 57438331 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 58531057 1 T1 39540 T2 19030 T3 23339



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 115020492 1 T1 79104 T2 38004 T3 46566
values[0x0] 450837 1 T1 16 T2 16 T3 1
values[0x1] 498059 1 T1 22 T2 13 T3 9



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 45873224 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 70096164 1 T1 47350 T2 22765 T3 28040



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 340917 1 T1 336 T2 124 T3 172
valid_sources[0x01] 342117 1 T1 341 T2 158 T3 175
valid_sources[0x02] 339428 1 T1 281 T2 142 T3 201
valid_sources[0x03] 339598 1 T1 316 T2 124 T3 162
valid_sources[0x04] 1334722 1 T1 312 T2 158 T3 172
valid_sources[0x05] 343232 1 T1 332 T2 144 T3 191
valid_sources[0x06] 338881 1 T1 327 T2 153 T3 172
valid_sources[0x07] 1240632 1 T1 315 T2 152 T3 165
valid_sources[0x08] 340202 1 T1 325 T2 113 T3 141
valid_sources[0x09] 339157 1 T1 316 T2 163 T3 214
valid_sources[0x0a] 341255 1 T1 265 T2 123 T3 191
valid_sources[0x0b] 1008807 1 T1 273 T2 147 T3 190
valid_sources[0x0c] 385869 1 T1 271 T2 166 T3 184
valid_sources[0x0d] 335815 1 T1 335 T2 127 T3 192
valid_sources[0x0e] 1831822 1 T1 313 T2 149 T3 180
valid_sources[0x0f] 338051 1 T1 312 T2 151 T3 196
valid_sources[0x10] 338154 1 T1 321 T2 128 T3 163
valid_sources[0x11] 341031 1 T1 270 T2 129 T3 178
valid_sources[0x12] 338543 1 T1 327 T2 135 T3 180
valid_sources[0x13] 336211 1 T1 323 T2 128 T3 185
valid_sources[0x14] 338184 1 T1 305 T2 127 T3 164
valid_sources[0x15] 341219 1 T1 299 T2 147 T3 199
valid_sources[0x16] 419777 1 T1 290 T2 167 T3 172
valid_sources[0x17] 336259 1 T1 323 T2 141 T3 155
valid_sources[0x18] 362949 1 T1 322 T2 144 T3 175
valid_sources[0x19] 339127 1 T1 334 T2 146 T3 180
valid_sources[0x1a] 341309 1 T1 281 T2 181 T3 202
valid_sources[0x1b] 341994 1 T1 298 T2 160 T3 186
valid_sources[0x1c] 919329 1 T1 298 T2 145 T3 176
valid_sources[0x1d] 337115 1 T1 256 T2 88 T3 209
valid_sources[0x1e] 339927 1 T1 329 T2 153 T3 177
valid_sources[0x1f] 337717 1 T1 313 T2 115 T3 189
valid_sources[0x20] 415842 1 T1 299 T2 155 T3 228
valid_sources[0x21] 342520 1 T1 257 T2 123 T3 222
valid_sources[0x22] 341540 1 T1 304 T2 194 T3 189
valid_sources[0x23] 645089 1 T1 336 T2 109 T3 173
valid_sources[0x24] 408818 1 T1 290 T2 159 T3 170
valid_sources[0x25] 341310 1 T1 301 T2 110 T3 169
valid_sources[0x26] 337753 1 T1 351 T2 128 T3 177
valid_sources[0x27] 338349 1 T1 307 T2 142 T3 185
valid_sources[0x28] 339545 1 T1 315 T2 182 T3 171
valid_sources[0x29] 342058 1 T1 321 T2 127 T3 176
valid_sources[0x2a] 340283 1 T1 300 T2 100 T3 168
valid_sources[0x2b] 372995 1 T1 311 T2 146 T3 175
valid_sources[0x2c] 401101 1 T1 330 T2 179 T3 183
valid_sources[0x2d] 339132 1 T1 300 T2 153 T3 200
valid_sources[0x2e] 367685 1 T1 307 T2 164 T3 165
valid_sources[0x2f] 338783 1 T1 300 T2 220 T3 197
valid_sources[0x30] 339404 1 T1 303 T2 158 T3 192
valid_sources[0x31] 340975 1 T1 325 T2 141 T3 182
valid_sources[0x32] 336046 1 T1 313 T2 150 T3 152
valid_sources[0x33] 336940 1 T1 319 T2 153 T3 171
valid_sources[0x34] 352652 1 T1 340 T2 159 T3 196
valid_sources[0x35] 338800 1 T1 297 T2 188 T3 180
valid_sources[0x36] 336313 1 T1 286 T2 179 T3 188
valid_sources[0x37] 339358 1 T1 351 T2 135 T3 171
valid_sources[0x38] 335895 1 T1 270 T2 159 T3 173
valid_sources[0x39] 373756 1 T1 316 T2 143 T3 168
valid_sources[0x3a] 338982 1 T1 350 T2 177 T3 199
valid_sources[0x3b] 363968 1 T1 314 T2 115 T3 151
valid_sources[0x3c] 336782 1 T1 312 T2 162 T3 174
valid_sources[0x3d] 340942 1 T1 322 T2 142 T3 162
valid_sources[0x3e] 342477 1 T1 275 T2 152 T3 169
valid_sources[0x3f] 338878 1 T1 333 T2 155 T3 240
valid_sources[0x40] 419493 1 T1 309 T2 154 T3 197
valid_sources[0x41] 338243 1 T1 322 T2 165 T3 179
valid_sources[0x42] 339954 1 T1 314 T2 111 T3 196
valid_sources[0x43] 338309 1 T1 334 T2 157 T3 184
valid_sources[0x44] 689620 1 T1 290 T2 143 T3 187
valid_sources[0x45] 340120 1 T1 340 T2 123 T3 201
valid_sources[0x46] 339726 1 T1 303 T2 171 T3 188
valid_sources[0x47] 340571 1 T1 299 T2 158 T3 159
valid_sources[0x48] 338284 1 T1 277 T2 147 T3 182
valid_sources[0x49] 340561 1 T1 297 T2 184 T3 172
valid_sources[0x4a] 374587 1 T1 282 T2 146 T3 184
valid_sources[0x4b] 340735 1 T1 342 T2 157 T3 201
valid_sources[0x4c] 336450 1 T1 277 T2 183 T3 172
valid_sources[0x4d] 337949 1 T1 310 T2 114 T3 173
valid_sources[0x4e] 338965 1 T1 317 T2 164 T3 168
valid_sources[0x4f] 1211976 1 T1 322 T2 159 T3 182
valid_sources[0x50] 748573 1 T1 310 T2 175 T3 158
valid_sources[0x51] 352893 1 T1 298 T2 152 T3 192
valid_sources[0x52] 340622 1 T1 301 T2 169 T3 211
valid_sources[0x53] 336838 1 T1 345 T2 134 T3 188
valid_sources[0x54] 339977 1 T1 320 T2 161 T3 210
valid_sources[0x55] 337321 1 T1 323 T2 135 T3 188
valid_sources[0x56] 337627 1 T1 327 T2 132 T3 195
valid_sources[0x57] 343321 1 T1 328 T2 128 T3 179
valid_sources[0x58] 338210 1 T1 291 T2 181 T3 165
valid_sources[0x59] 341458 1 T1 308 T2 127 T3 199
valid_sources[0x5a] 339156 1 T1 322 T2 127 T3 188
valid_sources[0x5b] 339130 1 T1 311 T2 166 T3 162
valid_sources[0x5c] 337078 1 T1 353 T2 93 T3 169
valid_sources[0x5d] 337817 1 T1 317 T2 175 T3 170
valid_sources[0x5e] 339613 1 T1 295 T2 132 T3 186
valid_sources[0x5f] 338887 1 T1 316 T2 146 T3 193
valid_sources[0x60] 370401 1 T1 335 T2 203 T3 183
valid_sources[0x61] 339871 1 T1 312 T2 152 T3 203
valid_sources[0x62] 340847 1 T1 314 T2 121 T3 206
valid_sources[0x63] 336318 1 T1 294 T2 157 T3 190
valid_sources[0x64] 1849219 1 T1 355 T2 130 T3 183
valid_sources[0x65] 339910 1 T1 344 T2 195 T3 160
valid_sources[0x66] 340463 1 T1 271 T2 119 T3 174
valid_sources[0x67] 351622 1 T1 296 T2 186 T3 191
valid_sources[0x68] 338932 1 T1 294 T2 176 T3 194
valid_sources[0x69] 337016 1 T1 313 T2 159 T3 187
valid_sources[0x6a] 340662 1 T1 300 T2 139 T3 189
valid_sources[0x6b] 1490011 1 T1 346 T2 145 T3 193
valid_sources[0x6c] 621995 1 T1 283 T2 118 T3 202
valid_sources[0x6d] 343929 1 T1 301 T2 116 T3 194
valid_sources[0x6e] 335797 1 T1 342 T2 132 T3 183
valid_sources[0x6f] 340477 1 T1 253 T2 128 T3 176
valid_sources[0x70] 340657 1 T1 311 T2 182 T3 188
valid_sources[0x71] 335201 1 T1 290 T2 154 T3 170
valid_sources[0x72] 339834 1 T1 344 T2 190 T3 185
valid_sources[0x73] 1456129 1 T1 271 T2 157 T3 158
valid_sources[0x74] 407056 1 T1 304 T2 171 T3 172
valid_sources[0x75] 338925 1 T1 289 T2 129 T3 192
valid_sources[0x76] 337836 1 T1 291 T2 135 T3 199
valid_sources[0x77] 340767 1 T1 252 T2 147 T3 188
valid_sources[0x78] 341587 1 T1 364 T2 111 T3 162
valid_sources[0x79] 339716 1 T1 304 T2 176 T3 174
valid_sources[0x7a] 1134632 1 T1 335 T2 173 T3 172
valid_sources[0x7b] 433987 1 T1 287 T2 130 T3 193
valid_sources[0x7c] 419336 1 T1 299 T2 140 T3 166
valid_sources[0x7d] 341042 1 T1 339 T2 184 T3 174
valid_sources[0x7e] 338782 1 T1 273 T2 152 T3 186
valid_sources[0x7f] 338709 1 T1 307 T2 150 T3 193
valid_sources[0x80] 339580 1 T1 259 T2 187 T3 185



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 57650636 1 T1 39512 T2 19012 T3 23335
values[0x0] all_enables biggest_size 440762 1 T1 16 T2 11 T4 7
values[0x1] all_enables biggest_size 439659 1 T1 12 T2 7 T3 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%