Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 61235006 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 63521100 1 T1 3989 T2 149018 T3 273632



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 122777828 1 T1 7972 T2 297714 T3 547313
values[0x0] 940808 1 T1 18 T2 33 T3 31
values[0x1] 1037470 1 T1 14 T2 26 T3 23



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 48874130 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 75881976 1 T1 4769 T2 178767 T3 328415



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 342159 1 T1 37 T3 2170 T4 912
valid_sources[0x01] 343640 1 T1 29 T3 2193 T4 902
valid_sources[0x02] 339089 1 T1 34 T3 2123 T4 890
valid_sources[0x03] 347138 1 T1 37 T3 2094 T4 844
valid_sources[0x04] 340513 1 T1 39 T3 2129 T4 883
valid_sources[0x05] 344321 1 T1 34 T3 2020 T4 950
valid_sources[0x06] 343172 1 T1 16 T3 2135 T4 903
valid_sources[0x07] 344351 1 T1 28 T3 2061 T4 937
valid_sources[0x08] 339245 1 T1 31 T3 2395 T4 1007
valid_sources[0x09] 1592050 1 T1 28 T3 2131 T4 949
valid_sources[0x0a] 342279 1 T1 34 T3 2149 T4 911
valid_sources[0x0b] 1344053 1 T1 35 T3 2163 T4 904
valid_sources[0x0c] 344865 1 T1 47 T3 2201 T4 917
valid_sources[0x0d] 344495 1 T1 46 T3 2044 T4 934
valid_sources[0x0e] 344354 1 T1 26 T3 2273 T4 879
valid_sources[0x0f] 342797 1 T1 34 T3 2123 T4 950
valid_sources[0x10] 341662 1 T1 27 T3 2211 T4 826
valid_sources[0x11] 342762 1 T1 39 T3 2234 T4 941
valid_sources[0x12] 340842 1 T1 37 T3 2184 T4 984
valid_sources[0x13] 343900 1 T1 32 T3 1995 T4 876
valid_sources[0x14] 344156 1 T1 28 T3 2113 T4 899
valid_sources[0x15] 343973 1 T1 35 T3 2195 T4 1007
valid_sources[0x16] 453114 1 T1 32 T3 2168 T4 919
valid_sources[0x17] 1881471 1 T1 30 T3 2298 T4 913
valid_sources[0x18] 346835 1 T1 17 T3 2222 T4 876
valid_sources[0x19] 342077 1 T1 27 T3 2377 T4 884
valid_sources[0x1a] 342139 1 T1 28 T3 2192 T4 934
valid_sources[0x1b] 1014794 1 T1 31 T3 2327 T4 970
valid_sources[0x1c] 344019 1 T1 29 T3 2113 T4 930
valid_sources[0x1d] 1905296 1 T1 44 T3 1933 T4 874
valid_sources[0x1e] 341687 1 T1 37 T3 2117 T4 892
valid_sources[0x1f] 342094 1 T1 35 T3 2144 T4 920
valid_sources[0x20] 341829 1 T1 48 T3 2157 T4 873
valid_sources[0x21] 338438 1 T1 35 T3 2058 T4 965
valid_sources[0x22] 375221 1 T1 30 T3 2160 T4 937
valid_sources[0x23] 342229 1 T1 22 T3 2093 T4 920
valid_sources[0x24] 1498437 1 T1 33 T3 2112 T4 962
valid_sources[0x25] 341748 1 T1 34 T3 2042 T4 879
valid_sources[0x26] 2214549 1 T1 34 T3 1898 T4 968
valid_sources[0x27] 343155 1 T1 31 T3 2157 T4 987
valid_sources[0x28] 345098 1 T1 38 T3 2096 T4 929
valid_sources[0x29] 344131 1 T1 35 T3 2188 T4 1006
valid_sources[0x2a] 362487 1 T1 24 T3 2274 T4 910
valid_sources[0x2b] 341362 1 T1 28 T3 2045 T4 887
valid_sources[0x2c] 344625 1 T1 26 T3 2103 T4 882
valid_sources[0x2d] 393510 1 T1 33 T3 2163 T4 962
valid_sources[0x2e] 341746 1 T1 37 T3 2210 T4 903
valid_sources[0x2f] 440669 1 T1 28 T3 2114 T4 851
valid_sources[0x30] 347219 1 T1 25 T3 2190 T4 918
valid_sources[0x31] 342869 1 T1 33 T3 2062 T4 902
valid_sources[0x32] 342124 1 T1 22 T3 2047 T4 953
valid_sources[0x33] 341646 1 T1 23 T3 2102 T4 886
valid_sources[0x34] 436090 1 T1 30 T3 2134 T4 904
valid_sources[0x35] 340986 1 T1 34 T3 2116 T4 892
valid_sources[0x36] 341025 1 T1 30 T3 2130 T4 991
valid_sources[0x37] 341287 1 T1 43 T3 2134 T4 943
valid_sources[0x38] 341943 1 T1 25 T3 2269 T4 842
valid_sources[0x39] 344023 1 T1 28 T3 2140 T4 872
valid_sources[0x3a] 381930 1 T1 37 T3 1982 T4 928
valid_sources[0x3b] 345310 1 T1 29 T3 2128 T4 972
valid_sources[0x3c] 343048 1 T1 32 T3 2103 T4 889
valid_sources[0x3d] 342245 1 T1 20 T3 2314 T4 937
valid_sources[0x3e] 341394 1 T1 33 T3 2203 T4 915
valid_sources[0x3f] 345138 1 T1 32 T3 2265 T4 898
valid_sources[0x40] 342072 1 T1 30 T3 2123 T4 829
valid_sources[0x41] 344884 1 T1 37 T3 2206 T4 910
valid_sources[0x42] 4973330 1 T1 28 T3 2287 T4 882
valid_sources[0x43] 341063 1 T1 21 T3 2144 T4 927
valid_sources[0x44] 340383 1 T1 30 T3 2151 T4 978
valid_sources[0x45] 340485 1 T1 25 T3 2201 T4 880
valid_sources[0x46] 348348 1 T1 35 T3 1997 T4 920
valid_sources[0x47] 341769 1 T1 36 T3 2186 T4 939
valid_sources[0x48] 1607541 1 T1 37 T3 2200 T4 869
valid_sources[0x49] 339309 1 T1 26 T3 2057 T4 898
valid_sources[0x4a] 383662 1 T1 31 T3 2158 T4 889
valid_sources[0x4b] 343724 1 T1 31 T3 2153 T4 862
valid_sources[0x4c] 341857 1 T1 18 T3 2207 T4 890
valid_sources[0x4d] 343362 1 T1 29 T3 2122 T4 930
valid_sources[0x4e] 1354377 1 T1 29 T3 2131 T4 906
valid_sources[0x4f] 346084 1 T1 39 T3 2064 T4 912
valid_sources[0x50] 343735 1 T1 19 T3 1966 T4 961
valid_sources[0x51] 344929 1 T1 23 T3 2119 T4 938
valid_sources[0x52] 787559 1 T1 25 T3 2145 T4 889
valid_sources[0x53] 2781265 1 T1 32 T3 2152 T4 951
valid_sources[0x54] 1396426 1 T1 31 T3 2112 T4 846
valid_sources[0x55] 337097 1 T1 33 T3 2155 T4 969
valid_sources[0x56] 343286 1 T1 34 T3 2203 T4 951
valid_sources[0x57] 341533 1 T1 34 T3 2063 T4 942
valid_sources[0x58] 344107 1 T1 32 T3 2065 T4 937
valid_sources[0x59] 723793 1 T1 25 T3 2062 T4 941
valid_sources[0x5a] 346657 1 T1 41 T3 2206 T4 912
valid_sources[0x5b] 873019 1 T1 28 T3 2144 T4 1015
valid_sources[0x5c] 343234 1 T1 32 T3 2147 T4 912
valid_sources[0x5d] 1563575 1 T1 34 T3 2106 T4 881
valid_sources[0x5e] 343088 1 T1 37 T3 1996 T4 868
valid_sources[0x5f] 412451 1 T1 36 T3 2156 T4 971
valid_sources[0x60] 349261 1 T1 39 T3 2198 T4 945
valid_sources[0x61] 374103 1 T1 22 T3 2154 T4 986
valid_sources[0x62] 340814 1 T1 27 T3 2068 T4 920
valid_sources[0x63] 575267 1 T1 25 T3 1988 T4 954
valid_sources[0x64] 374963 1 T1 27 T3 2308 T4 857
valid_sources[0x65] 347637 1 T1 40 T3 2052 T4 953
valid_sources[0x66] 344327 1 T1 27 T3 2059 T4 817
valid_sources[0x67] 342613 1 T1 28 T3 2189 T4 956
valid_sources[0x68] 1138587 1 T1 32 T3 2072 T4 930
valid_sources[0x69] 344827 1 T1 23 T3 2133 T4 862
valid_sources[0x6a] 341325 1 T1 26 T3 2181 T4 947
valid_sources[0x6b] 339709 1 T1 32 T3 2148 T4 864
valid_sources[0x6c] 642888 1 T1 42 T2 297773 T3 2166
valid_sources[0x6d] 342384 1 T1 38 T3 2054 T4 939
valid_sources[0x6e] 339865 1 T1 44 T3 2238 T4 959
valid_sources[0x6f] 343288 1 T1 43 T3 2124 T4 941
valid_sources[0x70] 364291 1 T1 34 T3 2186 T4 835
valid_sources[0x71] 340639 1 T1 35 T3 2155 T4 915
valid_sources[0x72] 344115 1 T1 41 T3 2070 T4 873
valid_sources[0x73] 342012 1 T1 34 T3 2186 T4 860
valid_sources[0x74] 535868 1 T1 18 T3 2133 T4 940
valid_sources[0x75] 342690 1 T1 43 T3 2093 T4 950
valid_sources[0x76] 393399 1 T1 25 T3 2069 T4 959
valid_sources[0x77] 359467 1 T1 40 T3 2155 T4 914
valid_sources[0x78] 344101 1 T1 27 T3 2216 T4 959
valid_sources[0x79] 341354 1 T1 27 T3 1954 T4 848
valid_sources[0x7a] 351306 1 T1 54 T3 2060 T4 912
valid_sources[0x7b] 1547549 1 T1 30 T3 2016 T4 1004
valid_sources[0x7c] 370305 1 T1 17 T3 2090 T4 884
valid_sources[0x7d] 764413 1 T1 40 T3 2076 T4 876
valid_sources[0x7e] 344148 1 T1 35 T3 2103 T4 968
valid_sources[0x7f] 344536 1 T1 33 T3 2083 T4 947
valid_sources[0x80] 339459 1 T1 34 T3 2158 T4 876



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 61674853 1 T1 3960 T2 148972 T3 273589
values[0x0] all_enables biggest_size 924905 1 T1 17 T2 30 T3 26
values[0x1] all_enables biggest_size 921342 1 T1 12 T2 16 T3 17

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%