Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62143850	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	63645884	1		T1	292614		T2	32974		T3	283

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	124498753	1		T1	584690		T2	12795		T3	565
values[0x0]	613347	1		T1	44		T2	11522		T3	5
values[0x1]	677634	1		T1	54		T2	12919		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49625388	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	76164346	1		T1	351391		T2	34532		T3	320

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	361137	1		T2	123		T6	494		T7	10
valid_sources[0x01]	359957	1		T2	124		T6	463		T7	30
valid_sources[0x02]	356914	1		T2	154		T6	427		T7	27
valid_sources[0x03]	363088	1		T2	184		T6	466		T7	1
valid_sources[0x04]	361794	1		T2	206		T4	1		T6	442
valid_sources[0x05]	361889	1		T2	139		T4	1		T6	447
valid_sources[0x06]	364772	1		T2	103		T4	2		T6	471
valid_sources[0x07]	362830	1		T2	193		T4	2		T6	478
valid_sources[0x08]	359521	1		T2	127		T4	1		T6	468
valid_sources[0x09]	374136	1		T2	139		T6	475		T8	178
valid_sources[0x0a]	571993	1		T2	121		T4	9		T6	448
valid_sources[0x0b]	361755	1		T2	150		T4	2		T6	487
valid_sources[0x0c]	361334	1		T2	159		T6	452		T7	28
valid_sources[0x0d]	359364	1		T2	179		T6	478		T7	45
valid_sources[0x0e]	703137	1		T2	112		T4	5		T6	482
valid_sources[0x0f]	358598	1		T2	220		T6	470		T7	2
valid_sources[0x10]	360631	1		T2	195		T4	1		T6	398
valid_sources[0x11]	362444	1		T2	153		T6	464		T7	7
valid_sources[0x12]	362590	1		T2	115		T6	474		T7	27
valid_sources[0x13]	3430694	1		T2	189		T6	438		T7	21
valid_sources[0x14]	367529	1		T2	167		T6	471		T7	62
valid_sources[0x15]	358171	1		T2	146		T6	466		T7	7
valid_sources[0x16]	369506	1		T2	131		T4	3		T6	514
valid_sources[0x17]	705876	1		T2	136		T6	422		T7	6
valid_sources[0x18]	369950	1		T2	130		T6	480		T7	2
valid_sources[0x19]	360848	1		T2	145		T4	7		T6	443
valid_sources[0x1a]	358732	1		T2	169		T4	1		T6	429
valid_sources[0x1b]	358654	1		T2	134		T6	474		T7	52
valid_sources[0x1c]	361591	1		T2	171		T6	434		T7	10
valid_sources[0x1d]	1261395	1		T2	152		T6	480		T7	22
valid_sources[0x1e]	386546	1		T2	209		T6	502		T7	1
valid_sources[0x1f]	360909	1		T2	146		T4	2		T6	461
valid_sources[0x20]	360782	1		T2	147		T6	444		T7	28
valid_sources[0x21]	360949	1		T2	155		T6	467		T7	13
valid_sources[0x22]	358516	1		T2	133		T4	9		T6	452
valid_sources[0x23]	361137	1		T2	145		T4	3		T6	470
valid_sources[0x24]	362512	1		T2	110		T6	512		T7	1
valid_sources[0x25]	362228	1		T2	113		T4	2		T6	436
valid_sources[0x26]	363548	1		T2	115		T4	1		T6	459
valid_sources[0x27]	413604	1		T2	163		T4	4		T6	483
valid_sources[0x28]	772241	1		T2	118		T4	7		T6	444
valid_sources[0x29]	362838	1		T2	189		T6	488		T7	13
valid_sources[0x2a]	359130	1		T2	177		T4	9		T6	469
valid_sources[0x2b]	420895	1		T2	138		T6	490		T7	31
valid_sources[0x2c]	359818	1		T2	75		T4	1		T6	517
valid_sources[0x2d]	781210	1		T2	184		T4	6		T6	489
valid_sources[0x2e]	361026	1		T2	160		T6	461		T7	33
valid_sources[0x2f]	395568	1		T2	211		T6	496		T8	180
valid_sources[0x30]	1092836	1		T2	155		T4	5		T6	390
valid_sources[0x31]	359937	1		T2	89		T6	506		T7	58
valid_sources[0x32]	358046	1		T2	128		T6	485		T7	36
valid_sources[0x33]	360132	1		T2	141		T6	460		T7	15
valid_sources[0x34]	360332	1		T2	156		T6	452		T7	1
valid_sources[0x35]	614445	1		T2	148		T6	515		T7	2
valid_sources[0x36]	2125375	1		T2	129		T4	1		T6	504
valid_sources[0x37]	358798	1		T2	100		T6	471		T7	84
valid_sources[0x38]	358914	1		T2	176		T4	6		T6	443
valid_sources[0x39]	4296099	1		T2	115		T6	460		T8	172
valid_sources[0x3a]	361617	1		T2	112		T6	442		T7	59
valid_sources[0x3b]	374135	1		T2	279		T4	1		T6	488
valid_sources[0x3c]	356380	1		T2	105		T6	457		T7	2
valid_sources[0x3d]	791644	1		T2	165		T4	3		T6	458
valid_sources[0x3e]	359210	1		T2	133		T6	434		T7	8
valid_sources[0x3f]	361480	1		T2	105		T6	455		T7	7
valid_sources[0x40]	367020	1		T2	146		T4	1		T6	471
valid_sources[0x41]	363438	1		T2	209		T6	480		T7	57
valid_sources[0x42]	360975	1		T2	143		T4	4		T6	448
valid_sources[0x43]	362063	1		T2	140		T6	462		T7	31
valid_sources[0x44]	358987	1		T2	146		T6	457		T7	22
valid_sources[0x45]	361977	1		T2	203		T6	471		T7	1
valid_sources[0x46]	364016	1		T2	165		T6	479		T7	21
valid_sources[0x47]	358081	1		T2	147		T6	441		T7	63
valid_sources[0x48]	361985	1		T2	104		T6	485		T7	20
valid_sources[0x49]	369634	1		T2	149		T4	9		T6	464
valid_sources[0x4a]	359229	1		T2	157		T6	446		T8	177
valid_sources[0x4b]	412761	1		T2	92		T6	481		T7	49
valid_sources[0x4c]	360986	1		T2	161		T6	460		T7	40
valid_sources[0x4d]	359841	1		T2	146		T4	4		T6	467
valid_sources[0x4e]	361118	1		T2	169		T4	11		T6	457
valid_sources[0x4f]	358260	1		T2	111		T6	448		T8	173
valid_sources[0x50]	359200	1		T2	156		T6	524		T8	138
valid_sources[0x51]	361091	1		T2	106		T4	8		T6	453
valid_sources[0x52]	365154	1		T2	126		T6	470		T7	15
valid_sources[0x53]	457924	1		T2	193		T6	494		T7	16
valid_sources[0x54]	358429	1		T2	127		T6	436		T7	18
valid_sources[0x55]	2728269	1		T2	85		T4	4		T6	472
valid_sources[0x56]	380594	1		T2	138		T6	468		T7	5
valid_sources[0x57]	363693	1		T2	134		T6	440		T7	4
valid_sources[0x58]	358807	1		T2	193		T6	438		T7	14
valid_sources[0x59]	357610	1		T2	149		T6	454		T8	188
valid_sources[0x5a]	361305	1		T2	135		T4	8		T6	461
valid_sources[0x5b]	364316	1		T2	190		T6	437		T8	160
valid_sources[0x5c]	359205	1		T2	166		T4	3		T6	463
valid_sources[0x5d]	357776	1		T2	65		T6	480		T7	30
valid_sources[0x5e]	358970	1		T2	177		T4	3		T6	494
valid_sources[0x5f]	759055	1		T2	65		T6	501		T7	18
valid_sources[0x60]	378053	1		T2	201		T6	447		T7	48
valid_sources[0x61]	361317	1		T2	194		T4	6		T6	450
valid_sources[0x62]	357612	1		T2	198		T4	2		T6	454
valid_sources[0x63]	359704	1		T2	117		T6	464		T7	43
valid_sources[0x64]	357983	1		T2	194		T6	488		T8	182
valid_sources[0x65]	364538	1		T2	212		T6	464		T7	10
valid_sources[0x66]	947672	1		T1	584788		T2	161		T6	471
valid_sources[0x67]	356308	1		T2	113		T4	3		T6	471
valid_sources[0x68]	1121131	1		T2	184		T4	1		T6	460
valid_sources[0x69]	358972	1		T2	153		T6	426		T7	45
valid_sources[0x6a]	357836	1		T2	94		T4	6		T6	457
valid_sources[0x6b]	359854	1		T2	152		T6	472		T8	155
valid_sources[0x6c]	359028	1		T2	186		T6	468		T7	4
valid_sources[0x6d]	779601	1		T2	122		T6	449		T7	7
valid_sources[0x6e]	362331	1		T2	143		T4	2		T6	481
valid_sources[0x6f]	358279	1		T2	171		T6	423		T7	27
valid_sources[0x70]	360430	1		T2	249		T4	5		T6	456
valid_sources[0x71]	359866	1		T2	145		T6	469		T7	35
valid_sources[0x72]	360076	1		T2	106		T4	1		T6	477
valid_sources[0x73]	360314	1		T2	70		T4	8		T6	445
valid_sources[0x74]	372865	1		T2	69		T4	3		T6	480
valid_sources[0x75]	364007	1		T2	122		T6	456		T8	147
valid_sources[0x76]	358764	1		T2	120		T4	3		T6	500
valid_sources[0x77]	362663	1		T2	149		T6	448		T7	36
valid_sources[0x78]	393707	1		T2	98		T4	1		T6	468
valid_sources[0x79]	360448	1		T2	137		T4	10		T6	447
valid_sources[0x7a]	361075	1		T2	148		T4	1		T6	466
valid_sources[0x7b]	370394	1		T2	137		T6	497		T7	16
valid_sources[0x7c]	358927	1		T2	70		T6	462		T7	30
valid_sources[0x7d]	362058	1		T2	192		T6	454		T7	28
valid_sources[0x7e]	359779	1		T2	182		T4	1		T6	457
valid_sources[0x7f]	362391	1		T2	135		T6	496		T7	30
valid_sources[0x80]	356911	1		T2	110		T6	459		T7	44

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

62444472

1

T1

292534

T2

10092

T3

278

values[0x0]

all_enables

biggest_size

601467

1

T1

39

T2

11365

T3

4

values[0x1]

all_enables

biggest_size

599945

1

T1

41

T2

11517

T3

1