Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	61910437	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	62869759	1		T1	327362		T2	108457		T3	405

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	123950764	1		T1	655913		T2	216816		T3	778
values[0x0]	394482	1		T1	13		T2	100		T3	3
values[0x1]	434950	1		T1	17		T2	85		T3	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49451230	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	75328966	1		T1	393267		T2	130234		T3	479

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	316771	1		T1	2394		T2	8585		T4	1
valid_sources[0x01]	317162	1		T1	2474		T2	8386		T5	461
valid_sources[0x02]	317090	1		T1	2577		T2	8259		T5	477
valid_sources[0x03]	319997	1		T1	2650		T2	8602		T5	455
valid_sources[0x04]	319659	1		T1	2562		T2	8602		T5	385
valid_sources[0x05]	412286	1		T1	2504		T2	8483		T5	451
valid_sources[0x06]	319383	1		T1	2742		T2	8665		T5	457
valid_sources[0x07]	320519	1		T1	2585		T2	8243		T5	416
valid_sources[0x08]	315403	1		T1	2277		T2	8478		T5	389
valid_sources[0x09]	338618	1		T1	2515		T2	8506		T5	443
valid_sources[0x0a]	319142	1		T1	2506		T2	8307		T5	400
valid_sources[0x0b]	318858	1		T1	2437		T2	8521		T5	379
valid_sources[0x0c]	319370	1		T1	2462		T2	8357		T4	1
valid_sources[0x0d]	319356	1		T1	2583		T2	8559		T5	485
valid_sources[0x0e]	319524	1		T1	2712		T2	8453		T5	457
valid_sources[0x0f]	339051	1		T1	2611		T2	8663		T5	453
valid_sources[0x10]	319326	1		T1	2495		T2	8557		T4	1
valid_sources[0x11]	319873	1		T1	2818		T2	8517		T5	463
valid_sources[0x12]	317894	1		T1	2705		T2	8466		T5	370
valid_sources[0x13]	321729	1		T1	2796		T2	8477		T5	488
valid_sources[0x14]	582425	1		T1	2609		T2	8315		T5	365
valid_sources[0x15]	318839	1		T1	2342		T2	8601		T5	450
valid_sources[0x16]	406199	1		T1	2652		T2	8735		T5	405
valid_sources[0x17]	317730	1		T1	2517		T2	8493		T5	428
valid_sources[0x18]	319709	1		T1	2837		T2	8375		T5	436
valid_sources[0x19]	318731	1		T1	2531		T2	8586		T5	447
valid_sources[0x1a]	508463	1		T1	2557		T2	8414		T5	500
valid_sources[0x1b]	318472	1		T1	2660		T2	8501		T4	1
valid_sources[0x1c]	319583	1		T1	2575		T2	8354		T5	409
valid_sources[0x1d]	319550	1		T1	2461		T2	8368		T5	538
valid_sources[0x1e]	319648	1		T1	2440		T2	8554		T5	371
valid_sources[0x1f]	319114	1		T1	2714		T2	8451		T5	450
valid_sources[0x20]	319176	1		T1	2596		T2	8512		T5	430
valid_sources[0x21]	322201	1		T1	2443		T2	8646		T5	474
valid_sources[0x22]	1283797	1		T1	2633		T2	8636		T5	424
valid_sources[0x23]	327068	1		T1	2582		T2	8522		T4	1
valid_sources[0x24]	967189	1		T1	2443		T2	8309		T5	402
valid_sources[0x25]	317610	1		T1	2583		T2	8510		T5	487
valid_sources[0x26]	320541	1		T1	2518		T2	8547		T5	418
valid_sources[0x27]	2345706	1		T1	2416		T2	8390		T5	429
valid_sources[0x28]	1842618	1		T1	2653		T2	8484		T5	402
valid_sources[0x29]	316954	1		T1	2539		T2	8382		T5	433
valid_sources[0x2a]	318481	1		T1	2513		T2	8420		T5	415
valid_sources[0x2b]	384861	1		T1	2637		T2	8355		T5	395
valid_sources[0x2c]	317251	1		T1	2491		T2	8440		T4	1
valid_sources[0x2d]	319438	1		T1	2547		T2	8485		T5	383
valid_sources[0x2e]	318094	1		T1	2362		T2	8247		T5	417
valid_sources[0x2f]	321765	1		T1	2611		T2	8577		T5	398
valid_sources[0x30]	319400	1		T1	2509		T2	8299		T5	426
valid_sources[0x31]	320668	1		T1	2607		T2	8592		T5	413
valid_sources[0x32]	320004	1		T1	2491		T2	8488		T5	422
valid_sources[0x33]	316750	1		T1	2499		T2	8451		T5	479
valid_sources[0x34]	318099	1		T1	2607		T2	8437		T5	436
valid_sources[0x35]	1318766	1		T1	2645		T2	8401		T5	539
valid_sources[0x36]	316599	1		T1	2481		T2	8488		T5	507
valid_sources[0x37]	321279	1		T1	2523		T2	8489		T3	785
valid_sources[0x38]	1076873	1		T1	2700		T2	8464		T5	358
valid_sources[0x39]	652552	1		T1	2632		T2	8432		T5	451
valid_sources[0x3a]	760729	1		T1	2565		T2	8762		T5	446
valid_sources[0x3b]	344376	1		T1	2515		T2	8476		T5	391
valid_sources[0x3c]	317762	1		T1	2573		T2	8557		T5	448
valid_sources[0x3d]	2319404	1		T1	2687		T2	8525		T5	416
valid_sources[0x3e]	318367	1		T1	2611		T2	8407		T5	426
valid_sources[0x3f]	319687	1		T1	2423		T2	8475		T5	418
valid_sources[0x40]	319781	1		T1	2467		T2	8473		T5	428
valid_sources[0x41]	319079	1		T1	2560		T2	8308		T4	1
valid_sources[0x42]	324139	1		T1	2419		T2	8500		T5	448
valid_sources[0x43]	1004053	1		T1	2707		T2	8553		T5	464
valid_sources[0x44]	332462	1		T1	2675		T2	8341		T5	469
valid_sources[0x45]	319594	1		T1	2444		T2	8558		T5	494
valid_sources[0x46]	317998	1		T1	2709		T2	8310		T5	447
valid_sources[0x47]	317745	1		T1	2449		T2	8412		T5	331
valid_sources[0x48]	319794	1		T1	2536		T2	8506		T5	335
valid_sources[0x49]	315945	1		T1	2680		T2	8523		T5	440
valid_sources[0x4a]	317601	1		T1	2407		T2	8558		T4	1
valid_sources[0x4b]	377841	1		T1	2577		T2	8421		T5	466
valid_sources[0x4c]	452034	1		T1	2443		T2	8484		T5	445
valid_sources[0x4d]	318185	1		T1	2516		T2	8323		T5	419
valid_sources[0x4e]	319193	1		T1	2695		T2	8488		T5	445
valid_sources[0x4f]	316592	1		T1	2650		T2	8538		T5	411
valid_sources[0x50]	319365	1		T1	2642		T2	8417		T5	366
valid_sources[0x51]	352475	1		T1	2468		T2	8553		T5	467
valid_sources[0x52]	570356	1		T1	2557		T2	8417		T4	1
valid_sources[0x53]	317126	1		T1	2500		T2	8412		T5	416
valid_sources[0x54]	317882	1		T1	2442		T2	8399		T5	414
valid_sources[0x55]	335893	1		T1	2659		T2	8465		T5	454
valid_sources[0x56]	974380	1		T1	2526		T2	8346		T5	418
valid_sources[0x57]	318061	1		T1	2534		T2	8331		T5	476
valid_sources[0x58]	318789	1		T1	2713		T2	8601		T5	403
valid_sources[0x59]	318543	1		T1	2507		T2	8534		T5	397
valid_sources[0x5a]	319394	1		T1	2525		T2	8400		T5	378
valid_sources[0x5b]	319242	1		T1	2469		T2	8453		T5	368
valid_sources[0x5c]	318785	1		T1	2587		T2	8450		T5	398
valid_sources[0x5d]	2718208	1		T1	2523		T2	8430		T5	421
valid_sources[0x5e]	319014	1		T1	2622		T2	8495		T5	418
valid_sources[0x5f]	320214	1		T1	2681		T2	8370		T5	478
valid_sources[0x60]	320142	1		T1	2537		T2	8465		T5	398
valid_sources[0x61]	424485	1		T1	2581		T2	8454		T5	505
valid_sources[0x62]	573400	1		T1	2533		T2	8528		T4	1
valid_sources[0x63]	326005	1		T1	2689		T2	8452		T5	490
valid_sources[0x64]	1140900	1		T1	2417		T2	8556		T5	387
valid_sources[0x65]	1219920	1		T1	2560		T2	8514		T5	389
valid_sources[0x66]	320506	1		T1	2717		T2	8438		T4	1
valid_sources[0x67]	316124	1		T1	2551		T2	8510		T5	387
valid_sources[0x68]	317187	1		T1	2607		T2	8587		T5	468
valid_sources[0x69]	321163	1		T1	2525		T2	8523		T5	381
valid_sources[0x6a]	547486	1		T1	2474		T2	8422		T5	426
valid_sources[0x6b]	1146625	1		T1	2363		T2	8433		T5	392
valid_sources[0x6c]	320348	1		T1	2476		T2	8305		T5	415
valid_sources[0x6d]	316967	1		T1	2536		T2	8297		T5	428
valid_sources[0x6e]	319381	1		T1	2436		T2	8445		T5	410
valid_sources[0x6f]	319226	1		T1	2525		T2	8470		T5	459
valid_sources[0x70]	317918	1		T1	2291		T2	8588		T5	439
valid_sources[0x71]	318646	1		T1	2672		T2	8430		T5	412
valid_sources[0x72]	320588	1		T1	2765		T2	8402		T5	443
valid_sources[0x73]	316044	1		T1	2573		T2	8508		T5	498
valid_sources[0x74]	317145	1		T1	2566		T2	8427		T5	431
valid_sources[0x75]	320074	1		T1	2644		T2	8484		T5	446
valid_sources[0x76]	316945	1		T1	2606		T2	8538		T5	420
valid_sources[0x77]	690875	1		T1	2707		T2	8461		T5	408
valid_sources[0x78]	881285	1		T1	2541		T2	8556		T5	482
valid_sources[0x79]	353427	1		T1	2623		T2	8504		T5	405
valid_sources[0x7a]	479227	1		T1	2650		T2	8496		T4	1
valid_sources[0x7b]	317324	1		T1	2662		T2	8357		T4	1
valid_sources[0x7c]	326267	1		T1	2456		T2	8373		T4	1
valid_sources[0x7d]	318448	1		T1	2756		T2	8426		T5	402
valid_sources[0x7e]	318953	1		T1	2635		T2	8590		T5	404
valid_sources[0x7f]	318794	1		T1	2574		T2	8369		T5	398
valid_sources[0x80]	319062	1		T1	2599		T2	8343		T5	374

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

62100167

1

T1

327341

T2

108443

T3

399

values[0x0]

all_enables

biggest_size

385420

1

T1

10

T2

80

T3

3

values[0x1]

all_enables

biggest_size

384172

1

T1

11

T2

62

T3

3