Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	72110183	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	73327637	1		T1	71704		T2	125224		T3	216876

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	144373765	1		T1	143023		T2	250512		T3	433912
values[0x0]	505269	1		T1	50		T2	27		T3	21
values[0x1]	558786	1		T1	50		T2	24		T3	29

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57595771	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	87842049	1		T1	86078		T2	150360		T3	260450

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	415537	1		T3	16798		T4	2375		T5	39
valid_sources[0x01]	415646	1		T3	16904		T4	2224		T5	36
valid_sources[0x02]	416051	1		T3	16930		T4	2344		T5	28
valid_sources[0x03]	436378	1		T3	16730		T4	2309		T5	37
valid_sources[0x04]	417373	1		T3	16937		T4	2173		T5	46
valid_sources[0x05]	555271	1		T3	17044		T4	2347		T5	36
valid_sources[0x06]	2585923	1		T3	17055		T4	2360		T5	32
valid_sources[0x07]	418365	1		T3	16908		T4	2234		T5	40
valid_sources[0x08]	726350	1		T3	17162		T4	2281		T5	53
valid_sources[0x09]	496579	1		T3	17001		T4	2179		T5	28
valid_sources[0x0a]	870673	1		T3	17001		T4	2235		T5	32
valid_sources[0x0b]	414989	1		T3	16702		T4	2153		T5	32
valid_sources[0x0c]	417107	1		T3	16974		T4	2395		T5	37
valid_sources[0x0d]	416799	1		T3	17208		T4	2337		T5	44
valid_sources[0x0e]	417008	1		T3	17082		T4	2035		T5	36
valid_sources[0x0f]	415961	1		T3	16967		T4	2223		T5	26
valid_sources[0x10]	1078202	1		T3	17066		T4	2319		T5	37
valid_sources[0x11]	417526	1		T3	16921		T4	2196		T5	37
valid_sources[0x12]	417061	1		T3	16940		T4	2180		T5	35
valid_sources[0x13]	415082	1		T3	16987		T4	2272		T5	43
valid_sources[0x14]	419644	1		T3	16758		T4	2185		T5	32
valid_sources[0x15]	491010	1		T3	17230		T4	2184		T5	30
valid_sources[0x16]	417397	1		T3	16761		T4	2155		T5	43
valid_sources[0x17]	418884	1		T3	17008		T4	2218		T5	39
valid_sources[0x18]	435969	1		T3	16838		T4	2163		T5	52
valid_sources[0x19]	420236	1		T3	16997		T4	2127		T5	34
valid_sources[0x1a]	455411	1		T3	16863		T4	2396		T5	32
valid_sources[0x1b]	1113543	1		T3	16921		T4	2312		T5	36
valid_sources[0x1c]	416731	1		T3	16841		T4	2190		T5	34
valid_sources[0x1d]	603903	1		T3	17077		T4	2269		T5	44
valid_sources[0x1e]	8260826	1		T3	16984		T4	2371		T5	33
valid_sources[0x1f]	418676	1		T3	17139		T4	2227		T5	29
valid_sources[0x20]	417410	1		T3	16997		T4	2084		T5	31
valid_sources[0x21]	418156	1		T3	16747		T4	2318		T5	30
valid_sources[0x22]	414906	1		T3	16893		T4	2186		T5	44
valid_sources[0x23]	411907	1		T3	16873		T4	2298		T5	31
valid_sources[0x24]	418087	1		T3	17019		T4	2149		T5	29
valid_sources[0x25]	416648	1		T3	17006		T4	2172		T5	43
valid_sources[0x26]	417242	1		T3	16962		T4	2242		T5	36
valid_sources[0x27]	415565	1		T3	16805		T4	2155		T5	37
valid_sources[0x28]	417125	1		T3	16909		T4	2141		T5	45
valid_sources[0x29]	429743	1		T3	17015		T4	2125		T5	44
valid_sources[0x2a]	413995	1		T3	17061		T4	2345		T5	40
valid_sources[0x2b]	655200	1		T3	16957		T4	2257		T5	42
valid_sources[0x2c]	417850	1		T3	16962		T4	2222		T5	47
valid_sources[0x2d]	416324	1		T3	16857		T4	2190		T5	54
valid_sources[0x2e]	415237	1		T3	17034		T4	2224		T5	42
valid_sources[0x2f]	437369	1		T3	16977		T4	2157		T5	32
valid_sources[0x30]	415341	1		T3	16767		T4	2243		T5	30
valid_sources[0x31]	746491	1		T3	16865		T4	2218		T5	23
valid_sources[0x32]	456269	1		T3	16841		T4	2219		T5	42
valid_sources[0x33]	1010632	1		T3	16967		T4	2248		T5	33
valid_sources[0x34]	416683	1		T3	16989		T4	2359		T5	45
valid_sources[0x35]	547651	1		T3	17053		T4	2183		T5	37
valid_sources[0x36]	448029	1		T3	17063		T4	2133		T5	39
valid_sources[0x37]	416239	1		T3	16945		T4	2288		T5	32
valid_sources[0x38]	436851	1		T3	16834		T4	2047		T5	46
valid_sources[0x39]	417390	1		T3	16888		T4	2274		T5	37
valid_sources[0x3a]	437807	1		T3	16805		T4	2163		T5	26
valid_sources[0x3b]	417560	1		T3	17044		T4	2107		T5	29
valid_sources[0x3c]	417995	1		T3	17051		T4	2313		T5	40
valid_sources[0x3d]	763799	1		T3	17119		T4	2320		T5	31
valid_sources[0x3e]	418467	1		T3	16693		T4	2125		T5	49
valid_sources[0x3f]	418994	1		T3	16893		T4	2278		T5	35
valid_sources[0x40]	416188	1		T3	16704		T4	2316		T5	36
valid_sources[0x41]	413543	1		T3	16733		T4	2182		T5	44
valid_sources[0x42]	417843	1		T3	17167		T4	2123		T5	27
valid_sources[0x43]	415133	1		T3	17103		T4	2097		T5	34
valid_sources[0x44]	613884	1		T3	16958		T4	2256		T5	36
valid_sources[0x45]	473988	1		T3	16932		T4	2192		T5	48
valid_sources[0x46]	444629	1		T3	17000		T4	2348		T5	36
valid_sources[0x47]	417415	1		T3	16949		T4	2237		T5	41
valid_sources[0x48]	416139	1		T3	16887		T4	2158		T5	26
valid_sources[0x49]	470872	1		T3	16987		T4	2194		T5	40
valid_sources[0x4a]	417669	1		T3	17303		T4	2349		T5	28
valid_sources[0x4b]	419165	1		T3	17071		T4	2097		T5	39
valid_sources[0x4c]	414466	1		T3	16760		T4	2301		T5	36
valid_sources[0x4d]	629215	1		T3	16708		T4	2232		T5	35
valid_sources[0x4e]	415479	1		T3	17061		T4	2291		T5	40
valid_sources[0x4f]	415946	1		T3	17221		T4	2215		T5	35
valid_sources[0x50]	413832	1		T3	16862		T4	2454		T5	27
valid_sources[0x51]	418296	1		T3	17080		T4	2317		T5	37
valid_sources[0x52]	415230	1		T3	17066		T4	2240		T5	33
valid_sources[0x53]	2670392	1		T3	17042		T4	2331		T5	49
valid_sources[0x54]	422071	1		T3	16925		T4	2396		T5	36
valid_sources[0x55]	416593	1		T3	16610		T4	2161		T5	27
valid_sources[0x56]	450653	1		T3	16799		T4	2183		T5	26
valid_sources[0x57]	416060	1		T3	16777		T4	2287		T5	44
valid_sources[0x58]	416788	1		T3	16627		T4	2134		T5	37
valid_sources[0x59]	415928	1		T3	16766		T4	2209		T5	43
valid_sources[0x5a]	3046386	1		T3	17108		T4	2261		T5	40
valid_sources[0x5b]	418058	1		T3	16921		T4	2398		T5	39
valid_sources[0x5c]	422495	1		T3	17225		T4	2064		T5	38
valid_sources[0x5d]	415240	1		T3	17039		T4	2482		T5	37
valid_sources[0x5e]	415806	1		T3	17075		T4	2291		T5	33
valid_sources[0x5f]	438900	1		T3	16819		T4	2324		T5	26
valid_sources[0x60]	414657	1		T3	17198		T4	2090		T5	37
valid_sources[0x61]	414912	1		T3	17006		T4	2335		T5	32
valid_sources[0x62]	414903	1		T3	16783		T4	2173		T5	32
valid_sources[0x63]	416809	1		T3	16877		T4	2123		T5	47
valid_sources[0x64]	1513509	1		T3	16955		T4	2188		T5	28
valid_sources[0x65]	473347	1		T3	16715		T4	2199		T5	32
valid_sources[0x66]	919946	1		T3	17012		T4	2217		T5	39
valid_sources[0x67]	418275	1		T3	16916		T4	2367		T5	35
valid_sources[0x68]	416715	1		T3	16803		T4	2233		T5	19
valid_sources[0x69]	415244	1		T3	16988		T4	2313		T5	41
valid_sources[0x6a]	417203	1		T3	16980		T4	2180		T5	43
valid_sources[0x6b]	413490	1		T3	16660		T4	2114		T5	29
valid_sources[0x6c]	437853	1		T3	16947		T4	2260		T5	32
valid_sources[0x6d]	417265	1		T3	17031		T4	2166		T5	35
valid_sources[0x6e]	417213	1		T3	16911		T4	2489		T5	24
valid_sources[0x6f]	415755	1		T3	16712		T4	2209		T5	37
valid_sources[0x70]	876724	1		T3	16831		T4	2242		T5	43
valid_sources[0x71]	413197	1		T3	16809		T4	2238		T5	36
valid_sources[0x72]	420686	1		T3	16860		T4	2280		T5	26
valid_sources[0x73]	416769	1		T3	17088		T4	2216		T5	35
valid_sources[0x74]	782521	1		T3	17153		T4	2220		T5	44
valid_sources[0x75]	417220	1		T3	17105		T4	2320		T5	26
valid_sources[0x76]	417752	1		T3	16904		T4	2261		T5	42
valid_sources[0x77]	806438	1		T3	16969		T4	2382		T5	34
valid_sources[0x78]	418548	1		T3	17003		T4	2231		T5	24
valid_sources[0x79]	418968	1		T3	17076		T4	2246		T5	33
valid_sources[0x7a]	740561	1		T3	16960		T4	2165		T5	38
valid_sources[0x7b]	418074	1		T3	17215		T4	2239		T5	34
valid_sources[0x7c]	434092	1		T3	16911		T4	2253		T5	38
valid_sources[0x7d]	418598	1		T3	16967		T4	2294		T5	36
valid_sources[0x7e]	1310253	1		T3	16747		T4	2287		T5	43
valid_sources[0x7f]	417616	1		T3	16730		T4	2197		T5	44
valid_sources[0x80]	415075	1		T3	16894		T4	2108		T5	21

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

72336959

1

T1

71627

T2

125184

T3

216872

values[0x0]

all_enables

biggest_size

495402

1

T1

40

T2

24

T3

16

values[0x1]

all_enables

biggest_size

495276

1

T1

37

T2

16

T3

21