Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	63585451	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	65432889	1		T1	1701		T2	18920		T3	1477

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	127436319	1		T1	3261		T2	37868		T3	2926
values[0x0]	753487	1		T1	27		T2	92		T3	3
values[0x1]	828534	1		T1	19		T2	109		T3	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50765246	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	78253094	1		T1	2001		T2	22813		T3	1764

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	375773	1		T2	151		T3	2		T4	162
valid_sources[0x01]	391444	1		T2	129		T3	10		T4	119
valid_sources[0x02]	385462	1		T2	152		T3	15		T4	133
valid_sources[0x03]	371339	1		T2	147		T3	16		T4	109
valid_sources[0x04]	374540	1		T2	137		T3	12		T4	111
valid_sources[0x05]	370994	1		T2	173		T3	16		T4	113
valid_sources[0x06]	372439	1		T2	146		T3	12		T4	146
valid_sources[0x07]	372582	1		T2	118		T3	14		T4	100
valid_sources[0x08]	372644	1		T2	175		T3	12		T4	125
valid_sources[0x09]	371460	1		T2	146		T3	12		T4	157
valid_sources[0x0a]	378045	1		T2	175		T3	15		T4	131
valid_sources[0x0b]	374993	1		T2	151		T3	11		T4	91
valid_sources[0x0c]	371755	1		T2	137		T3	9		T4	77
valid_sources[0x0d]	373441	1		T2	145		T3	5		T4	149
valid_sources[0x0e]	370665	1		T2	146		T3	8		T4	142
valid_sources[0x0f]	370648	1		T2	172		T3	15		T4	123
valid_sources[0x10]	394184	1		T2	152		T3	10		T4	150
valid_sources[0x11]	371466	1		T2	163		T3	16		T4	132
valid_sources[0x12]	392209	1		T2	127		T3	10		T4	134
valid_sources[0x13]	384023	1		T2	146		T3	12		T4	123
valid_sources[0x14]	380505	1		T2	172		T3	16		T4	143
valid_sources[0x15]	375165	1		T2	163		T3	9		T4	100
valid_sources[0x16]	391637	1		T2	140		T3	14		T4	150
valid_sources[0x17]	391228	1		T2	175		T3	6		T4	116
valid_sources[0x18]	374120	1		T2	179		T3	6		T4	143
valid_sources[0x19]	617840	1		T2	145		T3	6		T4	121
valid_sources[0x1a]	373324	1		T2	137		T3	8		T4	125
valid_sources[0x1b]	371680	1		T2	167		T3	15		T4	116
valid_sources[0x1c]	373803	1		T2	177		T3	7		T4	134
valid_sources[0x1d]	372854	1		T2	172		T3	10		T4	123
valid_sources[0x1e]	375004	1		T2	157		T3	10		T4	99
valid_sources[0x1f]	374382	1		T2	137		T3	14		T4	188
valid_sources[0x20]	369100	1		T2	156		T3	16		T4	155
valid_sources[0x21]	388975	1		T2	143		T3	15		T4	103
valid_sources[0x22]	372942	1		T2	143		T3	7		T4	90
valid_sources[0x23]	372501	1		T2	173		T3	11		T4	122
valid_sources[0x24]	372416	1		T2	152		T3	7		T4	106
valid_sources[0x25]	375522	1		T2	172		T3	10		T4	112
valid_sources[0x26]	372465	1		T2	130		T3	5		T4	124
valid_sources[0x27]	419663	1		T2	136		T3	8		T4	167
valid_sources[0x28]	381427	1		T2	154		T3	17		T4	130
valid_sources[0x29]	372563	1		T2	155		T3	14		T4	127
valid_sources[0x2a]	373352	1		T2	136		T3	14		T4	120
valid_sources[0x2b]	393958	1		T2	124		T3	7		T4	123
valid_sources[0x2c]	372385	1		T2	169		T3	10		T4	127
valid_sources[0x2d]	425540	1		T2	153		T3	15		T4	105
valid_sources[0x2e]	1415419	1		T2	178		T3	12		T4	131
valid_sources[0x2f]	375687	1		T2	136		T3	11		T4	137
valid_sources[0x30]	371610	1		T2	145		T3	9		T4	140
valid_sources[0x31]	451073	1		T2	148		T3	15		T4	150
valid_sources[0x32]	375379	1		T2	149		T3	15		T4	114
valid_sources[0x33]	377071	1		T2	163		T3	11		T4	155
valid_sources[0x34]	999140	1		T2	156		T3	7		T4	146
valid_sources[0x35]	437928	1		T2	159		T3	14		T4	119
valid_sources[0x36]	896582	1		T2	154		T3	7		T4	134
valid_sources[0x37]	368043	1		T2	149		T3	8		T4	114
valid_sources[0x38]	584657	1		T2	158		T3	11		T4	141
valid_sources[0x39]	1348570	1		T2	157		T3	14		T4	123
valid_sources[0x3a]	1344438	1		T2	133		T3	18		T4	115
valid_sources[0x3b]	373227	1		T2	135		T3	14		T4	92
valid_sources[0x3c]	1359375	1		T2	141		T3	11		T4	99
valid_sources[0x3d]	378303	1		T2	176		T3	11		T4	157
valid_sources[0x3e]	371624	1		T2	144		T3	9		T4	123
valid_sources[0x3f]	374713	1		T2	164		T3	15		T4	115
valid_sources[0x40]	371678	1		T2	174		T3	8		T4	142
valid_sources[0x41]	400389	1		T2	133		T3	5		T4	157
valid_sources[0x42]	375908	1		T2	124		T3	10		T4	96
valid_sources[0x43]	369974	1		T2	148		T3	10		T4	148
valid_sources[0x44]	370522	1		T2	150		T3	9		T4	129
valid_sources[0x45]	373153	1		T2	138		T3	15		T4	114
valid_sources[0x46]	372939	1		T2	136		T3	12		T4	126
valid_sources[0x47]	596543	1		T2	158		T3	18		T4	122
valid_sources[0x48]	379077	1		T2	135		T3	18		T4	145
valid_sources[0x49]	373254	1		T2	134		T3	9		T4	114
valid_sources[0x4a]	375213	1		T2	145		T3	11		T4	117
valid_sources[0x4b]	369490	1		T2	133		T3	8		T4	112
valid_sources[0x4c]	902120	1		T2	124		T3	13		T4	90
valid_sources[0x4d]	377797	1		T2	142		T3	7		T4	92
valid_sources[0x4e]	371869	1		T2	130		T3	18		T4	174
valid_sources[0x4f]	1282721	1		T2	164		T3	16		T4	132
valid_sources[0x50]	377944	1		T2	145		T3	10		T4	123
valid_sources[0x51]	370140	1		T2	168		T3	6		T4	144
valid_sources[0x52]	374741	1		T2	125		T3	5		T4	85
valid_sources[0x53]	369948	1		T2	155		T3	12		T4	102
valid_sources[0x54]	372894	1		T2	188		T3	13		T4	92
valid_sources[0x55]	2187762	1		T2	159		T3	14		T4	150
valid_sources[0x56]	371619	1		T2	160		T3	6		T4	143
valid_sources[0x57]	370570	1		T2	131		T3	13		T4	153
valid_sources[0x58]	499741	1		T2	148		T3	15		T4	125
valid_sources[0x59]	373930	1		T2	165		T3	8		T4	99
valid_sources[0x5a]	431572	1		T2	156		T3	13		T4	116
valid_sources[0x5b]	372643	1		T2	133		T3	24		T4	130
valid_sources[0x5c]	798712	1		T2	150		T3	7		T4	127
valid_sources[0x5d]	374991	1		T2	164		T3	9		T4	110
valid_sources[0x5e]	372136	1		T2	151		T3	9		T4	112
valid_sources[0x5f]	373198	1		T2	169		T3	9		T4	170
valid_sources[0x60]	371533	1		T2	128		T3	12		T4	134
valid_sources[0x61]	376140	1		T2	133		T3	16		T4	149
valid_sources[0x62]	373191	1		T2	145		T3	12		T4	106
valid_sources[0x63]	372759	1		T2	128		T3	11		T4	113
valid_sources[0x64]	371447	1		T2	144		T3	13		T4	133
valid_sources[0x65]	1392037	1		T2	126		T3	14		T4	115
valid_sources[0x66]	370662	1		T2	120		T3	10		T4	155
valid_sources[0x67]	374215	1		T2	157		T3	15		T4	146
valid_sources[0x68]	1169154	1		T2	150		T3	8		T4	106
valid_sources[0x69]	1323495	1		T2	121		T3	12		T4	133
valid_sources[0x6a]	403535	1		T2	150		T3	12		T4	113
valid_sources[0x6b]	373081	1		T2	163		T3	16		T4	136
valid_sources[0x6c]	373690	1		T2	182		T3	11		T4	133
valid_sources[0x6d]	375332	1		T2	132		T3	18		T4	147
valid_sources[0x6e]	370919	1		T2	162		T3	12		T4	89
valid_sources[0x6f]	369076	1		T2	182		T3	16		T4	96
valid_sources[0x70]	372358	1		T2	136		T3	9		T4	83
valid_sources[0x71]	373532	1		T2	167		T3	16		T4	101
valid_sources[0x72]	373973	1		T2	124		T3	15		T4	153
valid_sources[0x73]	371974	1		T2	146		T3	7		T4	110
valid_sources[0x74]	986203	1		T2	152		T3	11		T4	109
valid_sources[0x75]	373114	1		T2	178		T3	16		T4	149
valid_sources[0x76]	369013	1		T2	119		T3	7		T4	143
valid_sources[0x77]	433292	1		T2	149		T3	5		T4	120
valid_sources[0x78]	372567	1		T2	133		T3	10		T4	132
valid_sources[0x79]	374685	1		T1	3307		T2	146		T3	17
valid_sources[0x7a]	918576	1		T2	181		T3	12		T4	74
valid_sources[0x7b]	370474	1		T2	152		T3	11		T4	151
valid_sources[0x7c]	373460	1		T2	141		T3	7		T4	133
valid_sources[0x7d]	374442	1		T2	165		T3	17		T4	142
valid_sources[0x7e]	370337	1		T2	128		T3	17		T4	140
valid_sources[0x7f]	368797	1		T2	162		T3	17		T4	133
valid_sources[0x80]	370771	1		T2	140		T3	6		T4	119

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

63957350

1

T1

1665

T2

18804

T3

1472

values[0x0]

all_enables

biggest_size

740102

1

T1

21

T2

56

T3

3

values[0x1]

all_enables

biggest_size

735437

1

T1

15

T2

60

T3

2