Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 60402397 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 61192548 1 T1 32918 T2 4055 T3 16485



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 120887745 1 T1 10952 T2 8026 T3 32743
values[0x0] 337074 1 T1 12077 T2 23 T3 26
values[0x1] 370126 1 T1 13286 T2 17 T3 14



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 48246946 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 73347999 1 T1 34311 T2 4823 T3 19811



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 359059 1 T1 150 T3 150 T7 479
valid_sources[0x01] 416242 1 T1 165 T3 121 T4 2
valid_sources[0x02] 360994 1 T1 139 T3 109 T4 7
valid_sources[0x03] 363539 1 T1 153 T3 137 T4 6
valid_sources[0x04] 361249 1 T1 121 T3 122 T7 478
valid_sources[0x05] 361435 1 T1 108 T3 123 T7 559
valid_sources[0x06] 361138 1 T1 181 T3 114 T4 41
valid_sources[0x07] 685484 1 T1 125 T3 122 T7 580
valid_sources[0x08] 448585 1 T1 166 T3 128 T4 17
valid_sources[0x09] 361541 1 T1 164 T3 145 T7 644
valid_sources[0x0a] 360647 1 T1 226 T3 136 T7 575
valid_sources[0x0b] 360665 1 T1 100 T3 113 T4 15
valid_sources[0x0c] 361142 1 T1 153 T3 125 T4 10
valid_sources[0x0d] 360933 1 T1 116 T3 124 T4 4
valid_sources[0x0e] 361186 1 T1 152 T3 128 T4 6
valid_sources[0x0f] 362772 1 T1 120 T3 124 T4 5
valid_sources[0x10] 358814 1 T1 144 T3 132 T7 619
valid_sources[0x11] 358751 1 T1 132 T3 125 T4 2
valid_sources[0x12] 362182 1 T1 113 T3 120 T7 564
valid_sources[0x13] 364221 1 T1 122 T3 132 T4 25
valid_sources[0x14] 363445 1 T1 174 T3 138 T4 1
valid_sources[0x15] 902064 1 T1 142 T3 123 T4 1
valid_sources[0x16] 363307 1 T1 119 T3 131 T7 561
valid_sources[0x17] 360460 1 T1 97 T3 125 T7 419
valid_sources[0x18] 359569 1 T1 165 T3 126 T4 26
valid_sources[0x19] 363967 1 T1 132 T3 131 T7 375
valid_sources[0x1a] 788392 1 T1 146 T3 141 T4 15
valid_sources[0x1b] 360977 1 T1 182 T3 136 T7 435
valid_sources[0x1c] 361148 1 T1 113 T3 142 T4 3
valid_sources[0x1d] 497829 1 T1 125 T3 144 T4 5
valid_sources[0x1e] 361540 1 T1 150 T3 116 T4 24
valid_sources[0x1f] 1291802 1 T1 128 T3 133 T7 682
valid_sources[0x20] 360283 1 T1 146 T3 129 T4 17
valid_sources[0x21] 370879 1 T1 98 T3 137 T7 617
valid_sources[0x22] 360306 1 T1 139 T3 121 T7 624
valid_sources[0x23] 360022 1 T1 157 T3 149 T7 446
valid_sources[0x24] 441094 1 T1 128 T3 132 T7 677
valid_sources[0x25] 365900 1 T1 123 T3 118 T4 16
valid_sources[0x26] 486296 1 T1 142 T3 124 T7 567
valid_sources[0x27] 358305 1 T1 128 T3 136 T4 1
valid_sources[0x28] 388087 1 T1 133 T3 131 T7 560
valid_sources[0x29] 385486 1 T1 158 T3 131 T7 552
valid_sources[0x2a] 362268 1 T1 152 T3 139 T7 500
valid_sources[0x2b] 366216 1 T1 101 T3 139 T4 1
valid_sources[0x2c] 392098 1 T1 120 T3 131 T7 677
valid_sources[0x2d] 362088 1 T1 135 T3 121 T4 1
valid_sources[0x2e] 361437 1 T1 111 T3 130 T7 681
valid_sources[0x2f] 361034 1 T1 137 T3 134 T7 492
valid_sources[0x30] 360424 1 T1 153 T3 121 T4 14
valid_sources[0x31] 1213939 1 T1 85 T3 133 T7 531
valid_sources[0x32] 360738 1 T1 135 T3 122 T7 458
valid_sources[0x33] 361944 1 T1 152 T3 132 T7 554
valid_sources[0x34] 362041 1 T1 133 T3 122 T4 13
valid_sources[0x35] 362602 1 T1 187 T3 106 T7 723
valid_sources[0x36] 385195 1 T1 146 T3 152 T4 2
valid_sources[0x37] 576503 1 T1 133 T3 118 T4 10
valid_sources[0x38] 361735 1 T1 193 T3 124 T4 13
valid_sources[0x39] 364072 1 T1 126 T3 120 T4 7
valid_sources[0x3a] 1094329 1 T1 135 T3 130 T4 8
valid_sources[0x3b] 364289 1 T1 127 T3 153 T7 595
valid_sources[0x3c] 357594 1 T1 117 T3 120 T7 705
valid_sources[0x3d] 361586 1 T1 126 T3 131 T4 12
valid_sources[0x3e] 460352 1 T1 128 T3 125 T7 548
valid_sources[0x3f] 361628 1 T1 116 T3 121 T4 13
valid_sources[0x40] 360404 1 T1 144 T3 124 T7 598
valid_sources[0x41] 893021 1 T1 157 T3 115 T4 19
valid_sources[0x42] 360419 1 T1 145 T3 122 T7 474
valid_sources[0x43] 561620 1 T1 124 T3 121 T4 2
valid_sources[0x44] 361342 1 T1 92 T3 124 T4 2
valid_sources[0x45] 604099 1 T1 180 T3 139 T7 606
valid_sources[0x46] 2584579 1 T1 173 T3 126 T4 12
valid_sources[0x47] 359550 1 T1 147 T3 142 T4 5
valid_sources[0x48] 363038 1 T1 200 T3 148 T4 2
valid_sources[0x49] 360579 1 T1 174 T3 136 T7 708
valid_sources[0x4a] 363536 1 T1 152 T3 126 T4 16
valid_sources[0x4b] 361644 1 T1 110 T3 128 T7 640
valid_sources[0x4c] 361315 1 T1 113 T3 124 T4 2
valid_sources[0x4d] 361284 1 T1 177 T3 131 T4 21
valid_sources[0x4e] 361553 1 T1 106 T3 128 T4 11
valid_sources[0x4f] 523249 1 T1 122 T3 128 T7 667
valid_sources[0x50] 440399 1 T1 125 T3 123 T7 498
valid_sources[0x51] 363844 1 T1 131 T3 119 T4 23
valid_sources[0x52] 365313 1 T1 160 T3 146 T7 841
valid_sources[0x53] 356316 1 T1 134 T3 136 T7 552
valid_sources[0x54] 361097 1 T1 130 T3 107 T4 5
valid_sources[0x55] 358730 1 T1 140 T3 129 T4 5
valid_sources[0x56] 358304 1 T1 110 T3 134 T7 469
valid_sources[0x57] 362924 1 T1 93 T3 140 T7 450
valid_sources[0x58] 362028 1 T1 210 T3 125 T7 642
valid_sources[0x59] 491976 1 T1 127 T3 131 T4 1
valid_sources[0x5a] 364549 1 T1 142 T3 131 T7 617
valid_sources[0x5b] 359856 1 T1 163 T3 139 T4 5
valid_sources[0x5c] 360847 1 T1 196 T3 116 T4 13
valid_sources[0x5d] 360800 1 T1 173 T3 148 T4 34
valid_sources[0x5e] 372323 1 T1 192 T3 134 T7 595
valid_sources[0x5f] 362308 1 T1 119 T3 147 T7 653
valid_sources[0x60] 523162 1 T1 128 T3 126 T4 2
valid_sources[0x61] 363356 1 T1 137 T3 120 T4 3
valid_sources[0x62] 363684 1 T1 190 T3 112 T7 440
valid_sources[0x63] 364736 1 T1 128 T3 138 T4 4
valid_sources[0x64] 502797 1 T1 174 T3 106 T7 751
valid_sources[0x65] 543698 1 T1 102 T3 135 T4 13
valid_sources[0x66] 434942 1 T1 123 T3 129 T4 24
valid_sources[0x67] 359971 1 T1 120 T3 113 T4 3
valid_sources[0x68] 357605 1 T1 135 T3 126 T7 730
valid_sources[0x69] 360647 1 T1 144 T3 126 T7 695
valid_sources[0x6a] 360918 1 T1 141 T3 136 T7 496
valid_sources[0x6b] 365167 1 T1 132 T3 124 T7 556
valid_sources[0x6c] 360704 1 T1 136 T3 122 T7 571
valid_sources[0x6d] 1129918 1 T1 152 T3 121 T7 641
valid_sources[0x6e] 1110140 1 T1 107 T3 109 T7 547
valid_sources[0x6f] 360992 1 T1 123 T3 129 T7 645
valid_sources[0x70] 363315 1 T1 162 T3 135 T7 482
valid_sources[0x71] 361054 1 T1 93 T3 124 T4 34
valid_sources[0x72] 431975 1 T1 147 T3 131 T7 686
valid_sources[0x73] 359527 1 T1 142 T3 120 T4 6
valid_sources[0x74] 362259 1 T1 119 T3 142 T7 588
valid_sources[0x75] 2650683 1 T1 155 T3 143 T7 595
valid_sources[0x76] 363252 1 T1 136 T3 122 T7 477
valid_sources[0x77] 1129440 1 T1 145 T3 121 T4 9
valid_sources[0x78] 360332 1 T1 144 T3 126 T7 637
valid_sources[0x79] 359701 1 T1 177 T3 124 T4 11
valid_sources[0x7a] 365894 1 T1 71 T3 125 T4 17
valid_sources[0x7b] 1082791 1 T1 99 T3 133 T4 2
valid_sources[0x7c] 361907 1 T1 150 T3 122 T7 518
valid_sources[0x7d] 361505 1 T1 208 T3 120 T7 504
valid_sources[0x7e] 361670 1 T1 233 T3 124 T4 1
valid_sources[0x7f] 1340737 1 T1 116 T3 120 T7 521
valid_sources[0x80] 358739 1 T1 185 T3 127 T7 610



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 60538685 1 T1 9143 T2 4022 T3 16452
values[0x0] all_enables biggest_size 328289 1 T1 11906 T2 20 T3 21
values[0x1] all_enables biggest_size 325574 1 T1 11869 T2 13 T3 12

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%