Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	65955300	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	67027830	1		T1	334356		T2	4445		T3	34212

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	132049265	1		T1	668458		T2	8921		T3	68279
values[0x0]	444235	1		T1	19		T2	16		T3	50
values[0x1]	489630	1		T1	18		T2	14		T3	37

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52687582	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	80295548	1		T1	401326		T2	5381		T3	41089

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	382271	1		T1	2604		T2	56		T3	257
valid_sources[0x01]	445457	1		T1	2561		T2	34		T3	285
valid_sources[0x02]	1345410	1		T1	2602		T2	49		T3	193
valid_sources[0x03]	418453	1		T1	2586		T2	18		T3	205
valid_sources[0x04]	1703343	1		T1	2584		T2	23		T3	280
valid_sources[0x05]	1280799	1		T1	2605		T2	23		T3	310
valid_sources[0x06]	380821	1		T1	2538		T2	41		T3	272
valid_sources[0x07]	380514	1		T1	2573		T2	11		T3	329
valid_sources[0x08]	378926	1		T1	2641		T2	51		T3	239
valid_sources[0x09]	549674	1		T1	2577		T2	31		T3	277
valid_sources[0x0a]	376567	1		T1	2615		T2	41		T3	235
valid_sources[0x0b]	1314854	1		T1	2627		T2	9		T3	227
valid_sources[0x0c]	378781	1		T1	2617		T2	23		T3	282
valid_sources[0x0d]	1031114	1		T1	2616		T2	52		T3	312
valid_sources[0x0e]	380528	1		T1	2575		T2	32		T3	343
valid_sources[0x0f]	373091	1		T1	2582		T2	30		T3	275
valid_sources[0x10]	378557	1		T1	2578		T2	24		T3	250
valid_sources[0x11]	1004091	1		T1	2656		T2	37		T3	280
valid_sources[0x12]	397072	1		T1	2572		T2	35		T3	259
valid_sources[0x13]	375306	1		T1	2687		T2	32		T3	271
valid_sources[0x14]	1259744	1		T1	2691		T2	39		T3	239
valid_sources[0x15]	375477	1		T1	2562		T2	29		T3	260
valid_sources[0x16]	421870	1		T1	2813		T2	34		T3	205
valid_sources[0x17]	375543	1		T1	2578		T2	12		T3	202
valid_sources[0x18]	385255	1		T1	2616		T2	33		T3	247
valid_sources[0x19]	385433	1		T1	2673		T2	23		T3	277
valid_sources[0x1a]	375397	1		T1	2648		T2	57		T3	276
valid_sources[0x1b]	378024	1		T1	2655		T2	44		T3	299
valid_sources[0x1c]	379444	1		T1	2584		T2	26		T3	285
valid_sources[0x1d]	374473	1		T1	2595		T2	35		T3	209
valid_sources[0x1e]	379000	1		T1	2605		T2	37		T3	195
valid_sources[0x1f]	374908	1		T1	2631		T2	31		T3	255
valid_sources[0x20]	5790786	1		T1	2697		T2	45		T3	295
valid_sources[0x21]	379538	1		T1	2613		T2	32		T3	261
valid_sources[0x22]	459073	1		T1	2607		T2	7		T3	277
valid_sources[0x23]	924211	1		T1	2587		T2	29		T3	257
valid_sources[0x24]	376315	1		T1	2575		T2	30		T3	262
valid_sources[0x25]	377890	1		T1	2597		T2	45		T3	267
valid_sources[0x26]	377031	1		T1	2620		T2	29		T3	260
valid_sources[0x27]	377972	1		T1	2516		T2	39		T3	237
valid_sources[0x28]	380255	1		T1	2590		T2	20		T3	242
valid_sources[0x29]	445403	1		T1	2598		T2	14		T3	288
valid_sources[0x2a]	378921	1		T1	2587		T2	22		T3	256
valid_sources[0x2b]	376256	1		T1	2591		T2	58		T3	259
valid_sources[0x2c]	372593	1		T1	2560		T2	54		T3	261
valid_sources[0x2d]	374658	1		T1	2567		T2	22		T3	310
valid_sources[0x2e]	377464	1		T1	2748		T2	49		T3	252
valid_sources[0x2f]	375364	1		T1	2552		T2	32		T3	298
valid_sources[0x30]	377565	1		T1	2588		T2	39		T3	234
valid_sources[0x31]	3234353	1		T1	2688		T2	29		T3	266
valid_sources[0x32]	955684	1		T1	2679		T2	54		T3	253
valid_sources[0x33]	374834	1		T1	2541		T2	15		T3	235
valid_sources[0x34]	377646	1		T1	2652		T2	21		T3	335
valid_sources[0x35]	379853	1		T1	2590		T2	35		T3	245
valid_sources[0x36]	392566	1		T1	2615		T2	32		T3	274
valid_sources[0x37]	375377	1		T1	2543		T2	27		T3	249
valid_sources[0x38]	376573	1		T1	2632		T2	31		T3	245
valid_sources[0x39]	378129	1		T1	2617		T2	48		T3	275
valid_sources[0x3a]	372866	1		T1	2630		T2	47		T3	232
valid_sources[0x3b]	378845	1		T1	2692		T2	16		T3	280
valid_sources[0x3c]	378784	1		T1	2598		T2	51		T3	244
valid_sources[0x3d]	375207	1		T1	2681		T2	17		T3	275
valid_sources[0x3e]	380651	1		T1	2557		T2	38		T3	244
valid_sources[0x3f]	374513	1		T1	2598		T2	38		T3	266
valid_sources[0x40]	375897	1		T1	2710		T2	76		T3	294
valid_sources[0x41]	376268	1		T1	2594		T2	30		T3	270
valid_sources[0x42]	379681	1		T1	2639		T2	31		T3	247
valid_sources[0x43]	377081	1		T1	2591		T2	27		T3	261
valid_sources[0x44]	381396	1		T1	2675		T2	46		T3	278
valid_sources[0x45]	378696	1		T1	2565		T2	36		T3	233
valid_sources[0x46]	375573	1		T1	2614		T2	22		T3	336
valid_sources[0x47]	378822	1		T1	2705		T2	45		T3	255
valid_sources[0x48]	378196	1		T1	2547		T2	34		T3	280
valid_sources[0x49]	377510	1		T1	2569		T2	22		T3	282
valid_sources[0x4a]	376100	1		T1	2650		T2	31		T3	275
valid_sources[0x4b]	375488	1		T1	2669		T2	39		T3	265
valid_sources[0x4c]	394833	1		T1	2503		T2	47		T3	250
valid_sources[0x4d]	379562	1		T1	2680		T2	63		T3	329
valid_sources[0x4e]	378566	1		T1	2586		T2	41		T3	219
valid_sources[0x4f]	412841	1		T1	2613		T2	42		T3	276
valid_sources[0x50]	379101	1		T1	2566		T2	30		T3	228
valid_sources[0x51]	379039	1		T1	2496		T2	14		T3	238
valid_sources[0x52]	378810	1		T1	2645		T2	38		T3	251
valid_sources[0x53]	434839	1		T1	2631		T2	21		T3	310
valid_sources[0x54]	378530	1		T1	2697		T2	38		T3	281
valid_sources[0x55]	380563	1		T1	2620		T2	49		T3	305
valid_sources[0x56]	379945	1		T1	2684		T2	56		T3	251
valid_sources[0x57]	380611	1		T1	2655		T2	24		T3	283
valid_sources[0x58]	398601	1		T1	2600		T2	44		T3	234
valid_sources[0x59]	428450	1		T1	2596		T2	38		T3	305
valid_sources[0x5a]	381635	1		T1	2602		T2	46		T3	249
valid_sources[0x5b]	381230	1		T1	2530		T2	29		T3	257
valid_sources[0x5c]	380406	1		T1	2643		T2	46		T3	297
valid_sources[0x5d]	375675	1		T1	2578		T2	27		T3	246
valid_sources[0x5e]	386965	1		T1	2550		T2	40		T3	289
valid_sources[0x5f]	378701	1		T1	2629		T2	34		T3	249
valid_sources[0x60]	381004	1		T1	2603		T2	28		T3	310
valid_sources[0x61]	381633	1		T1	2581		T2	21		T3	247
valid_sources[0x62]	375654	1		T1	2636		T2	32		T3	272
valid_sources[0x63]	386127	1		T1	2608		T2	45		T3	253
valid_sources[0x64]	377413	1		T1	2528		T2	27		T3	213
valid_sources[0x65]	383884	1		T1	2604		T2	35		T3	265
valid_sources[0x66]	378865	1		T1	2601		T2	53		T3	296
valid_sources[0x67]	386491	1		T1	2683		T2	25		T3	247
valid_sources[0x68]	379405	1		T1	2664		T2	22		T3	267
valid_sources[0x69]	432924	1		T1	2528		T2	74		T3	211
valid_sources[0x6a]	377093	1		T1	2617		T2	83		T3	302
valid_sources[0x6b]	379269	1		T1	2581		T2	40		T3	258
valid_sources[0x6c]	457562	1		T1	2553		T2	53		T3	253
valid_sources[0x6d]	380607	1		T1	2592		T2	30		T3	287
valid_sources[0x6e]	376861	1		T1	2617		T2	22		T3	281
valid_sources[0x6f]	434440	1		T1	2624		T2	11		T3	283
valid_sources[0x70]	395366	1		T1	2571		T2	38		T3	224
valid_sources[0x71]	378939	1		T1	2700		T2	48		T3	246
valid_sources[0x72]	378516	1		T1	2584		T2	50		T3	263
valid_sources[0x73]	377881	1		T1	2753		T2	67		T3	285
valid_sources[0x74]	379321	1		T1	2575		T2	80		T3	223
valid_sources[0x75]	378366	1		T1	2674		T2	50		T3	266
valid_sources[0x76]	374273	1		T1	2617		T2	46		T3	246
valid_sources[0x77]	383469	1		T1	2627		T2	20		T3	287
valid_sources[0x78]	374291	1		T1	2544		T2	35		T3	275
valid_sources[0x79]	520693	1		T1	2629		T2	29		T3	210
valid_sources[0x7a]	801094	1		T1	2623		T2	28		T3	231
valid_sources[0x7b]	376038	1		T1	2549		T2	19		T3	324
valid_sources[0x7c]	374884	1		T1	2594		T2	32		T3	229
valid_sources[0x7d]	380381	1		T1	2667		T2	22		T3	278
valid_sources[0x7e]	438716	1		T1	2619		T2	18		T3	251
valid_sources[0x7f]	379992	1		T1	2640		T2	46		T3	310
valid_sources[0x80]	417967	1		T1	2568		T2	34		T3	189

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

66161310

1

T1

334331

T2

4423

T3

34144

values[0x0]

all_enables

biggest_size

434508

1

T1

15

T2

12

T3

38

values[0x1]

all_enables

biggest_size

432012

1

T1

10

T2

10

T3

30