Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53645508	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	55196486	1		T1	614047		T2	262323		T3	29580

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	107492388	1		T1	122513		T2	524503		T3	58902
values[0x0]	642519	1		T1	16		T2	20		T3	31
values[0x1]	707087	1		T1	25		T2	21		T3	24

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42831994	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	66010000	1		T1	736902		T2	314938		T3	35405

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	297109	1		T1	4854		T4	50		T5	248
valid_sources[0x01]	707438	1		T1	4801		T4	38		T5	184
valid_sources[0x02]	295391	1		T1	4738		T4	37		T5	208
valid_sources[0x03]	299670	1		T1	4689		T4	33		T5	210
valid_sources[0x04]	297343	1		T1	4834		T4	29		T5	155
valid_sources[0x05]	296721	1		T1	4723		T4	39		T5	210
valid_sources[0x06]	297340	1		T1	4675		T4	43		T5	191
valid_sources[0x07]	296147	1		T1	4716		T4	29		T5	200
valid_sources[0x08]	447229	1		T1	4819		T4	71		T5	184
valid_sources[0x09]	298280	1		T1	4823		T4	35		T5	148
valid_sources[0x0a]	295678	1		T1	4630		T4	30		T5	222
valid_sources[0x0b]	577367	1		T1	4816		T4	23		T5	181
valid_sources[0x0c]	694011	1		T1	4682		T4	48		T5	201
valid_sources[0x0d]	308259	1		T1	4764		T4	5		T5	178
valid_sources[0x0e]	298336	1		T1	4803		T4	63		T5	193
valid_sources[0x0f]	299497	1		T1	4690		T4	11		T5	171
valid_sources[0x10]	298956	1		T1	4904		T4	22		T5	207
valid_sources[0x11]	1150450	1		T1	4807		T4	20		T5	175
valid_sources[0x12]	419465	1		T1	4765		T4	56		T5	189
valid_sources[0x13]	298801	1		T1	4768		T4	1		T5	232
valid_sources[0x14]	297067	1		T1	4774		T4	44		T5	259
valid_sources[0x15]	299928	1		T1	4650		T4	52		T5	197
valid_sources[0x16]	296437	1		T1	4789		T4	11		T5	206
valid_sources[0x17]	300663	1		T1	5016		T4	34		T5	209
valid_sources[0x18]	296805	1		T1	4769		T4	58		T5	172
valid_sources[0x19]	297573	1		T1	4741		T4	28		T5	198
valid_sources[0x1a]	298782	1		T1	4938		T4	36		T5	197
valid_sources[0x1b]	301220	1		T1	4871		T4	27		T5	187
valid_sources[0x1c]	298853	1		T1	4767		T4	39		T5	228
valid_sources[0x1d]	296099	1		T1	4863		T4	33		T5	145
valid_sources[0x1e]	298145	1		T1	4853		T4	36		T5	228
valid_sources[0x1f]	295900	1		T1	4833		T4	32		T5	223
valid_sources[0x20]	365082	1		T1	4778		T4	32		T5	159
valid_sources[0x21]	629843	1		T1	4758		T4	33		T5	189
valid_sources[0x22]	294386	1		T1	4878		T4	34		T5	179
valid_sources[0x23]	421718	1		T1	4955		T4	32		T5	213
valid_sources[0x24]	1037586	1		T1	4851		T4	23		T5	185
valid_sources[0x25]	296452	1		T1	4647		T4	30		T5	229
valid_sources[0x26]	301499	1		T1	4854		T4	51		T5	196
valid_sources[0x27]	409766	1		T1	4677		T4	28		T5	176
valid_sources[0x28]	296327	1		T1	4815		T4	30		T5	215
valid_sources[0x29]	296842	1		T1	4871		T4	33		T5	137
valid_sources[0x2a]	430605	1		T1	4890		T4	37		T5	216
valid_sources[0x2b]	295023	1		T1	4717		T4	30		T5	219
valid_sources[0x2c]	297758	1		T1	4980		T4	35		T5	208
valid_sources[0x2d]	298909	1		T1	4776		T4	22		T5	156
valid_sources[0x2e]	295606	1		T1	4833		T4	27		T5	201
valid_sources[0x2f]	297558	1		T1	4806		T4	33		T5	203
valid_sources[0x30]	595292	1		T1	4716		T4	38		T5	204
valid_sources[0x31]	2486932	1		T1	4794		T3	58957		T4	15
valid_sources[0x32]	821560	1		T1	4541		T2	524544		T4	13
valid_sources[0x33]	294597	1		T1	4670		T4	37		T5	183
valid_sources[0x34]	297501	1		T1	4908		T4	9		T5	195
valid_sources[0x35]	296728	1		T1	4827		T4	27		T5	204
valid_sources[0x36]	331469	1		T1	4792		T4	13		T5	199
valid_sources[0x37]	294821	1		T1	4898		T4	23		T5	158
valid_sources[0x38]	297874	1		T1	4719		T4	28		T5	191
valid_sources[0x39]	290900	1		T1	4736		T4	28		T5	206
valid_sources[0x3a]	298274	1		T1	4866		T4	22		T5	182
valid_sources[0x3b]	294117	1		T1	4719		T4	29		T5	197
valid_sources[0x3c]	2515351	1		T1	4621		T4	15		T5	203
valid_sources[0x3d]	295122	1		T1	4733		T4	36		T5	216
valid_sources[0x3e]	294322	1		T1	4675		T4	65		T5	217
valid_sources[0x3f]	295558	1		T1	4781		T4	51		T5	159
valid_sources[0x40]	294306	1		T1	4673		T4	12		T5	193
valid_sources[0x41]	296168	1		T1	4769		T4	30		T5	197
valid_sources[0x42]	296388	1		T1	4827		T4	29		T5	223
valid_sources[0x43]	298314	1		T1	4691		T4	26		T5	195
valid_sources[0x44]	306372	1		T1	4744		T4	55		T5	183
valid_sources[0x45]	1692673	1		T1	4705		T4	32		T5	171
valid_sources[0x46]	301853	1		T1	4704		T4	49		T5	162
valid_sources[0x47]	293091	1		T1	4740		T4	55		T5	179
valid_sources[0x48]	296832	1		T1	4833		T4	22		T5	228
valid_sources[0x49]	337548	1		T1	4690		T4	34		T5	214
valid_sources[0x4a]	297115	1		T1	4692		T4	39		T5	162
valid_sources[0x4b]	303144	1		T1	4878		T4	26		T5	169
valid_sources[0x4c]	297495	1		T1	4890		T4	45		T5	186
valid_sources[0x4d]	293856	1		T1	4806		T4	40		T5	247
valid_sources[0x4e]	294065	1		T1	4832		T4	37		T5	187
valid_sources[0x4f]	295070	1		T1	4773		T4	20		T5	197
valid_sources[0x50]	442873	1		T1	4785		T4	40		T5	175
valid_sources[0x51]	563534	1		T1	4956		T4	15		T5	187
valid_sources[0x52]	296076	1		T1	5021		T4	12		T5	218
valid_sources[0x53]	296529	1		T1	4843		T4	52		T5	168
valid_sources[0x54]	295463	1		T1	4756		T4	48		T5	230
valid_sources[0x55]	295284	1		T1	4770		T4	38		T5	218
valid_sources[0x56]	297922	1		T1	4828		T4	20		T5	212
valid_sources[0x57]	294594	1		T1	4748		T4	20		T5	264
valid_sources[0x58]	294473	1		T1	4719		T4	48		T5	168
valid_sources[0x59]	300966	1		T1	4983		T4	64		T5	219
valid_sources[0x5a]	296470	1		T1	4770		T4	61		T5	215
valid_sources[0x5b]	296442	1		T1	4725		T4	21		T5	180
valid_sources[0x5c]	315738	1		T1	4847		T4	28		T5	221
valid_sources[0x5d]	298023	1		T1	4777		T4	12		T5	157
valid_sources[0x5e]	294180	1		T1	4928		T4	29		T5	212
valid_sources[0x5f]	938811	1		T1	4664		T4	13		T5	210
valid_sources[0x60]	576263	1		T1	4687		T4	44		T5	187
valid_sources[0x61]	397674	1		T1	4872		T4	73		T5	206
valid_sources[0x62]	295347	1		T1	4746		T4	41		T5	156
valid_sources[0x63]	296360	1		T1	4645		T4	15		T5	219
valid_sources[0x64]	296262	1		T1	4903		T4	38		T5	170
valid_sources[0x65]	294060	1		T1	4817		T4	46		T5	183
valid_sources[0x66]	294631	1		T1	4668		T4	40		T5	213
valid_sources[0x67]	537461	1		T1	4714		T4	12		T5	193
valid_sources[0x68]	432456	1		T1	4948		T4	9		T5	223
valid_sources[0x69]	295369	1		T1	4645		T4	33		T5	188
valid_sources[0x6a]	295356	1		T1	4776		T4	14		T5	183
valid_sources[0x6b]	298771	1		T1	5019		T4	20		T5	234
valid_sources[0x6c]	295701	1		T1	4802		T4	20		T5	215
valid_sources[0x6d]	304279	1		T1	4997		T4	14		T5	252
valid_sources[0x6e]	296741	1		T1	4801		T4	30		T5	187
valid_sources[0x6f]	295871	1		T1	4934		T4	26		T5	194
valid_sources[0x70]	295980	1		T1	4815		T4	20		T5	160
valid_sources[0x71]	317887	1		T1	4664		T4	50		T5	231
valid_sources[0x72]	296227	1		T1	4787		T4	59		T5	235
valid_sources[0x73]	298054	1		T1	4786		T4	12		T5	163
valid_sources[0x74]	647064	1		T1	4905		T4	28		T5	229
valid_sources[0x75]	298282	1		T1	4677		T4	25		T5	191
valid_sources[0x76]	298524	1		T1	4776		T4	41		T5	226
valid_sources[0x77]	389947	1		T1	4786		T4	25		T5	220
valid_sources[0x78]	297714	1		T1	4774		T4	34		T5	193
valid_sources[0x79]	297322	1		T1	4786		T4	14		T5	217
valid_sources[0x7a]	296882	1		T1	4848		T4	23		T5	188
valid_sources[0x7b]	293691	1		T1	4823		T4	37		T5	140
valid_sources[0x7c]	297459	1		T1	5009		T4	29		T5	191
valid_sources[0x7d]	1075588	1		T1	4790		T4	40		T5	199
valid_sources[0x7e]	310425	1		T1	4646		T4	47		T5	218
valid_sources[0x7f]	369570	1		T1	4700		T4	52		T5	216
valid_sources[0x80]	439654	1		T1	4660		T4	58		T5	176

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

53939203

1

T1

614019

T2

262293

T3

29536

values[0x0]

all_enables

biggest_size

630541

1

T1

10

T2

17

T3

27

values[0x1]

all_enables

biggest_size

626742

1

T1

18

T2

13

T3

17