Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 77067356 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 77186169 1 T1 27167 T2 408120 T3 35



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 154130965 1 T1 53917 T2 816756 T3 68
values[0x0] 59331 1 T1 59 T2 107 T3 5
values[0x1] 63229 1 T1 63 T2 101 T3 5



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 61590004 Excluded


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 92663521 1 T1 32568 T2 490083 T3 43



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 429892 1 T1 109 T2 3514 T5 424
valid_sources[0x01] 424099 1 T1 106 T2 3177 T5 505
valid_sources[0x02] 623814 1 T1 117 T2 3056 T5 480
valid_sources[0x03] 455407 1 T1 125 T2 3231 T5 446
valid_sources[0x04] 539707 1 T1 114 T2 3409 T5 509
valid_sources[0x05] 423374 1 T1 135 T2 3449 T5 488
valid_sources[0x06] 455046 1 T1 195 T2 2846 T5 495
valid_sources[0x07] 423507 1 T1 140 T2 3195 T5 409
valid_sources[0x08] 426030 1 T1 204 T2 2890 T5 495
valid_sources[0x09] 427164 1 T1 293 T2 3465 T5 475
valid_sources[0x0a] 1670579 1 T1 213 T2 3091 T5 507
valid_sources[0x0b] 966028 1 T1 145 T2 3129 T5 434
valid_sources[0x0c] 424907 1 T1 392 T2 3112 T5 524
valid_sources[0x0d] 424376 1 T1 163 T2 2987 T5 495
valid_sources[0x0e] 428054 1 T1 282 T2 3367 T5 531
valid_sources[0x0f] 425026 1 T1 243 T2 3048 T5 474
valid_sources[0x10] 425821 1 T1 103 T2 3424 T5 432
valid_sources[0x11] 426490 1 T1 180 T2 3197 T5 457
valid_sources[0x12] 423391 1 T1 140 T2 3212 T5 511
valid_sources[0x13] 455872 1 T1 109 T2 2763 T5 479
valid_sources[0x14] 423136 1 T1 214 T2 3354 T5 480
valid_sources[0x15] 427845 1 T1 285 T2 3577 T5 454
valid_sources[0x16] 424699 1 T1 252 T2 3165 T5 420
valid_sources[0x17] 428172 1 T1 172 T2 3550 T5 444
valid_sources[0x18] 424624 1 T1 120 T2 3040 T5 478
valid_sources[0x19] 423909 1 T1 316 T2 3039 T5 442
valid_sources[0x1a] 423975 1 T1 246 T2 3016 T5 409
valid_sources[0x1b] 2042372 1 T1 153 T2 3300 T5 446
valid_sources[0x1c] 491596 1 T1 215 T2 3108 T5 498
valid_sources[0x1d] 426625 1 T1 170 T2 3219 T5 505
valid_sources[0x1e] 4598404 1 T1 276 T2 3194 T5 491
valid_sources[0x1f] 426400 1 T1 157 T2 3291 T5 450
valid_sources[0x20] 544084 1 T1 180 T2 3061 T5 443
valid_sources[0x21] 426210 1 T1 161 T2 3075 T5 480
valid_sources[0x22] 462650 1 T1 200 T2 3387 T5 461
valid_sources[0x23] 424752 1 T1 220 T2 2972 T5 505
valid_sources[0x24] 424718 1 T1 327 T2 3113 T5 483
valid_sources[0x25] 422588 1 T1 145 T2 3035 T5 437
valid_sources[0x26] 440930 1 T1 240 T2 3217 T5 461
valid_sources[0x27] 421139 1 T1 256 T2 3248 T5 514
valid_sources[0x28] 426237 1 T1 174 T2 3223 T5 493
valid_sources[0x29] 426239 1 T1 160 T2 3327 T5 491
valid_sources[0x2a] 426768 1 T1 215 T2 3357 T5 469
valid_sources[0x2b] 423844 1 T1 207 T2 3401 T5 478
valid_sources[0x2c] 4205403 1 T1 346 T2 3248 T5 497
valid_sources[0x2d] 426097 1 T1 374 T2 3818 T5 418
valid_sources[0x2e] 423838 1 T1 217 T2 3050 T5 420
valid_sources[0x2f] 916936 1 T1 139 T2 2842 T5 464
valid_sources[0x30] 497598 1 T1 223 T2 2936 T5 407
valid_sources[0x31] 422666 1 T1 254 T2 3032 T5 496
valid_sources[0x32] 426784 1 T1 160 T2 2853 T5 520
valid_sources[0x33] 478524 1 T1 122 T2 3276 T5 470
valid_sources[0x34] 963455 1 T1 205 T2 3078 T5 489
valid_sources[0x35] 422729 1 T1 234 T2 3336 T5 517
valid_sources[0x36] 422403 1 T1 199 T2 3866 T5 416
valid_sources[0x37] 423601 1 T1 146 T2 3146 T5 463
valid_sources[0x38] 427060 1 T1 198 T2 2964 T5 504
valid_sources[0x39] 422882 1 T1 266 T2 3318 T5 468
valid_sources[0x3a] 738557 1 T1 160 T2 3081 T5 512
valid_sources[0x3b] 465402 1 T1 161 T2 3445 T5 465
valid_sources[0x3c] 426159 1 T1 246 T2 3485 T5 502
valid_sources[0x3d] 427375 1 T1 286 T2 3484 T5 471
valid_sources[0x3e] 425028 1 T1 314 T2 2789 T5 475
valid_sources[0x3f] 454827 1 T1 162 T2 3522 T5 416
valid_sources[0x40] 565522 1 T1 216 T2 3389 T4 142241
valid_sources[0x41] 427335 1 T1 145 T2 2912 T5 484
valid_sources[0x42] 427913 1 T1 236 T2 3057 T5 430
valid_sources[0x43] 427578 1 T1 175 T2 3546 T5 512
valid_sources[0x44] 430087 1 T1 193 T2 3496 T5 496
valid_sources[0x45] 424050 1 T1 250 T2 3021 T5 456
valid_sources[0x46] 435594 1 T1 205 T2 3083 T5 473
valid_sources[0x47] 3730162 1 T1 236 T2 3031 T5 432
valid_sources[0x48] 426008 1 T1 272 T2 3101 T5 468
valid_sources[0x49] 424343 1 T1 168 T2 2933 T5 450
valid_sources[0x4a] 426840 1 T1 197 T2 3216 T5 496
valid_sources[0x4b] 426934 1 T1 188 T2 3142 T5 445
valid_sources[0x4c] 428569 1 T1 160 T2 3080 T5 418
valid_sources[0x4d] 423844 1 T1 183 T2 3289 T5 390
valid_sources[0x4e] 423347 1 T1 197 T2 3102 T5 497
valid_sources[0x4f] 430604 1 T1 202 T2 3231 T5 504
valid_sources[0x50] 425416 1 T1 153 T2 3471 T5 394
valid_sources[0x51] 427859 1 T1 145 T2 2944 T5 496
valid_sources[0x52] 422092 1 T1 178 T2 3270 T5 478
valid_sources[0x53] 425035 1 T1 197 T2 3316 T5 570
valid_sources[0x54] 1967569 1 T1 173 T2 3518 T5 489
valid_sources[0x55] 2442843 1 T1 244 T2 3286 T5 510
valid_sources[0x56] 444135 1 T1 207 T2 3033 T5 489
valid_sources[0x57] 426691 1 T1 211 T2 3241 T5 510
valid_sources[0x58] 425280 1 T1 257 T2 3175 T5 468
valid_sources[0x59] 460550 1 T1 233 T2 2957 T5 460
valid_sources[0x5a] 1105640 1 T1 161 T2 3300 T5 465
valid_sources[0x5b] 428101 1 T1 314 T2 3248 T5 523
valid_sources[0x5c] 761080 1 T1 223 T2 2923 T5 524
valid_sources[0x5d] 480938 1 T1 169 T2 3271 T5 413
valid_sources[0x5e] 424710 1 T1 206 T2 3409 T5 507
valid_sources[0x5f] 5580247 1 T1 149 T2 3299 T5 475
valid_sources[0x60] 425984 1 T1 283 T2 3379 T5 454
valid_sources[0x61] 426633 1 T1 231 T2 3185 T5 426
valid_sources[0x62] 481048 1 T1 234 T2 3289 T5 497
valid_sources[0x63] 602071 1 T1 255 T2 2864 T5 470
valid_sources[0x64] 424356 1 T1 237 T2 3194 T5 508
valid_sources[0x65] 426039 1 T1 180 T2 2911 T5 484
valid_sources[0x66] 421751 1 T1 255 T2 3233 T5 498
valid_sources[0x67] 427693 1 T1 250 T2 2996 T5 525
valid_sources[0x68] 429221 1 T1 138 T2 3314 T5 418
valid_sources[0x69] 731132 1 T1 280 T2 3091 T5 436
valid_sources[0x6a] 423895 1 T1 243 T2 3403 T5 474
valid_sources[0x6b] 556294 1 T1 263 T2 3363 T5 522
valid_sources[0x6c] 428089 1 T1 238 T2 3085 T5 473
valid_sources[0x6d] 425124 1 T1 126 T2 3334 T5 499
valid_sources[0x6e] 424477 1 T1 175 T2 3345 T5 417
valid_sources[0x6f] 457230 1 T1 268 T2 3028 T5 519
valid_sources[0x70] 586070 1 T1 312 T2 3500 T5 444
valid_sources[0x71] 693551 1 T1 160 T2 3272 T5 461
valid_sources[0x72] 514300 1 T1 280 T2 2814 T5 448
valid_sources[0x73] 421755 1 T1 268 T2 3172 T5 447
valid_sources[0x74] 424082 1 T1 168 T2 3236 T5 457
valid_sources[0x75] 723853 1 T1 149 T2 3553 T5 479
valid_sources[0x76] 425363 1 T1 366 T2 3113 T5 438
valid_sources[0x77] 426576 1 T1 334 T2 3020 T5 455
valid_sources[0x78] 436217 1 T1 224 T2 3467 T5 494
valid_sources[0x79] 428375 1 T1 261 T2 3302 T5 447
valid_sources[0x7a] 425134 1 T1 185 T2 3058 T5 470
valid_sources[0x7b] 424312 1 T1 194 T2 3135 T5 476
valid_sources[0x7c] 420052 1 T1 210 T2 2961 T5 457
valid_sources[0x7d] 426972 1 T1 158 T2 2899 T5 495
valid_sources[0x7e] 426805 1 T1 169 T2 3534 T5 445
valid_sources[0x7f] 427271 1 T1 364 T2 3671 T5 489
valid_sources[0x80] 426530 1 T1 215 T2 3105 T5 479



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 77080582 1 T1 27113 T2 407981 T3 27
values[0x0] all_enables biggest_size 53756 1 T1 32 T2 70 T3 4
values[0x1] all_enables biggest_size 51831 1 T1 22 T2 69 T3 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%