Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62740900	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

62881201

1

T1

248600

T2

949

T3

10082

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	125485981	1			T1	495834		T2	1900		T3	20020
values[0x0]	65696	1			T1	25		T2	1		T3	22
values[0x1]	70424	1			T1	36		T2	5		T3	16

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50131915	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

75490186

1

T1

297910

T2

1147

T3

12145

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	875434	1			T1	1931		T2	4		T3	80
valid_sources[0x01]	357639	1			T1	1910		T2	23		T3	91
valid_sources[0x02]	354652	1			T1	1922		T2	6		T3	138
valid_sources[0x03]	360169	1			T1	1871		T2	6		T3	80
valid_sources[0x04]	356006	1			T1	1873		T2	3		T3	67
valid_sources[0x05]	358424	1			T1	1926		T2	3		T3	93
valid_sources[0x06]	359926	1			T1	2005		T2	10		T3	74
valid_sources[0x07]	355262	1			T1	1971		T2	3		T3	80
valid_sources[0x08]	357102	1			T1	1901		T2	9		T3	75
valid_sources[0x09]	358319	1			T1	2040		T2	1		T3	95
valid_sources[0x0a]	352863	1			T1	1853		T2	9		T3	83
valid_sources[0x0b]	355577	1			T1	1985		T2	1		T3	96
valid_sources[0x0c]	355892	1			T1	1888		T2	5		T3	69
valid_sources[0x0d]	357656	1			T1	1976		T2	7		T3	80
valid_sources[0x0e]	356990	1			T1	1904		T2	8		T3	82
valid_sources[0x0f]	356751	1			T1	1917		T2	5		T3	80
valid_sources[0x10]	358637	1			T1	1950		T2	13		T3	107
valid_sources[0x11]	357264	1			T1	1962		T2	1		T3	93
valid_sources[0x12]	406597	1			T1	1979		T2	14		T3	79
valid_sources[0x13]	353893	1			T1	1938		T2	6		T3	63
valid_sources[0x14]	939371	1			T1	1902		T2	12		T3	81
valid_sources[0x15]	485588	1			T1	1843		T2	9		T3	90
valid_sources[0x16]	562975	1			T1	1966		T2	21		T3	73
valid_sources[0x17]	356319	1			T1	1938		T2	2		T3	50
valid_sources[0x18]	356563	1			T1	1979		T2	13		T3	83
valid_sources[0x19]	357692	1			T1	1950		T2	4		T3	85
valid_sources[0x1a]	1982200	1			T1	1935		T2	6		T3	54
valid_sources[0x1b]	354959	1			T1	1962		T2	1		T3	84
valid_sources[0x1c]	353681	1			T1	2041		T2	4		T3	79
valid_sources[0x1d]	355365	1			T1	1923		T2	8		T3	63
valid_sources[0x1e]	356301	1			T1	1882		T2	10		T3	95
valid_sources[0x1f]	381085	1			T1	1873		T2	10		T3	64
valid_sources[0x20]	354363	1			T1	1986		T2	6		T3	69
valid_sources[0x21]	356245	1			T1	1946		T2	10		T3	80
valid_sources[0x22]	357374	1			T1	1925		T2	5		T3	92
valid_sources[0x23]	356727	1			T1	1916		T2	9		T3	80
valid_sources[0x24]	355845	1			T1	1880		T2	3		T3	75
valid_sources[0x25]	356742	1			T1	1979		T2	5		T3	112
valid_sources[0x26]	357932	1			T1	1919		T2	11		T3	76
valid_sources[0x27]	353861	1			T1	1911		T2	5		T3	87
valid_sources[0x28]	355503	1			T1	1981		T2	7		T3	64
valid_sources[0x29]	358037	1			T1	1903		T2	4		T3	80
valid_sources[0x2a]	358887	1			T1	1954		T3	57		T4	4387
valid_sources[0x2b]	357275	1			T1	1967		T2	11		T3	67
valid_sources[0x2c]	356378	1			T1	1926		T2	16		T3	82
valid_sources[0x2d]	359326	1			T1	1958		T2	5		T3	73
valid_sources[0x2e]	355492	1			T1	1853		T2	16		T3	74
valid_sources[0x2f]	358683	1			T1	1923		T2	3		T3	64
valid_sources[0x30]	1209114	1			T1	1896		T2	10		T3	84
valid_sources[0x31]	403886	1			T1	1998		T2	2		T3	74
valid_sources[0x32]	356986	1			T1	1822		T2	15		T3	103
valid_sources[0x33]	355209	1			T1	2032		T2	16		T3	65
valid_sources[0x34]	398806	1			T1	1916		T2	10		T3	108
valid_sources[0x35]	413452	1			T1	1977		T2	4		T3	106
valid_sources[0x36]	355063	1			T1	1977		T2	8		T3	91
valid_sources[0x37]	429483	1			T1	2015		T2	3		T3	69
valid_sources[0x38]	359547	1			T1	2030		T2	2		T3	61
valid_sources[0x39]	355865	1			T1	1995		T3	86		T4	4323
valid_sources[0x3a]	357513	1			T1	1940		T2	5		T3	76
valid_sources[0x3b]	358027	1			T1	1996		T2	6		T3	112
valid_sources[0x3c]	357637	1			T1	1929		T2	5		T3	85
valid_sources[0x3d]	2405722	1			T1	1926		T2	6		T3	46
valid_sources[0x3e]	360043	1			T1	2004		T2	16		T3	73
valid_sources[0x3f]	355858	1			T1	1882		T2	7		T3	62
valid_sources[0x40]	355661	1			T1	2018		T2	6		T3	57
valid_sources[0x41]	642455	1			T1	1860		T2	6		T3	91
valid_sources[0x42]	501078	1			T1	1929		T2	2		T3	45
valid_sources[0x43]	355308	1			T1	2016		T2	1		T3	70
valid_sources[0x44]	357402	1			T1	1934		T2	4		T3	66
valid_sources[0x45]	354974	1			T1	1882		T2	4		T3	80
valid_sources[0x46]	357107	1			T1	1923		T2	19		T3	48
valid_sources[0x47]	356141	1			T1	1972		T2	9		T3	84
valid_sources[0x48]	358693	1			T1	1907		T2	10		T3	88
valid_sources[0x49]	352937	1			T1	1945		T2	12		T3	68
valid_sources[0x4a]	354978	1			T1	1985		T2	16		T3	75
valid_sources[0x4b]	355936	1			T1	1939		T2	4		T3	46
valid_sources[0x4c]	356489	1			T1	1908		T2	17		T3	82
valid_sources[0x4d]	355250	1			T1	1877		T2	6		T3	71
valid_sources[0x4e]	354340	1			T1	1982		T2	10		T3	69
valid_sources[0x4f]	355739	1			T1	1940		T2	15		T3	97
valid_sources[0x50]	357279	1			T1	2092		T2	8		T3	51
valid_sources[0x51]	354452	1			T1	1892		T2	1		T3	94
valid_sources[0x52]	357772	1			T1	1860		T2	2		T3	58
valid_sources[0x53]	354684	1			T1	1914		T2	9		T3	46
valid_sources[0x54]	355995	1			T1	1941		T2	8		T3	103
valid_sources[0x55]	357245	1			T1	1896		T2	15		T3	99
valid_sources[0x56]	362491	1			T1	1852		T2	1		T3	75
valid_sources[0x57]	359435	1			T1	1902		T2	9		T3	115
valid_sources[0x58]	915006	1			T1	1939		T2	7		T3	88
valid_sources[0x59]	352786	1			T1	1914		T2	12		T3	94
valid_sources[0x5a]	357230	1			T1	1820		T2	5		T3	80
valid_sources[0x5b]	357225	1			T1	1951		T2	14		T3	90
valid_sources[0x5c]	354255	1			T1	2019		T2	2		T3	96
valid_sources[0x5d]	356465	1			T1	1941		T2	2		T3	75
valid_sources[0x5e]	355907	1			T1	1987		T2	8		T3	69
valid_sources[0x5f]	356815	1			T1	1883		T2	7		T3	53
valid_sources[0x60]	359893	1			T1	1932		T2	12		T3	99
valid_sources[0x61]	356931	1			T1	1908		T2	6		T3	84
valid_sources[0x62]	357464	1			T1	1881		T2	14		T3	71
valid_sources[0x63]	1050673	1			T1	1941		T2	1		T3	74
valid_sources[0x64]	357646	1			T1	1887		T2	6		T3	78
valid_sources[0x65]	477250	1			T1	1927		T2	11		T3	86
valid_sources[0x66]	356900	1			T1	2054		T2	11		T3	68
valid_sources[0x67]	1745045	1			T1	1956		T2	1		T3	63
valid_sources[0x68]	354520	1			T1	2079		T2	5		T3	77
valid_sources[0x69]	360569	1			T1	2057		T2	6		T3	51
valid_sources[0x6a]	354384	1			T1	1904		T2	6		T3	52
valid_sources[0x6b]	1091687	1			T1	1851		T2	2		T3	103
valid_sources[0x6c]	356160	1			T1	1872		T2	22		T3	44
valid_sources[0x6d]	420068	1			T1	1923		T2	3		T3	114
valid_sources[0x6e]	357072	1			T1	1927		T2	4		T3	85
valid_sources[0x6f]	397132	1			T1	1996		T2	2		T3	92
valid_sources[0x70]	358007	1			T1	1937		T2	13		T3	77
valid_sources[0x71]	454362	1			T1	1951		T2	10		T3	72
valid_sources[0x72]	357300	1			T1	1989		T2	3		T3	64
valid_sources[0x73]	352485	1			T1	1815		T2	9		T3	58
valid_sources[0x74]	867846	1			T1	1958		T2	7		T3	78
valid_sources[0x75]	1474286	1			T1	1966		T2	3		T3	121
valid_sources[0x76]	1812406	1			T1	2033		T2	21		T3	97
valid_sources[0x77]	380238	1			T1	1969		T2	8		T3	108
valid_sources[0x78]	357176	1			T1	1984		T2	2		T3	88
valid_sources[0x79]	460678	1			T1	1940		T2	2		T3	85
valid_sources[0x7a]	357225	1			T1	2016		T2	15		T3	63
valid_sources[0x7b]	367922	1			T1	1980		T2	17		T3	73
valid_sources[0x7c]	1835314	1			T1	1931		T2	10		T3	83
valid_sources[0x7d]	371458	1			T1	1978		T2	3		T3	92
valid_sources[0x7e]	378914	1			T1	1885		T3	64		T4	3625
valid_sources[0x7f]	1089500	1			T1	1974		T2	1		T3	93
valid_sources[0x80]	394868	1			T1	1880		T2	13		T3	83

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

62762656

1

T1

248561

T2

944

T3

10051

values[0x0]

all_enables

biggest_size

60419

1

T1

16

T2

1

T3

20

values[0x1]

all_enables

biggest_size

58126

1

T1

23

T2

4

T3

11