Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/rv_timer-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55091488	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

55271402

1

T4

29

T5

1

T6

42

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	110185745	1			T1	1		T2	1		T3	1
values[0x0]	85307	1			T4	4		T6	16		T7	11
values[0x1]	91838	1			T4	6		T6	24		T7	20

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44018693	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

66344197

1

T3

1

T4

36

T5

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	289527	1			T7	4		T9	5		T11	15
valid_sources[0x01]	291223	1			T6	1		T7	8		T9	14
valid_sources[0x02]	439515	1			T7	8		T9	3		T11	23
valid_sources[0x03]	285952	1			T7	4		T11	25		T15	1
valid_sources[0x04]	290985	1			T7	6		T9	5		T11	11
valid_sources[0x05]	289520	1			T7	18		T11	14		T12	35
valid_sources[0x06]	290323	1			T6	1		T7	9		T9	16
valid_sources[0x07]	953105	1			T4	1		T7	17		T9	1
valid_sources[0x08]	288597	1			T6	1		T7	22		T9	1
valid_sources[0x09]	289005	1			T7	22		T9	65		T11	38
valid_sources[0x0a]	348607	1			T4	1		T7	12		T9	228
valid_sources[0x0b]	2465952	1			T7	9		T9	100		T11	36
valid_sources[0x0c]	295257	1			T4	1		T7	14		T9	1
valid_sources[0x0d]	289484	1			T7	4		T9	1		T11	16
valid_sources[0x0e]	291807	1			T5	1		T7	4		T9	9
valid_sources[0x0f]	288149	1			T6	1		T7	10		T9	21
valid_sources[0x10]	291513	1			T7	9		T9	102		T11	32
valid_sources[0x11]	291350	1			T7	5		T9	3		T11	23
valid_sources[0x12]	291176	1			T7	17		T9	36		T11	41
valid_sources[0x13]	343529	1			T7	2		T9	1		T11	42
valid_sources[0x14]	480853	1			T6	1		T7	6		T11	22
valid_sources[0x15]	367027	1			T7	6		T9	1		T11	39
valid_sources[0x16]	542361	1			T6	3		T7	8		T9	1
valid_sources[0x17]	287982	1			T7	14		T11	15		T15	1
valid_sources[0x18]	289474	1			T4	1		T7	3		T9	11
valid_sources[0x19]	287855	1			T6	1		T7	5		T11	26
valid_sources[0x1a]	290274	1			T4	1		T7	17		T9	9
valid_sources[0x1b]	289510	1			T7	6		T9	3		T11	27
valid_sources[0x1c]	288634	1			T7	3		T9	19		T11	24
valid_sources[0x1d]	581162	1			T4	1		T7	11		T9	1
valid_sources[0x1e]	1443040	1			T7	6		T9	3		T10	22
valid_sources[0x1f]	317743	1			T7	17		T9	2		T11	24
valid_sources[0x20]	289545	1			T7	8		T9	2		T11	28
valid_sources[0x21]	310632	1			T7	10		T9	2		T11	15
valid_sources[0x22]	287366	1			T6	2		T7	8		T9	11
valid_sources[0x23]	591776	1			T7	15		T9	3		T11	26
valid_sources[0x24]	1232687	1			T7	19		T9	4		T11	24
valid_sources[0x25]	289929	1			T7	6		T11	25		T12	37
valid_sources[0x26]	290157	1			T7	7		T9	1		T11	20
valid_sources[0x27]	290040	1			T7	9		T9	52		T11	32
valid_sources[0x28]	287570	1			T7	8		T9	95		T11	25
valid_sources[0x29]	317455	1			T7	6		T9	3		T10	24
valid_sources[0x2a]	290243	1			T7	13		T9	1		T11	18
valid_sources[0x2b]	292955	1			T7	5		T9	139		T11	28
valid_sources[0x2c]	291209	1			T7	17		T9	3		T11	11
valid_sources[0x2d]	320225	1			T4	1		T7	12		T9	107
valid_sources[0x2e]	290815	1			T7	8		T9	1		T11	28
valid_sources[0x2f]	290695	1			T6	1		T7	19		T11	28
valid_sources[0x30]	288920	1			T7	5		T9	13		T11	15
valid_sources[0x31]	386004	1			T4	1		T7	7		T9	17
valid_sources[0x32]	288708	1			T4	1		T7	15		T9	5
valid_sources[0x33]	286210	1			T7	12		T9	1		T11	13
valid_sources[0x34]	289097	1			T4	1		T6	1		T7	11
valid_sources[0x35]	511881	1			T7	6		T9	2		T11	19
valid_sources[0x36]	350539	1			T7	8		T9	3		T11	20
valid_sources[0x37]	643154	1			T7	9		T9	69		T11	18
valid_sources[0x38]	290450	1			T7	5		T9	2		T11	25
valid_sources[0x39]	287972	1			T7	21		T9	1		T10	3
valid_sources[0x3a]	299424	1			T7	5		T11	18		T14	6
valid_sources[0x3b]	288461	1			T7	5		T9	2		T11	31
valid_sources[0x3c]	290326	1			T4	2		T6	2		T7	8
valid_sources[0x3d]	290120	1			T7	24		T11	43		T12	40
valid_sources[0x3e]	290378	1			T6	2		T7	8		T9	289
valid_sources[0x3f]	790333	1			T7	8		T9	9		T11	23
valid_sources[0x40]	291122	1			T7	5		T9	1		T11	27
valid_sources[0x41]	1318434	1			T7	6		T9	14		T11	34
valid_sources[0x42]	290719	1			T6	3		T7	19		T9	1
valid_sources[0x43]	288936	1			T7	18		T11	26		T14	10
valid_sources[0x44]	572758	1			T4	1		T7	3		T9	1
valid_sources[0x45]	291164	1			T7	3		T9	2		T11	27
valid_sources[0x46]	288198	1			T7	12		T11	26		T15	1
valid_sources[0x47]	286731	1			T7	17		T9	43		T11	17
valid_sources[0x48]	290406	1			T7	9		T9	101		T11	20
valid_sources[0x49]	361293	1			T4	2		T6	1		T7	7
valid_sources[0x4a]	290699	1			T7	10		T9	66		T11	14
valid_sources[0x4b]	289655	1			T6	1		T7	27		T11	33
valid_sources[0x4c]	512554	1			T7	10		T9	1		T11	34
valid_sources[0x4d]	288130	1			T7	6		T9	156		T11	21
valid_sources[0x4e]	287874	1			T7	4		T9	6		T11	17
valid_sources[0x4f]	289916	1			T7	5		T9	5		T11	30
valid_sources[0x50]	291523	1			T7	13		T9	189		T11	27
valid_sources[0x51]	578073	1			T7	10		T9	3		T11	20
valid_sources[0x52]	290702	1			T7	13		T9	6		T11	18
valid_sources[0x53]	977383	1			T7	14		T9	79		T11	28
valid_sources[0x54]	291789	1			T7	21		T9	9		T11	29
valid_sources[0x55]	289865	1			T7	5		T11	30		T30	1
valid_sources[0x56]	325177	1			T4	1		T7	4		T9	5
valid_sources[0x57]	290823	1			T4	1		T7	11		T9	3
valid_sources[0x58]	295291	1			T7	11		T9	5		T11	22
valid_sources[0x59]	288903	1			T7	13		T9	9		T11	28
valid_sources[0x5a]	306774	1			T6	3		T7	10		T11	27
valid_sources[0x5b]	290177	1			T7	15		T9	6		T11	31
valid_sources[0x5c]	286777	1			T7	11		T11	14		T12	33
valid_sources[0x5d]	290584	1			T4	2		T7	12		T9	155
valid_sources[0x5e]	289410	1			T7	9		T9	6		T11	27
valid_sources[0x5f]	290160	1			T4	1		T7	11		T9	191
valid_sources[0x60]	288567	1			T6	1		T7	10		T9	2
valid_sources[0x61]	288223	1			T7	7		T9	40		T11	44
valid_sources[0x62]	1850548	1			T4	1		T7	5		T9	7
valid_sources[0x63]	288850	1			T7	17		T9	3		T11	26
valid_sources[0x64]	291030	1			T7	4		T9	1		T11	34
valid_sources[0x65]	289592	1			T7	10		T9	1		T11	30
valid_sources[0x66]	287152	1			T4	1		T6	1		T7	3
valid_sources[0x67]	288259	1			T7	18		T9	3		T11	18
valid_sources[0x68]	328126	1			T6	1		T7	1		T9	1
valid_sources[0x69]	303152	1			T7	7		T9	136		T11	24
valid_sources[0x6a]	1319046	1			T7	14		T9	5		T11	32
valid_sources[0x6b]	288383	1			T7	7		T11	20		T12	28
valid_sources[0x6c]	873103	1			T7	20		T9	43		T11	38
valid_sources[0x6d]	288137	1			T7	8		T9	20		T11	26
valid_sources[0x6e]	289954	1			T7	14		T9	1		T11	24
valid_sources[0x6f]	1239015	1			T7	11		T9	118		T11	26
valid_sources[0x70]	1196235	1			T7	9		T9	56		T11	19
valid_sources[0x71]	290885	1			T4	3		T7	17		T11	16
valid_sources[0x72]	289744	1			T7	3		T9	7		T11	21
valid_sources[0x73]	288304	1			T7	11		T9	7		T11	28
valid_sources[0x74]	289411	1			T7	7		T9	1		T11	21
valid_sources[0x75]	290700	1			T4	1		T7	11		T11	31
valid_sources[0x76]	290794	1			T7	19		T9	71		T11	27
valid_sources[0x77]	291103	1			T7	8		T9	4		T11	25
valid_sources[0x78]	286974	1			T7	13		T11	30		T14	14
valid_sources[0x79]	287282	1			T7	2		T9	1		T11	30
valid_sources[0x7a]	1637419	1			T7	20		T9	182		T11	38
valid_sources[0x7b]	289521	1			T7	14		T11	20		T15	2
valid_sources[0x7c]	314073	1			T7	13		T9	14		T11	25
valid_sources[0x7d]	290727	1			T4	1		T7	9		T9	2
valid_sources[0x7e]	290594	1			T7	11		T11	26		T15	1
valid_sources[0x7f]	288670	1			T4	1		T7	9		T11	15
valid_sources[0x80]	288940	1			T4	1		T7	14		T11	19

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

55114207

1

T4

24

T5

1

T6

15

values[0x0]

all_enables

biggest_size

79724

1

T4

3

T6

11

T7

8

values[0x1]

all_enables

biggest_size

77471

1

T4

2

T6

16

T7

14