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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.67 99.33 99.04 100.00 100.00 100.00 99.66


Total test records in report: 577
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html

T227 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/68.rv_timer_random.4239182284 Sep 24 05:37:56 AM UTC 24 Sep 24 05:43:17 AM UTC 24 276936425198 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/88.rv_timer_random.172820240 Sep 24 05:41:48 AM UTC 24 Sep 24 05:43:43 AM UTC 24 23203279927 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/87.rv_timer_random.2483476473 Sep 24 05:41:41 AM UTC 24 Sep 24 05:43:44 AM UTC 24 36739892408 ps
T167 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/54.rv_timer_random.2630949589 Sep 24 05:36:16 AM UTC 24 Sep 24 05:44:04 AM UTC 24 109907813970 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/93.rv_timer_random.2996887063 Sep 24 05:42:33 AM UTC 24 Sep 24 05:44:07 AM UTC 24 109926183492 ps
T152 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/20.rv_timer_stress_all.617835428 Sep 24 05:18:34 AM UTC 24 Sep 24 05:44:07 AM UTC 24 1282731719205 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/74.rv_timer_random.928433655 Sep 24 05:39:01 AM UTC 24 Sep 24 05:44:13 AM UTC 24 154312581056 ps
T218 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/86.rv_timer_random.1117409393 Sep 24 05:41:28 AM UTC 24 Sep 24 05:44:31 AM UTC 24 171917077839 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/91.rv_timer_random.2748445399 Sep 24 05:42:18 AM UTC 24 Sep 24 05:44:48 AM UTC 24 104565194115 ps
T159 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/30.rv_timer_stress_all.2238340936 Sep 24 05:23:55 AM UTC 24 Sep 24 05:45:01 AM UTC 24 1434158126752 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/47.rv_timer_random.2021776382 Sep 24 05:33:38 AM UTC 24 Sep 24 05:45:01 AM UTC 24 969395118080 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/48.rv_timer_cfg_update_on_fly.1046414147 Sep 24 05:35:01 AM UTC 24 Sep 24 05:45:02 AM UTC 24 368769406135 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/99.rv_timer_random.4013278461 Sep 24 05:43:04 AM UTC 24 Sep 24 05:45:12 AM UTC 24 35211231296 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/42.rv_timer_stress_all.1167606256 Sep 24 05:31:25 AM UTC 24 Sep 24 05:45:12 AM UTC 24 308070630169 ps
T160 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/34.rv_timer_stress_all.2986876380 Sep 24 05:25:48 AM UTC 24 Sep 24 05:46:05 AM UTC 24 559633743651 ps
T291 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/40.rv_timer_stress_all.3411327455 Sep 24 05:30:13 AM UTC 24 Sep 24 05:46:09 AM UTC 24 936426123739 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/110.rv_timer_random.1929104973 Sep 24 05:44:49 AM UTC 24 Sep 24 05:46:17 AM UTC 24 90096793826 ps
T250 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/103.rv_timer_random.752506447 Sep 24 05:43:44 AM UTC 24 Sep 24 05:46:17 AM UTC 24 20388780849 ps
T242 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/47.rv_timer_stress_all.3295733621 Sep 24 05:34:27 AM UTC 24 Sep 24 05:46:23 AM UTC 24 163708900726 ps
T208 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/115.rv_timer_random.2581595877 Sep 24 05:45:13 AM UTC 24 Sep 24 05:46:28 AM UTC 24 73916113620 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/94.rv_timer_random.4006509748 Sep 24 05:42:52 AM UTC 24 Sep 24 05:46:31 AM UTC 24 54254471204 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/105.rv_timer_random.4277194701 Sep 24 05:44:05 AM UTC 24 Sep 24 05:46:36 AM UTC 24 164919633429 ps
T162 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/67.rv_timer_random.3445682226 Sep 24 05:37:44 AM UTC 24 Sep 24 05:46:48 AM UTC 24 261566466629 ps
T223 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/81.rv_timer_random.2081159184 Sep 24 05:40:24 AM UTC 24 Sep 24 05:47:00 AM UTC 24 409199492921 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/97.rv_timer_random.1509590471 Sep 24 05:42:57 AM UTC 24 Sep 24 05:47:17 AM UTC 24 84725085032 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/90.rv_timer_random.1205008533 Sep 24 05:42:03 AM UTC 24 Sep 24 05:47:20 AM UTC 24 54524222112 ps
T225 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/100.rv_timer_random.1125904481 Sep 24 05:43:06 AM UTC 24 Sep 24 05:47:28 AM UTC 24 112034741328 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/126.rv_timer_random.1712473985 Sep 24 05:47:17 AM UTC 24 Sep 24 05:47:31 AM UTC 24 27501600458 ps
T248 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/92.rv_timer_random.3949435753 Sep 24 05:42:28 AM UTC 24 Sep 24 05:47:42 AM UTC 24 242925886317 ps
T224 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/118.rv_timer_random.3821669036 Sep 24 05:46:18 AM UTC 24 Sep 24 05:47:43 AM UTC 24 93596425215 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/127.rv_timer_random.524120153 Sep 24 05:47:21 AM UTC 24 Sep 24 05:47:48 AM UTC 24 57023491088 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/83.rv_timer_random.570460633 Sep 24 05:41:04 AM UTC 24 Sep 24 05:47:52 AM UTC 24 115624185678 ps
T273 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/77.rv_timer_random.4046326785 Sep 24 05:39:50 AM UTC 24 Sep 24 05:47:53 AM UTC 24 225362639422 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/130.rv_timer_random.2568236815 Sep 24 05:47:43 AM UTC 24 Sep 24 05:47:56 AM UTC 24 12593939260 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/89.rv_timer_random.3364365620 Sep 24 05:41:49 AM UTC 24 Sep 24 05:48:01 AM UTC 24 274738328894 ps
T274 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/107.rv_timer_random.2495069961 Sep 24 05:44:08 AM UTC 24 Sep 24 05:48:01 AM UTC 24 291567162806 ps
T232 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/75.rv_timer_random.1816055155 Sep 24 05:39:11 AM UTC 24 Sep 24 05:48:03 AM UTC 24 523508519651 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/108.rv_timer_random.2879244931 Sep 24 05:44:15 AM UTC 24 Sep 24 05:48:03 AM UTC 24 127702693160 ps
T204 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/109.rv_timer_random.2429278988 Sep 24 05:44:33 AM UTC 24 Sep 24 05:48:13 AM UTC 24 138520065739 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/21.rv_timer_stress_all.2457561024 Sep 24 05:18:45 AM UTC 24 Sep 24 05:48:17 AM UTC 24 1247763231338 ps
T228 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/37.rv_timer_stress_all.1225149126 Sep 24 05:28:17 AM UTC 24 Sep 24 05:48:35 AM UTC 24 232424937161 ps
T205 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/125.rv_timer_random.3197076887 Sep 24 05:47:01 AM UTC 24 Sep 24 05:48:44 AM UTC 24 117542050689 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/72.rv_timer_random.1350346972 Sep 24 05:38:31 AM UTC 24 Sep 24 05:48:48 AM UTC 24 118930138566 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/137.rv_timer_random.3426008998 Sep 24 05:48:02 AM UTC 24 Sep 24 05:48:55 AM UTC 24 36673901844 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/120.rv_timer_random.544446743 Sep 24 05:46:24 AM UTC 24 Sep 24 05:49:11 AM UTC 24 243720770870 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/73.rv_timer_random.898453031 Sep 24 05:38:49 AM UTC 24 Sep 24 05:49:11 AM UTC 24 140583470048 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/104.rv_timer_random.2536482287 Sep 24 05:43:45 AM UTC 24 Sep 24 05:49:14 AM UTC 24 39684358880 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/117.rv_timer_random.3991385580 Sep 24 05:46:10 AM UTC 24 Sep 24 05:49:25 AM UTC 24 42504238972 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/22.rv_timer_stress_all.3502044400 Sep 24 05:19:17 AM UTC 24 Sep 24 05:49:49 AM UTC 24 683673205055 ps
T201 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/98.rv_timer_random.950681779 Sep 24 05:43:00 AM UTC 24 Sep 24 05:50:09 AM UTC 24 343359605103 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/139.rv_timer_random.3027694695 Sep 24 05:48:04 AM UTC 24 Sep 24 05:50:10 AM UTC 24 163974764168 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/82.rv_timer_random.1426455594 Sep 24 05:40:29 AM UTC 24 Sep 24 05:50:22 AM UTC 24 77170670370 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/142.rv_timer_random.115197202 Sep 24 05:48:36 AM UTC 24 Sep 24 05:50:22 AM UTC 24 56317425313 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/128.rv_timer_random.3789744580 Sep 24 05:47:29 AM UTC 24 Sep 24 05:50:34 AM UTC 24 67935190996 ps
T216 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/132.rv_timer_random.1402606645 Sep 24 05:47:49 AM UTC 24 Sep 24 05:50:35 AM UTC 24 344694449784 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/155.rv_timer_random.3605111020 Sep 24 05:50:35 AM UTC 24 Sep 24 05:50:43 AM UTC 24 8860859994 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/28.rv_timer_stress_all.1619422157 Sep 24 05:22:36 AM UTC 24 Sep 24 05:50:49 AM UTC 24 625785158688 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/138.rv_timer_random.3356824892 Sep 24 05:48:03 AM UTC 24 Sep 24 05:50:49 AM UTC 24 72798956690 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/24.rv_timer_stress_all.1706815743 Sep 24 05:20:43 AM UTC 24 Sep 24 05:50:51 AM UTC 24 1226482997592 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/140.rv_timer_random.1324588460 Sep 24 05:48:15 AM UTC 24 Sep 24 05:50:58 AM UTC 24 42563803157 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/135.rv_timer_random.1686303235 Sep 24 05:47:56 AM UTC 24 Sep 24 05:51:11 AM UTC 24 55989230074 ps
T247 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/112.rv_timer_random.1428885258 Sep 24 05:45:03 AM UTC 24 Sep 24 05:51:13 AM UTC 24 235269081741 ps
T219 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/114.rv_timer_random.300200509 Sep 24 05:45:13 AM UTC 24 Sep 24 05:52:02 AM UTC 24 1134868881869 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/131.rv_timer_random.2877510510 Sep 24 05:47:44 AM UTC 24 Sep 24 05:52:02 AM UTC 24 701659597541 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/159.rv_timer_random.3498199081 Sep 24 05:50:50 AM UTC 24 Sep 24 05:52:02 AM UTC 24 31553531828 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/143.rv_timer_random.1999422868 Sep 24 05:48:45 AM UTC 24 Sep 24 05:52:19 AM UTC 24 136780737181 ps
T296 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/46.rv_timer_cfg_update_on_fly.828118906 Sep 24 05:33:28 AM UTC 24 Sep 24 05:52:25 AM UTC 24 2009238320846 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/151.rv_timer_random.14752049 Sep 24 05:50:10 AM UTC 24 Sep 24 05:52:29 AM UTC 24 198414316553 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/153.rv_timer_random.4140270523 Sep 24 05:50:23 AM UTC 24 Sep 24 05:52:31 AM UTC 24 59018146109 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/161.rv_timer_random.3899281399 Sep 24 05:50:59 AM UTC 24 Sep 24 05:52:49 AM UTC 24 46371955137 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/149.rv_timer_random.574133666 Sep 24 05:49:25 AM UTC 24 Sep 24 05:52:58 AM UTC 24 335675079349 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/154.rv_timer_random.448571963 Sep 24 05:50:23 AM UTC 24 Sep 24 05:53:12 AM UTC 24 85825197815 ps
T184 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/43.rv_timer_stress_all.3023812162 Sep 24 05:31:56 AM UTC 24 Sep 24 05:53:20 AM UTC 24 969168448914 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/25.rv_timer_stress_all.1418796573 Sep 24 05:20:56 AM UTC 24 Sep 24 05:53:26 AM UTC 24 4683563626568 ps
T237 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/133.rv_timer_random.2243168441 Sep 24 05:47:53 AM UTC 24 Sep 24 05:53:26 AM UTC 24 146839099641 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/134.rv_timer_random.1355914856 Sep 24 05:47:54 AM UTC 24 Sep 24 05:53:32 AM UTC 24 56047136216 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/145.rv_timer_random.2831703633 Sep 24 05:48:56 AM UTC 24 Sep 24 05:53:42 AM UTC 24 162116911654 ps
T226 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/174.rv_timer_random.2153721847 Sep 24 05:53:20 AM UTC 24 Sep 24 05:53:52 AM UTC 24 15803178824 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/121.rv_timer_random.3498794644 Sep 24 05:46:28 AM UTC 24 Sep 24 05:53:58 AM UTC 24 337117698664 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/177.rv_timer_random.3067359812 Sep 24 05:53:33 AM UTC 24 Sep 24 05:53:59 AM UTC 24 39008890943 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/48.rv_timer_stress_all.3497594597 Sep 24 05:35:09 AM UTC 24 Sep 24 05:54:01 AM UTC 24 4074025380745 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/164.rv_timer_random.4050229465 Sep 24 05:52:03 AM UTC 24 Sep 24 05:54:02 AM UTC 24 132732221045 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/111.rv_timer_random.980713647 Sep 24 05:45:02 AM UTC 24 Sep 24 05:54:14 AM UTC 24 563569418329 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/160.rv_timer_random.4134397446 Sep 24 05:50:52 AM UTC 24 Sep 24 05:54:25 AM UTC 24 45177156668 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/101.rv_timer_random.2124305641 Sep 24 05:43:17 AM UTC 24 Sep 24 05:55:03 AM UTC 24 479828216425 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/122.rv_timer_random.796073691 Sep 24 05:46:32 AM UTC 24 Sep 24 05:55:13 AM UTC 24 1191023770149 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/79.rv_timer_random.294106962 Sep 24 05:39:57 AM UTC 24 Sep 24 05:55:13 AM UTC 24 93275327085 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/152.rv_timer_random.1349691463 Sep 24 05:50:11 AM UTC 24 Sep 24 05:55:31 AM UTC 24 75733530228 ps
T168 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/178.rv_timer_random.1611242247 Sep 24 05:53:43 AM UTC 24 Sep 24 05:55:38 AM UTC 24 55489466383 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/11.rv_timer_stress_all.3736569558 Sep 24 05:16:02 AM UTC 24 Sep 24 05:55:43 AM UTC 24 2143948631341 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/23.rv_timer_stress_all.1459382800 Sep 24 05:20:01 AM UTC 24 Sep 24 05:55:46 AM UTC 24 2059379054207 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/84.rv_timer_random.773322013 Sep 24 05:41:10 AM UTC 24 Sep 24 05:55:46 AM UTC 24 150691193732 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/102.rv_timer_random.1194886496 Sep 24 05:43:18 AM UTC 24 Sep 24 05:55:47 AM UTC 24 319800734365 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/167.rv_timer_random.2900293929 Sep 24 05:52:21 AM UTC 24 Sep 24 05:56:10 AM UTC 24 110035796879 ps
T244 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/157.rv_timer_random.955991183 Sep 24 05:50:44 AM UTC 24 Sep 24 05:56:41 AM UTC 24 269769660817 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/173.rv_timer_random.3325853177 Sep 24 05:53:13 AM UTC 24 Sep 24 05:56:47 AM UTC 24 114046333327 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/180.rv_timer_random.3679686684 Sep 24 05:53:58 AM UTC 24 Sep 24 05:56:53 AM UTC 24 84019149514 ps
T171 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/85.rv_timer_random.2462156749 Sep 24 05:41:25 AM UTC 24 Sep 24 05:56:56 AM UTC 24 196808649823 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/123.rv_timer_random.1267578150 Sep 24 05:46:36 AM UTC 24 Sep 24 05:57:11 AM UTC 24 202481345363 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/197.rv_timer_random.1883989523 Sep 24 05:56:48 AM UTC 24 Sep 24 05:57:24 AM UTC 24 76076892668 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/170.rv_timer_random.117078755 Sep 24 05:52:32 AM UTC 24 Sep 24 05:57:26 AM UTC 24 136280648488 ps
T230 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/124.rv_timer_random.4093301819 Sep 24 05:46:48 AM UTC 24 Sep 24 05:57:36 AM UTC 24 532276310459 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/175.rv_timer_random.2513294722 Sep 24 05:53:27 AM UTC 24 Sep 24 05:57:41 AM UTC 24 344785424541 ps
T236 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/41.rv_timer_random_reset.3957187681 Sep 24 05:30:43 AM UTC 24 Sep 24 05:57:42 AM UTC 24 110977054821 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/185.rv_timer_random.979360890 Sep 24 05:54:25 AM UTC 24 Sep 24 05:57:52 AM UTC 24 114178444549 ps
T199 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/183.rv_timer_random.994375351 Sep 24 05:54:03 AM UTC 24 Sep 24 05:58:01 AM UTC 24 276145196849 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/144.rv_timer_random.268658459 Sep 24 05:48:49 AM UTC 24 Sep 24 05:58:19 AM UTC 24 108870000741 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/163.rv_timer_random.588243848 Sep 24 05:51:13 AM UTC 24 Sep 24 05:58:24 AM UTC 24 529900706493 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/171.rv_timer_random.350550973 Sep 24 05:52:50 AM UTC 24 Sep 24 05:58:35 AM UTC 24 191012354140 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/36.rv_timer_random.1070094957 Sep 24 05:26:34 AM UTC 24 Sep 24 05:58:46 AM UTC 24 409180837080 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/166.rv_timer_random.3013125289 Sep 24 05:52:03 AM UTC 24 Sep 24 05:58:49 AM UTC 24 275060220442 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/168.rv_timer_random.3428641161 Sep 24 05:52:26 AM UTC 24 Sep 24 05:59:18 AM UTC 24 938988960092 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/141.rv_timer_random.2647071912 Sep 24 05:48:20 AM UTC 24 Sep 24 05:59:45 AM UTC 24 1265549824011 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/194.rv_timer_random.3779859027 Sep 24 05:55:47 AM UTC 24 Sep 24 05:59:47 AM UTC 24 349434901626 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/119.rv_timer_random.3419855744 Sep 24 05:46:18 AM UTC 24 Sep 24 05:59:55 AM UTC 24 65862666841 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/162.rv_timer_random.3571134567 Sep 24 05:51:11 AM UTC 24 Sep 24 05:59:55 AM UTC 24 169105413477 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/146.rv_timer_random.2494720167 Sep 24 05:49:12 AM UTC 24 Sep 24 06:00:14 AM UTC 24 562209840178 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/186.rv_timer_random.3757386413 Sep 24 05:55:04 AM UTC 24 Sep 24 06:00:22 AM UTC 24 132401827443 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/192.rv_timer_random.742548512 Sep 24 05:55:46 AM UTC 24 Sep 24 06:00:24 AM UTC 24 143634517698 ps
T217 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/95.rv_timer_random.1881063888 Sep 24 05:42:54 AM UTC 24 Sep 24 06:00:26 AM UTC 24 796805458165 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/188.rv_timer_random.1938099080 Sep 24 05:55:14 AM UTC 24 Sep 24 06:00:27 AM UTC 24 316323229468 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/184.rv_timer_random.2120324651 Sep 24 05:54:15 AM UTC 24 Sep 24 06:00:48 AM UTC 24 350597267392 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/195.rv_timer_random.1900461749 Sep 24 05:56:11 AM UTC 24 Sep 24 06:00:51 AM UTC 24 75225051817 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/198.rv_timer_random.4098745460 Sep 24 05:56:53 AM UTC 24 Sep 24 06:01:18 AM UTC 24 81795063480 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/147.rv_timer_random.2245491844 Sep 24 05:49:12 AM UTC 24 Sep 24 06:01:19 AM UTC 24 186254011398 ps
T203 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/29.rv_timer_stress_all.1611290928 Sep 24 05:23:12 AM UTC 24 Sep 24 06:01:20 AM UTC 24 576023930025 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/187.rv_timer_random.348644061 Sep 24 05:55:14 AM UTC 24 Sep 24 06:01:35 AM UTC 24 330709756521 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/48.rv_timer_random.3246674745 Sep 24 05:34:35 AM UTC 24 Sep 24 06:01:54 AM UTC 24 1989241515605 ps
T243 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/156.rv_timer_random.3173299465 Sep 24 05:50:36 AM UTC 24 Sep 24 06:01:55 AM UTC 24 760539380775 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/116.rv_timer_random.2525828760 Sep 24 05:46:06 AM UTC 24 Sep 24 06:02:10 AM UTC 24 169474362101 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/148.rv_timer_random.1571577994 Sep 24 05:49:15 AM UTC 24 Sep 24 06:02:12 AM UTC 24 195139369870 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/66.rv_timer_random.1508699040 Sep 24 05:37:44 AM UTC 24 Sep 24 06:02:31 AM UTC 24 116344332651 ps
T245 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/150.rv_timer_random.1375534817 Sep 24 05:49:49 AM UTC 24 Sep 24 06:03:18 AM UTC 24 372831091037 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/40.rv_timer_random.2566137364 Sep 24 05:29:42 AM UTC 24 Sep 24 06:03:31 AM UTC 24 195397769944 ps
T222 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/181.rv_timer_random.3746619870 Sep 24 05:54:00 AM UTC 24 Sep 24 06:03:57 AM UTC 24 185123742176 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/182.rv_timer_random.2449741168 Sep 24 05:54:02 AM UTC 24 Sep 24 06:04:27 AM UTC 24 633583915351 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/136.rv_timer_random.1880959143 Sep 24 05:48:01 AM UTC 24 Sep 24 06:04:46 AM UTC 24 176181846689 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/113.rv_timer_random.614506639 Sep 24 05:45:03 AM UTC 24 Sep 24 06:05:01 AM UTC 24 483194805209 ps
T172 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/45.rv_timer_random.3262185971 Sep 24 05:32:46 AM UTC 24 Sep 24 06:05:25 AM UTC 24 213170542615 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/165.rv_timer_random.3173153239 Sep 24 05:52:03 AM UTC 24 Sep 24 06:05:32 AM UTC 24 111382195889 ps
T188 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/191.rv_timer_random.2327507227 Sep 24 05:55:44 AM UTC 24 Sep 24 06:05:45 AM UTC 24 214164239129 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/179.rv_timer_random.2210341378 Sep 24 05:53:53 AM UTC 24 Sep 24 06:06:48 AM UTC 24 91144368489 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/199.rv_timer_random.2048704040 Sep 24 05:56:57 AM UTC 24 Sep 24 06:06:52 AM UTC 24 189480316647 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/158.rv_timer_random.2532502234 Sep 24 05:50:50 AM UTC 24 Sep 24 06:07:46 AM UTC 24 81396927759 ps
T214 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/63.rv_timer_random.1710914509 Sep 24 05:37:26 AM UTC 24 Sep 24 06:08:11 AM UTC 24 2372360311240 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/129.rv_timer_random.1508708958 Sep 24 05:47:32 AM UTC 24 Sep 24 06:12:12 AM UTC 24 281339690050 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/12.rv_timer_stress_all.147635065 Sep 24 05:16:22 AM UTC 24 Sep 24 06:12:34 AM UTC 24 3391528487469 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/169.rv_timer_random.1912963747 Sep 24 05:52:30 AM UTC 24 Sep 24 06:14:50 AM UTC 24 283331202674 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/34.rv_timer_random.1309045880 Sep 24 05:25:33 AM UTC 24 Sep 24 06:15:00 AM UTC 24 656689463101 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/196.rv_timer_random.3632695104 Sep 24 05:56:42 AM UTC 24 Sep 24 06:15:06 AM UTC 24 200396164661 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/46.rv_timer_stress_all.2281815768 Sep 24 05:33:34 AM UTC 24 Sep 24 06:15:38 AM UTC 24 773048979975 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/14.rv_timer_stress_all.1111821398 Sep 24 05:16:50 AM UTC 24 Sep 24 06:17:36 AM UTC 24 844717649351 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/190.rv_timer_random.1646019774 Sep 24 05:55:39 AM UTC 24 Sep 24 06:18:43 AM UTC 24 171392607408 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/189.rv_timer_random.1661090150 Sep 24 05:55:32 AM UTC 24 Sep 24 06:19:12 AM UTC 24 161259813475 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/176.rv_timer_random.2163216106 Sep 24 05:53:27 AM UTC 24 Sep 24 06:24:27 AM UTC 24 47549697307 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/106.rv_timer_random.1194946111 Sep 24 05:44:07 AM UTC 24 Sep 24 06:24:44 AM UTC 24 405153127742 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/193.rv_timer_random.2241493264 Sep 24 05:55:47 AM UTC 24 Sep 24 06:27:24 AM UTC 24 927292450304 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/172.rv_timer_random.2041634221 Sep 24 05:52:59 AM UTC 24 Sep 24 06:28:03 AM UTC 24 210789166525 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/96.rv_timer_random.3060492453 Sep 24 05:42:54 AM UTC 24 Sep 24 06:34:39 AM UTC 24 138716437107 ps
T249 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/49.rv_timer_stress_all.1610525854 Sep 24 05:36:05 AM UTC 24 Sep 24 06:36:27 AM UTC 24 2489405560819 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/44.rv_timer_stress_all.589149325 Sep 24 05:32:44 AM UTC 24 Sep 24 06:54:11 AM UTC 24 2732908812759 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/default/36.rv_timer_stress_all.1656804123 Sep 24 05:27:16 AM UTC 24 Sep 24 07:07:38 AM UTC 24 1524012600954 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_tl_errors.2406436139 Sep 24 05:57:12 AM UTC 24 Sep 24 05:57:17 AM UTC 24 58449508 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_tl_intg_err.1227905389 Sep 24 05:57:17 AM UTC 24 Sep 24 05:57:19 AM UTC 24 134286179 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_intr_test.1629837838 Sep 24 05:57:20 AM UTC 24 Sep 24 05:57:22 AM UTC 24 38588180 ps
T22 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_hw_reset.1094110488 Sep 24 05:57:23 AM UTC 24 Sep 24 05:57:25 AM UTC 24 80848306 ps
T23 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_rw.3618368125 Sep 24 05:57:24 AM UTC 24 Sep 24 05:57:26 AM UTC 24 16338794 ps
T60 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_same_csr_outstanding.4243456375 Sep 24 05:57:28 AM UTC 24 Sep 24 05:57:30 AM UTC 24 37384917 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_aliasing.2682516856 Sep 24 05:57:28 AM UTC 24 Sep 24 05:57:30 AM UTC 24 110340671 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_mem_rw_with_rand_reset.812826755 Sep 24 05:57:31 AM UTC 24 Sep 24 05:57:33 AM UTC 24 20075072 ps
T67 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_bit_bash.2771425718 Sep 24 05:57:26 AM UTC 24 Sep 24 05:57:34 AM UTC 24 531805542 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_tl_errors.1890088417 Sep 24 05:57:31 AM UTC 24 Sep 24 05:57:35 AM UTC 24 67859599 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_intr_test.687133038 Sep 24 05:57:35 AM UTC 24 Sep 24 05:57:37 AM UTC 24 29537447 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_tl_intg_err.2031693119 Sep 24 05:57:34 AM UTC 24 Sep 24 05:57:37 AM UTC 24 388527874 ps
T40 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_hw_reset.3653200156 Sep 24 05:57:36 AM UTC 24 Sep 24 05:57:38 AM UTC 24 21776815 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_rw.3158687863 Sep 24 05:57:37 AM UTC 24 Sep 24 05:57:39 AM UTC 24 91690761 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_aliasing.962445538 Sep 24 05:57:38 AM UTC 24 Sep 24 05:57:40 AM UTC 24 39446113 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_same_csr_outstanding.1721895911 Sep 24 05:57:38 AM UTC 24 Sep 24 05:57:40 AM UTC 24 79002699 ps
T68 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_bit_bash.3268126493 Sep 24 05:57:37 AM UTC 24 Sep 24 05:57:41 AM UTC 24 713472915 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_mem_rw_with_rand_reset.2385745510 Sep 24 05:57:39 AM UTC 24 Sep 24 05:57:42 AM UTC 24 38871098 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_tl_errors.1404247866 Sep 24 05:57:41 AM UTC 24 Sep 24 05:57:44 AM UTC 24 36202314 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_tl_intg_err.3497254957 Sep 24 05:57:41 AM UTC 24 Sep 24 05:57:44 AM UTC 24 343381969 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_intr_test.2714000010 Sep 24 05:57:43 AM UTC 24 Sep 24 05:57:45 AM UTC 24 56505985 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_hw_reset.2372702128 Sep 24 05:57:43 AM UTC 24 Sep 24 05:57:45 AM UTC 24 59008204 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_rw.1886482030 Sep 24 05:57:43 AM UTC 24 Sep 24 05:57:45 AM UTC 24 24014355 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_aliasing.2071185601 Sep 24 05:57:44 AM UTC 24 Sep 24 05:57:46 AM UTC 24 26088579 ps
T61 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_same_csr_outstanding.561047131 Sep 24 05:57:45 AM UTC 24 Sep 24 05:57:47 AM UTC 24 12348955 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_mem_rw_with_rand_reset.1546 Sep 24 05:57:45 AM UTC 24 Sep 24 05:57:47 AM UTC 24 21450251 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_intr_test.4218246669 Sep 24 05:57:46 AM UTC 24 Sep 24 05:57:48 AM UTC 24 44043508 ps
T71 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_tl_intg_err.3034391632 Sep 24 05:57:45 AM UTC 24 Sep 24 05:57:48 AM UTC 24 216441514 ps
T46 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_bit_bash.814031113 Sep 24 05:57:44 AM UTC 24 Sep 24 05:57:48 AM UTC 24 123259709 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_tl_errors.158532060 Sep 24 05:57:45 AM UTC 24 Sep 24 05:57:49 AM UTC 24 149978207 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_hw_reset.2068587683 Sep 24 05:57:47 AM UTC 24 Sep 24 05:57:49 AM UTC 24 15855416 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_rw.3821910998 Sep 24 05:57:48 AM UTC 24 Sep 24 05:57:50 AM UTC 24 17754061 ps
T62 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_same_csr_outstanding.556338644 Sep 24 05:57:50 AM UTC 24 Sep 24 05:57:52 AM UTC 24 63650128 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_mem_rw_with_rand_reset.2936562440 Sep 24 05:57:50 AM UTC 24 Sep 24 05:57:52 AM UTC 24 33293383 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_aliasing.174728699 Sep 24 05:57:50 AM UTC 24 Sep 24 05:57:52 AM UTC 24 35070116 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_tl_errors.2741445711 Sep 24 05:57:50 AM UTC 24 Sep 24 05:57:53 AM UTC 24 28793009 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_tl_intg_err.224105261 Sep 24 05:57:51 AM UTC 24 Sep 24 05:57:53 AM UTC 24 82549908 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_bit_bash.2643275475 Sep 24 05:57:48 AM UTC 24 Sep 24 05:57:54 AM UTC 24 428993621 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_intr_test.477438033 Sep 24 05:57:53 AM UTC 24 Sep 24 05:57:55 AM UTC 24 16280890 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_hw_reset.1257708999 Sep 24 05:57:53 AM UTC 24 Sep 24 05:57:55 AM UTC 24 21718543 ps
T52 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_rw.3159367756 Sep 24 05:57:53 AM UTC 24 Sep 24 05:57:55 AM UTC 24 44366582 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_aliasing.435766534 Sep 24 05:57:54 AM UTC 24 Sep 24 05:57:56 AM UTC 24 68062375 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_bit_bash.2114493576 Sep 24 05:57:53 AM UTC 24 Sep 24 05:57:56 AM UTC 24 527771972 ps
T63 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_same_csr_outstanding.1150081685 Sep 24 05:57:54 AM UTC 24 Sep 24 05:57:56 AM UTC 24 144067562 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_intr_test.1341501326 Sep 24 05:57:56 AM UTC 24 Sep 24 05:57:58 AM UTC 24 38445720 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_mem_rw_with_rand_reset.1531774136 Sep 24 05:57:56 AM UTC 24 Sep 24 05:57:58 AM UTC 24 20501131 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_tl_intg_err.974591426 Sep 24 05:57:56 AM UTC 24 Sep 24 05:57:58 AM UTC 24 73563937 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_csr_rw.1164679193 Sep 24 05:57:57 AM UTC 24 Sep 24 05:57:59 AM UTC 24 12793835 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_tl_errors.295977432 Sep 24 05:57:56 AM UTC 24 Sep 24 05:57:59 AM UTC 24 68443774 ps
T64 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_same_csr_outstanding.2811798161 Sep 24 05:57:58 AM UTC 24 Sep 24 05:58:00 AM UTC 24 69354178 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_csr_mem_rw_with_rand_reset.921751363 Sep 24 05:57:58 AM UTC 24 Sep 24 05:58:01 AM UTC 24 91574350 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_intr_test.1668295383 Sep 24 05:57:59 AM UTC 24 Sep 24 05:58:01 AM UTC 24 51354061 ps
T65 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_same_csr_outstanding.2716244333 Sep 24 05:57:59 AM UTC 24 Sep 24 05:58:01 AM UTC 24 52757164 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_csr_rw.3624898125 Sep 24 05:57:59 AM UTC 24 Sep 24 05:58:01 AM UTC 24 34017367 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_tl_intg_err.2631899190 Sep 24 05:57:59 AM UTC 24 Sep 24 05:58:02 AM UTC 24 100105358 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_csr_mem_rw_with_rand_reset.988180447 Sep 24 05:58:00 AM UTC 24 Sep 24 05:58:03 AM UTC 24 31221957 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_tl_errors.521003417 Sep 24 05:57:58 AM UTC 24 Sep 24 05:58:04 AM UTC 24 61655256 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_intr_test.1908889395 Sep 24 05:58:02 AM UTC 24 Sep 24 05:58:04 AM UTC 24 16463747 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_csr_rw.2374740120 Sep 24 05:58:02 AM UTC 24 Sep 24 05:58:04 AM UTC 24 13662229 ps
T66 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_same_csr_outstanding.1558469101 Sep 24 05:58:02 AM UTC 24 Sep 24 05:58:04 AM UTC 24 70332048 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_tl_errors.2853623369 Sep 24 05:58:02 AM UTC 24 Sep 24 05:58:05 AM UTC 24 98327366 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_tl_intg_err.3456062629 Sep 24 05:58:02 AM UTC 24 Sep 24 05:58:05 AM UTC 24 317451725 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_csr_mem_rw_with_rand_reset.3661616092 Sep 24 05:58:03 AM UTC 24 Sep 24 05:58:05 AM UTC 24 34500962 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_intr_test.1345619149 Sep 24 05:58:04 AM UTC 24 Sep 24 05:58:06 AM UTC 24 11748229 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_csr_rw.1856919662 Sep 24 05:58:04 AM UTC 24 Sep 24 05:58:06 AM UTC 24 129975897 ps
T69 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_tl_intg_err.1432901138 Sep 24 05:58:04 AM UTC 24 Sep 24 05:58:07 AM UTC 24 392697880 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_same_csr_outstanding.2211054057 Sep 24 05:58:06 AM UTC 24 Sep 24 05:58:08 AM UTC 24 48579518 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_csr_mem_rw_with_rand_reset.1811430335 Sep 24 05:58:06 AM UTC 24 Sep 24 05:58:08 AM UTC 24 25905423 ps
T72 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_tl_intg_err.306194576 Sep 24 05:58:06 AM UTC 24 Sep 24 05:58:08 AM UTC 24 387164265 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_tl_errors.2373677485 Sep 24 05:58:06 AM UTC 24 Sep 24 05:58:09 AM UTC 24 24600478 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_intr_test.3265835202 Sep 24 05:58:07 AM UTC 24 Sep 24 05:58:09 AM UTC 24 68556459 ps
T54 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_csr_rw.2114808235 Sep 24 05:58:07 AM UTC 24 Sep 24 05:58:09 AM UTC 24 176826972 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_tl_errors.1052041403 Sep 24 05:58:04 AM UTC 24 Sep 24 05:58:09 AM UTC 24 694798744 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_same_csr_outstanding.499728777 Sep 24 05:58:08 AM UTC 24 Sep 24 05:58:10 AM UTC 24 60269160 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_csr_mem_rw_with_rand_reset.703487044 Sep 24 05:58:08 AM UTC 24 Sep 24 05:58:10 AM UTC 24 24390042 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_tl_errors.1123613859 Sep 24 05:58:08 AM UTC 24 Sep 24 05:58:11 AM UTC 24 33907875 ps
T55 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_csr_rw.2114640442 Sep 24 05:58:10 AM UTC 24 Sep 24 05:58:12 AM UTC 24 32455266 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_intr_test.2399777437 Sep 24 05:58:10 AM UTC 24 Sep 24 05:58:12 AM UTC 24 40723645 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_same_csr_outstanding.3103030249 Sep 24 05:58:10 AM UTC 24 Sep 24 05:58:12 AM UTC 24 23419299 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_tl_intg_err.2136140199 Sep 24 05:58:10 AM UTC 24 Sep 24 05:58:12 AM UTC 24 85293760 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_tl_intg_err.2120861830 Sep 24 05:58:11 AM UTC 24 Sep 24 05:58:14 AM UTC 24 270612774 ps
T58 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_csr_rw.3069519014 Sep 24 05:58:12 AM UTC 24 Sep 24 05:58:14 AM UTC 24 15373554 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_intr_test.1796406062 Sep 24 05:58:12 AM UTC 24 Sep 24 05:58:14 AM UTC 24 38049007 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_same_csr_outstanding.47420846 Sep 24 05:58:12 AM UTC 24 Sep 24 05:58:14 AM UTC 24 20049092 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_csr_mem_rw_with_rand_reset.3633237026 Sep 24 05:58:11 AM UTC 24 Sep 24 05:58:14 AM UTC 24 61730664 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_csr_mem_rw_with_rand_reset.1048981276 Sep 24 05:58:13 AM UTC 24 Sep 24 05:58:15 AM UTC 24 56115767 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_tl_errors.2997981864 Sep 24 05:58:11 AM UTC 24 Sep 24 05:58:16 AM UTC 24 177263728 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_23/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_intr_test.1021295202 Sep 24 05:58:15 AM UTC 24 Sep 24 05:58:17 AM UTC 24 13398121 ps
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