Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

Group : spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

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Summary for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	0	8	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_tx_size	8	0	8	100.00	100	1	1	0

Summary for Variable cp_tx_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_tx_size

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
specific_sizes[4]	22327	1			T40	1864		T43	1560		T253	1648
specific_sizes[2048]	19188	1			T254	319		T46	10478		T178	142
specific_sizes[4092]	1627	1			T11	532		T26	321		T255	188
sizes[0]	589852	1			T39	70		T40	1864		T41	107
sizes[1]	510941	1			T8	37589		T16	12329		T256	7064
sizes[2]	283549	1			T106	21		T254	319		T257	8816
sizes[3]	23663	1			T23	1385		T55	7107		T258	2
sizes[4]	50232	1			T11	532		T26	321		T86	57