Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
95.39	96.31	94.03	97.00		93.33	96.30	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	61	61	100.00	61	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	61	61	100.00	61	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	2012624399	6397	0	0
addr_swap_data_rd_A	2012624399	2478	0	0
addr_swap_mask_rd_A	2012624399	2485	0	0
cmd_filter_0_rd_A	2012624399	12049	0	0
cmd_filter_1_rd_A	2012624399	11390	0	0
cmd_filter_2_rd_A	2012624399	11889	0	0
cmd_filter_3_rd_A	2012624399	10933	0	0
cmd_filter_4_rd_A	2012624399	9997	0	0
cmd_filter_5_rd_A	2012624399	10854	0	0
cmd_filter_6_rd_A	2012624399	12004	0	0
cmd_filter_7_rd_A	2012624399	11290	0	0
cmd_info_0_rd_A	2012624399	5751	0	0
cmd_info_10_rd_A	2012624399	5981	0	0
cmd_info_11_rd_A	2012624399	5339	0	0
cmd_info_12_rd_A	2012624399	5968	0	0
cmd_info_13_rd_A	2012624399	5530	0	0
cmd_info_14_rd_A	2012624399	4984	0	0
cmd_info_15_rd_A	2012624399	5448	0	0
cmd_info_16_rd_A	2012624399	6293	0	0
cmd_info_17_rd_A	2012624399	5801	0	0
cmd_info_18_rd_A	2012624399	5634	0	0
cmd_info_19_rd_A	2012624399	5536	0	0
cmd_info_1_rd_A	2012624399	5514	0	0
cmd_info_20_rd_A	2012624399	5653	0	0
cmd_info_21_rd_A	2012624399	5188	0	0
cmd_info_22_rd_A	2012624399	5336	0	0
cmd_info_23_rd_A	2012624399	5597	0	0
cmd_info_2_rd_A	2012624399	5368	0	0
cmd_info_3_rd_A	2012624399	5619	0	0
cmd_info_4_rd_A	2012624399	6061	0	0
cmd_info_5_rd_A	2012624399	5489	0	0
cmd_info_6_rd_A	2012624399	5658	0	0
cmd_info_7_rd_A	2012624399	5782	0	0
cmd_info_8_rd_A	2012624399	5435	0	0
cmd_info_9_rd_A	2012624399	6158	0	0
cmd_info_en4b_rd_A	2012624399	2681	0	0
cmd_info_ex4b_rd_A	2012624399	2633	0	0
cmd_info_wrdi_rd_A	2012624399	2824	0	0
cmd_info_wren_rd_A	2012624399	2921	0	0
control_rd_A	2012624399	3859	0	0
fifo_level_rd_A	2012624399	2777	0	0
intercept_en_rd_A	2012624399	3229	0	0
intr_enable_rd_A	2012624399	6057	0	0
jedec_cc_rd_A	2012624399	2757	0	0
jedec_id_rd_A	2012624399	2695	0	0
mailbox_addr_rd_A	2012624399	2731	0	0
payload_swap_data_rd_A	2012624399	2501	0	0
payload_swap_mask_rd_A	2012624399	2424	0	0
read_threshold_rd_A	2012624399	2383	0	0
rxf_addr_rd_A	2012624399	2956	0	0
tpm_access_0_rd_A	2012624399	3560	0	0
tpm_access_1_rd_A	2012624399	2511	0	0
tpm_cfg_rd_A	2012624399	3767	0	0
tpm_did_vid_rd_A	2012624399	2805	0	0
tpm_int_enable_rd_A	2012624399	2450	0	0
tpm_int_status_rd_A	2012624399	2469	0	0
tpm_int_vector_rd_A	2012624399	2452	0	0
tpm_intf_capability_rd_A	2012624399	2547	0	0
tpm_rid_rd_A	2012624399	2403	0	0
tpm_sts_rd_A	2012624399	2401	0	0
txf_addr_rd_A	2012624399	2697	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	6397	0	0
T64	1427	1	0	0
T69	4849	1	0	0
T78	3056	2	0	0
T80	2254	11	0	0
T81	5954	0	0	0
T82	0	4	0	0
T83	1336	0	0	0
T112	8419	240	0	0
T113	15235	395	0	0
T118	0	672	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	0	1	0	0
T171	0	2	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2478	0	0
T78	3056	8	0	0
T82	110325	112	0	0
T83	1336	0	0	0
T113	15235	5	0	0
T116	0	116	0	0
T117	0	72	0	0
T129	0	38	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	5	0	0
T140	0	8	0	0
T158	0	13	0	0
T171	3021	0	0	0
T172	0	43	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2485	0	0
T78	3056	12	0	0
T82	110325	111	0	0
T116	0	106	0	0
T117	0	58	0	0
T118	20225	0	0	0
T129	0	22	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	2	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	49	0	0
T171	3021	0	0	0
T172	0	31	0	0
T173	0	352	0	0
T174	0	17	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	12049	0	0
T78	3056	5	0	0
T82	110325	1900	0	0
T116	0	1596	0	0
T117	0	959	0	0
T118	20225	0	0	0
T129	0	404	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	116	0	0
T140	0	4	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	19	0	0
T171	3021	10	0	0
T172	0	344	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	11390	0	0
T78	3056	7	0	0
T82	110325	1972	0	0
T116	0	1918	0	0
T117	0	874	0	0
T118	20225	0	0	0
T129	0	632	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	101	0	0
T140	0	2	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	28	0	0
T171	3021	10	0	0
T172	0	287	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	11889	0	0
T78	3056	13	0	0
T82	110325	1628	0	0
T116	0	2510	0	0
T117	0	1102	0	0
T118	20225	0	0	0
T129	0	572	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	6	0	0
T140	0	240	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	45	0	0
T171	3021	3	0	0
T172	0	276	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	10933	0	0
T78	3056	11	0	0
T82	110325	1969	0	0
T116	0	1354	0	0
T117	0	990	0	0
T118	20225	0	0	0
T129	0	498	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	113	0	0
T140	0	158	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	21	0	0
T171	3021	2	0	0
T172	0	430	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	9997	0	0
T78	3056	4	0	0
T82	110325	1538	0	0
T116	0	1539	0	0
T117	0	969	0	0
T118	20225	0	0	0
T129	0	410	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	7	0	0
T140	0	7	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	31	0	0
T171	3021	3	0	0
T172	0	358	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	10854	0	0
T78	3056	7	0	0
T82	110325	1920	0	0
T116	0	1652	0	0
T117	0	838	0	0
T118	20225	0	0	0
T129	0	579	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	1	0	0
T140	0	129	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	55	0	0
T171	3021	6	0	0
T172	0	432	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	12004	0	0
T78	3056	7	0	0
T82	110325	2274	0	0
T116	0	1808	0	0
T117	0	1039	0	0
T118	20225	0	0	0
T129	0	659	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	240	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	96	0	0
T171	3021	0	0	0
T172	0	353	0	0
T173	0	409	0	0
T175	0	76	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	11290	0	0
T78	3056	11	0	0
T82	110325	1735	0	0
T116	0	2263	0	0
T117	0	1159	0	0
T118	20225	0	0	0
T129	0	509	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	3	0	0
T140	0	139	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	16	0	0
T171	3021	5	0	0
T172	0	234	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5751	0	0
T78	3056	9	0	0
T82	110325	655	0	0
T116	0	802	0	0
T117	0	356	0	0
T118	20225	0	0	0
T129	0	256	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	57	0	0
T140	0	57	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	75	0	0
T171	3021	2	0	0
T172	0	134	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5981	0	0
T78	3056	9	0	0
T82	110325	856	0	0
T116	0	701	0	0
T117	0	444	0	0
T118	20225	0	0	0
T129	0	333	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	44	0	0
T140	0	57	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	68	0	0
T171	3021	1	0	0
T172	0	162	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5339	0	0
T78	3056	14	0	0
T82	110325	793	0	0
T116	0	844	0	0
T117	0	324	0	0
T118	20225	0	0	0
T129	0	279	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	55	0	0
T140	0	52	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	54	0	0
T171	3021	4	0	0
T172	0	122	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5968	0	0
T78	3056	4	0	0
T82	110325	994	0	0
T116	0	648	0	0
T117	0	424	0	0
T118	20225	0	0	0
T129	0	234	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	6	0	0
T140	0	64	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	22	0	0
T171	3021	1	0	0
T172	0	173	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5530	0	0
T78	3056	11	0	0
T82	110325	740	0	0
T116	0	668	0	0
T117	0	289	0	0
T118	20225	0	0	0
T129	0	263	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	2	0	0
T140	0	68	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	42	0	0
T171	3021	0	0	0
T172	0	92	0	0
T173	0	280	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	4984	0	0
T78	3056	4	0	0
T82	110325	753	0	0
T116	0	603	0	0
T117	0	219	0	0
T118	20225	0	0	0
T129	0	313	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	51	0	0
T140	0	49	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	1	0	0
T171	3021	2	0	0
T172	0	35	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5448	0	0
T78	3056	6	0	0
T82	110325	504	0	0
T116	0	671	0	0
T117	0	366	0	0
T118	20225	0	0	0
T129	0	424	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	40	0	0
T140	0	36	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	14	0	0
T171	3021	5	0	0
T172	0	142	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	6293	0	0
T78	3056	9	0	0
T82	110325	878	0	0
T116	0	853	0	0
T117	0	431	0	0
T118	20225	0	0	0
T129	0	242	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	8	0	0
T140	0	79	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	69	0	0
T171	3021	10	0	0
T172	0	180	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5801	0	0
T78	3056	3	0	0
T82	110325	763	0	0
T116	0	822	0	0
T117	0	412	0	0
T118	20225	0	0	0
T129	0	186	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	7	0	0
T140	0	67	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	74	0	0
T171	3021	1	0	0
T172	0	138	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5634	0	0
T78	3056	9	0	0
T82	110325	688	0	0
T116	0	585	0	0
T117	0	426	0	0
T118	20225	0	0	0
T129	0	327	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	3	0	0
T140	0	51	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	29	0	0
T171	3021	5	0	0
T172	0	171	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5536	0	0
T78	3056	5	0	0
T82	110325	675	0	0
T83	1336	0	0	0
T113	15235	3	0	0
T116	0	583	0	0
T117	0	451	0	0
T129	0	254	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	52	0	0
T140	0	9	0	0
T171	3021	5	0	0
T172	0	145	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5514	0	0
T78	3056	5	0	0
T82	110325	921	0	0
T116	0	669	0	0
T117	0	339	0	0
T118	20225	0	0	0
T129	0	378	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	45	0	0
T140	0	47	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	6	0	0
T171	3021	8	0	0
T172	0	74	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5653	0	0
T78	3056	3	0	0
T82	110325	812	0	0
T116	0	756	0	0
T117	0	395	0	0
T118	20225	0	0	0
T129	0	283	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	8	0	0
T140	0	8	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	50	0	0
T171	3021	3	0	0
T172	0	99	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5188	0	0
T78	3056	11	0	0
T82	110325	524	0	0
T83	1336	0	0	0
T113	15235	10	0	0
T116	0	751	0	0
T117	0	482	0	0
T129	0	166	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	3	0	0
T140	0	56	0	0
T158	0	32	0	0
T171	3021	0	0	0
T172	0	84	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5336	0	0
T78	3056	10	0	0
T82	110325	527	0	0
T116	0	612	0	0
T117	0	456	0	0
T118	20225	0	0	0
T129	0	232	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	6	0	0
T140	0	62	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	68	0	0
T171	3021	0	0	0
T172	0	102	0	0
T173	0	312	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5597	0	0
T78	3056	2	0	0
T82	110325	702	0	0
T116	0	874	0	0
T117	0	288	0	0
T118	20225	0	0	0
T129	0	390	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	4	0	0
T140	0	50	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	33	0	0
T171	3021	0	0	0
T172	0	170	0	0
T173	0	305	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5368	0	0
T78	3056	12	0	0
T82	110325	618	0	0
T116	0	610	0	0
T117	0	425	0	0
T118	20225	0	0	0
T129	0	270	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	46	0	0
T140	0	17	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	64	0	0
T171	3021	11	0	0
T172	0	65	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5619	0	0
T78	3056	7	0	0
T82	110325	656	0	0
T116	0	807	0	0
T117	0	374	0	0
T118	20225	0	0	0
T129	0	149	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	53	0	0
T140	0	81	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	54	0	0
T171	3021	6	0	0
T172	0	162	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	6061	0	0
T78	3056	1	0	0
T82	110325	715	0	0
T116	0	828	0	0
T117	0	462	0	0
T118	20225	0	0	0
T129	0	288	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	39	0	0
T140	0	44	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	59	0	0
T171	3021	0	0	0
T172	0	121	0	0
T173	0	360	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5489	0	0
T78	3056	5	0	0
T82	110325	822	0	0
T116	0	815	0	0
T117	0	355	0	0
T118	20225	0	0	0
T129	0	202	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	5	0	0
T140	0	4	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	28	0	0
T171	3021	6	0	0
T172	0	112	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5658	0	0
T78	3056	8	0	0
T82	110325	825	0	0
T116	0	754	0	0
T117	0	314	0	0
T118	20225	0	0	0
T129	0	287	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	1	0	0
T140	0	30	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	94	0	0
T171	3021	3	0	0
T172	0	137	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5782	0	0
T78	3056	13	0	0
T82	110325	710	0	0
T116	0	635	0	0
T117	0	361	0	0
T118	20225	0	0	0
T129	0	229	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	25	0	0
T140	0	56	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	37	0	0
T171	3021	8	0	0
T172	0	216	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	5435	0	0
T78	3056	16	0	0
T82	110325	676	0	0
T116	0	592	0	0
T117	0	523	0	0
T118	20225	0	0	0
T129	0	216	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	7	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	9	0	0
T171	3021	0	0	0
T172	0	66	0	0
T173	0	323	0	0
T175	0	35	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	6158	0	0
T78	3056	14	0	0
T82	110325	722	0	0
T116	0	931	0	0
T117	0	390	0	0
T118	20225	0	0	0
T129	0	247	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	7	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	23	0	0
T171	3021	9	0	0
T172	0	135	0	0
T173	0	318	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2681	0	0
T78	3056	6	0	0
T82	110325	179	0	0
T116	0	179	0	0
T117	0	83	0	0
T118	20225	0	0	0
T129	0	36	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	5	0	0
T140	0	9	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	16	0	0
T171	3021	3	0	0
T172	0	20	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2633	0	0
T78	3056	8	0	0
T82	110325	182	0	0
T116	0	211	0	0
T117	0	81	0	0
T118	20225	0	0	0
T129	0	54	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	9	0	0
T140	0	9	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	33	0	0
T171	3021	3	0	0
T172	0	15	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2824	0	0
T78	3056	5	0	0
T82	110325	164	0	0
T83	1336	0	0	0
T113	15235	8	0	0
T116	0	215	0	0
T117	0	83	0	0
T129	0	65	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	12	0	0
T140	0	7	0	0
T158	0	26	0	0
T171	3021	0	0	0
T172	0	30	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2921	0	0
T78	3056	4	0	0
T82	110325	171	0	0
T83	1336	0	0	0
T113	15235	5	0	0
T116	0	207	0	0
T117	0	104	0	0
T129	0	57	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	9	0	0
T140	0	3	0	0
T158	0	95	0	0
T171	3021	0	0	0
T172	0	23	0	0

control_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	3859	0	0
T78	3056	1	0	0
T82	110325	371	0	0
T116	0	333	0	0
T117	0	217	0	0
T118	20225	0	0	0
T129	0	144	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	9	0	0
T140	0	11	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	40	0	0
T171	3021	7	0	0
T172	0	69	0	0

fifo_level_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2777	0	0
T78	3056	14	0	0
T82	110325	163	0	0
T116	0	179	0	0
T117	0	106	0	0
T118	20225	0	0	0
T129	0	53	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	3	0	0
T140	0	13	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	41	0	0
T171	3021	2	0	0
T172	0	43	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	3229	0	0
T78	3056	2	0	0
T82	110325	255	0	0
T116	0	246	0	0
T117	0	153	0	0
T118	20225	0	0	0
T129	0	101	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	12	0	0
T140	0	38	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	43	0	0
T171	3021	2	0	0
T172	0	35	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	6057	0	0
T78	3056	11	0	0
T82	110325	672	0	0
T116	0	746	0	0
T117	0	393	0	0
T118	20225	0	0	0
T130	1305	31	0	0
T131	1333	23	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	7	0	0
T138	3830	7	0	0
T144	0	15	0	0
T171	3021	6	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2757	0	0
T78	3056	11	0	0
T82	110325	142	0	0
T116	0	156	0	0
T117	0	100	0	0
T118	20225	0	0	0
T129	0	62	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	2	0	0
T140	0	15	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	65	0	0
T171	3021	6	0	0
T172	0	33	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2695	0	0
T78	3056	5	0	0
T82	110325	162	0	0
T116	0	175	0	0
T117	0	70	0	0
T118	20225	0	0	0
T129	0	46	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	5	0	0
T140	0	17	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	45	0	0
T171	3021	0	0	0
T172	0	45	0	0
T173	0	337	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2731	0	0
T78	3056	9	0	0
T82	110325	106	0	0
T116	0	118	0	0
T117	0	74	0	0
T118	20225	0	0	0
T129	0	37	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	10	0	0
T140	0	6	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	48	0	0
T171	3021	4	0	0
T172	0	53	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2501	0	0
T78	3056	2	0	0
T82	110325	127	0	0
T83	1336	0	0	0
T113	15235	2	0	0
T116	0	105	0	0
T117	0	51	0	0
T129	0	47	0	0
T130	1305	0	0	0
T131	1333	0	0	0
T132	3115	0	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	0	8	0	0
T140	0	6	0	0
T158	0	36	0	0
T171	3021	0	0	0
T172	0	6	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2424	0	0
T78	3056	8	0	0
T82	110325	95	0	0
T116	0	92	0	0
T117	0	55	0	0
T118	20225	0	0	0
T129	0	29	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	5	0	0
T140	0	1	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	27	0	0
T171	3021	8	0	0
T172	0	19	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2383	0	0
T78	3056	9	0	0
T82	110325	103	0	0
T116	0	120	0	0
T117	0	84	0	0
T118	20225	0	0	0
T129	0	25	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	3	0	0
T140	0	3	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	61	0	0
T171	3021	3	0	0
T172	0	11	0	0

rxf_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2956	0	0
T78	3056	5	0	0
T82	110325	148	0	0
T116	0	175	0	0
T117	0	94	0	0
T118	20225	0	0	0
T129	0	61	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	9	0	0
T140	0	8	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	53	0	0
T171	3021	8	0	0
T172	0	51	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	3560	0	0
T78	3056	8	0	0
T82	110325	319	0	0
T116	0	226	0	0
T117	0	149	0	0
T118	20225	0	0	0
T129	0	108	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	20	0	0
T140	0	16	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	36	0	0
T171	3021	4	0	0
T172	0	62	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2511	0	0
T78	3056	12	0	0
T82	110325	120	0	0
T116	0	83	0	0
T117	0	79	0	0
T118	20225	0	0	0
T129	0	21	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	1	0	0
T140	0	12	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	9	0	0
T171	3021	2	0	0
T172	0	19	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	3767	0	0
T78	3056	12	0	0
T82	110325	376	0	0
T116	0	319	0	0
T117	0	194	0	0
T118	20225	0	0	0
T129	0	130	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	19	0	0
T140	0	14	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	32	0	0
T171	3021	5	0	0
T172	0	43	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2805	0	0
T78	3056	9	0	0
T82	110325	182	0	0
T116	0	166	0	0
T117	0	94	0	0
T118	20225	0	0	0
T129	0	81	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	10	0	0
T140	0	14	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	18	0	0
T171	3021	7	0	0
T172	0	35	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2450	0	0
T78	3056	4	0	0
T82	110325	103	0	0
T116	0	81	0	0
T117	0	61	0	0
T118	20225	0	0	0
T129	0	39	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	7	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	5	0	0
T171	3021	3	0	0
T172	0	16	0	0
T173	0	377	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2469	0	0
T78	3056	9	0	0
T82	110325	123	0	0
T116	0	130	0	0
T117	0	63	0	0
T118	20225	0	0	0
T129	0	39	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	1	0	0
T140	0	2	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	39	0	0
T171	3021	9	0	0
T172	0	24	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2452	0	0
T78	3056	7	0	0
T82	110325	113	0	0
T116	0	108	0	0
T117	0	63	0	0
T118	20225	0	0	0
T129	0	38	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	2	0	0
T140	0	13	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	47	0	0
T171	3021	1	0	0
T172	0	3	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2547	0	0
T78	3056	8	0	0
T82	110325	129	0	0
T116	0	110	0	0
T117	0	77	0	0
T118	20225	0	0	0
T129	0	41	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	2	0	0
T140	0	9	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	47	0	0
T171	3021	3	0	0
T172	0	21	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2403	0	0
T78	3056	1	0	0
T82	110325	114	0	0
T116	0	90	0	0
T117	0	53	0	0
T118	20225	0	0	0
T129	0	28	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	0	0	0
T140	0	7	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	25	0	0
T171	3021	2	0	0
T172	0	13	0	0
T173	0	280	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2401	0	0
T78	3056	5	0	0
T82	110325	113	0	0
T116	0	110	0	0
T117	0	48	0	0
T118	20225	0	0	0
T129	0	39	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	8	0	0
T140	0	12	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	55	0	0
T171	3021	0	0	0
T172	0	25	0	0
T173	0	305	0	0

txf_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	2012624399	2697	0	0
T78	3056	9	0	0
T82	110325	165	0	0
T116	0	197	0	0
T117	0	90	0	0
T118	20225	0	0	0
T129	0	42	0	0
T133	1184	0	0	0
T135	1246	0	0	0
T138	3830	1	0	0
T140	0	11	0	0
T142	994	0	0	0
T143	1469	0	0	0
T144	1268	0	0	0
T158	0	11	0	0
T171	3021	0	0	0
T172	0	30	0	0
T173	0	313	0	0