Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 66 0 0.00
Crosses 128 128 0 0.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 2 0 0.00 100 1 1 2
cp_opcode 64 64 0 0.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 128 0 0.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_filtered

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 64 0 0.00


Automatically Generated Bins for cp_opcode

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0:3] - auto[252:255]] -- -- 64



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 128 0 0.00 128


Automatically Generated Cross Bins for cr_all

Uncovered bins
cp_opcodecp_filteredCOUNTAT LEASTNUMBERSTATUS
* * -- -- 128

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%