Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

Group : spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

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Summary for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	0	8	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_tx_size	8	0	8	100.00	100	1	1	0

Summary for Variable cp_tx_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_tx_size

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
specific_sizes[4]	22861	1			T9	216		T264	2374		T56	67
specific_sizes[2048]	396	1			T265	31		T186	55		T266	1
specific_sizes[4092]	2557	1			T267	22		T268	4		T269	563
sizes[0]	588269	1			T2	11511		T14	508		T35	439
sizes[1]	322807	1			T11	15		T32	1866		T60	258
sizes[2]	250448	1			T34	10603		T9	16565		T270	10823
sizes[3]	19266	1			T271	34		T123	405		T272	2287
sizes[4]	36068	1			T209	144		T130	1591		T267	22