| T808 |
/workspace/coverage/default/40.spi_device_tpm_rw.1556571146 |
|
|
Feb 18 02:15:33 PM PST 24 |
Feb 18 02:16:14 PM PST 24 |
129708729 ps |
| T809 |
/workspace/coverage/default/41.spi_device_csb_read.1503597615 |
|
|
Feb 18 02:15:39 PM PST 24 |
Feb 18 02:16:19 PM PST 24 |
35746561 ps |
| T810 |
/workspace/coverage/default/6.spi_device_stress_all.1988178889 |
|
|
Feb 18 02:12:34 PM PST 24 |
Feb 18 02:16:11 PM PST 24 |
90693537724 ps |
| T811 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.4125714158 |
|
|
Feb 18 02:14:14 PM PST 24 |
Feb 18 02:17:40 PM PST 24 |
68209306929 ps |
| T812 |
/workspace/coverage/default/44.spi_device_csb_read.2020202377 |
|
|
Feb 18 02:15:48 PM PST 24 |
Feb 18 02:16:27 PM PST 24 |
17648082 ps |
| T813 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.369242953 |
|
|
Feb 18 02:13:18 PM PST 24 |
Feb 18 02:14:01 PM PST 24 |
5044857848 ps |
| T814 |
/workspace/coverage/default/0.spi_device_intercept.1900210338 |
|
|
Feb 18 02:12:22 PM PST 24 |
Feb 18 02:13:08 PM PST 24 |
2986614150 ps |
| T815 |
/workspace/coverage/default/33.spi_device_mailbox.253391002 |
|
|
Feb 18 02:15:02 PM PST 24 |
Feb 18 02:16:21 PM PST 24 |
47934392797 ps |
| T816 |
/workspace/coverage/default/23.spi_device_intercept.1664303124 |
|
|
Feb 18 02:14:02 PM PST 24 |
Feb 18 02:14:51 PM PST 24 |
944744146 ps |
| T817 |
/workspace/coverage/default/28.spi_device_csb_read.3950389370 |
|
|
Feb 18 02:14:36 PM PST 24 |
Feb 18 02:15:28 PM PST 24 |
13556152 ps |
| T818 |
/workspace/coverage/default/7.spi_device_alert_test.1564150898 |
|
|
Feb 18 02:12:48 PM PST 24 |
Feb 18 02:13:37 PM PST 24 |
13104921 ps |
| T819 |
/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2869251664 |
|
|
Feb 18 02:12:29 PM PST 24 |
Feb 18 02:17:12 PM PST 24 |
172538274435 ps |
| T820 |
/workspace/coverage/default/39.spi_device_tpm_sts_read.2716076272 |
|
|
Feb 18 02:15:30 PM PST 24 |
Feb 18 02:16:06 PM PST 24 |
25300065 ps |
| T821 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.477739891 |
|
|
Feb 18 02:14:40 PM PST 24 |
Feb 18 02:15:38 PM PST 24 |
2735665416 ps |
| T822 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.641680070 |
|
|
Feb 18 02:15:15 PM PST 24 |
Feb 18 02:15:54 PM PST 24 |
64102574 ps |
| T823 |
/workspace/coverage/default/41.spi_device_alert_test.2937646468 |
|
|
Feb 18 02:15:32 PM PST 24 |
Feb 18 02:16:09 PM PST 24 |
14662382 ps |
| T824 |
/workspace/coverage/default/34.spi_device_flash_mode.2731119520 |
|
|
Feb 18 02:15:10 PM PST 24 |
Feb 18 02:16:06 PM PST 24 |
7024153502 ps |
| T825 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3692517579 |
|
|
Feb 18 02:13:30 PM PST 24 |
Feb 18 02:14:15 PM PST 24 |
1299550614 ps |
| T826 |
/workspace/coverage/default/49.spi_device_tpm_all.913227303 |
|
|
Feb 18 02:16:15 PM PST 24 |
Feb 18 02:18:40 PM PST 24 |
18085064811 ps |
| T827 |
/workspace/coverage/default/28.spi_device_tpm_sts_read.879169632 |
|
|
Feb 18 02:14:28 PM PST 24 |
Feb 18 02:15:26 PM PST 24 |
153221520 ps |
| T828 |
/workspace/coverage/default/2.spi_device_tpm_all.1248563958 |
|
|
Feb 18 02:12:25 PM PST 24 |
Feb 18 02:13:06 PM PST 24 |
176650779 ps |
| T829 |
/workspace/coverage/default/25.spi_device_pass_cmd_filtering.590991700 |
|
|
Feb 18 02:14:11 PM PST 24 |
Feb 18 02:15:05 PM PST 24 |
13524570384 ps |
| T830 |
/workspace/coverage/default/19.spi_device_tpm_rw.1705547610 |
|
|
Feb 18 02:13:40 PM PST 24 |
Feb 18 02:14:33 PM PST 24 |
83581302 ps |
| T831 |
/workspace/coverage/default/0.spi_device_mem_parity.2399027086 |
|
|
Feb 18 02:12:14 PM PST 24 |
Feb 18 02:12:49 PM PST 24 |
29838800 ps |
| T832 |
/workspace/coverage/default/4.spi_device_alert_test.3421417972 |
|
|
Feb 18 02:12:41 PM PST 24 |
Feb 18 02:13:22 PM PST 24 |
12862770 ps |
| T833 |
/workspace/coverage/default/32.spi_device_upload.2213579749 |
|
|
Feb 18 02:15:00 PM PST 24 |
Feb 18 02:16:05 PM PST 24 |
14719771576 ps |
| T834 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.3000693235 |
|
|
Feb 18 02:12:49 PM PST 24 |
Feb 18 02:13:35 PM PST 24 |
344472376 ps |
| T835 |
/workspace/coverage/default/9.spi_device_ram_cfg.2058322108 |
|
|
Feb 18 02:12:56 PM PST 24 |
Feb 18 02:13:37 PM PST 24 |
26711450 ps |
| T836 |
/workspace/coverage/default/30.spi_device_mailbox.2199654378 |
|
|
Feb 18 02:14:48 PM PST 24 |
Feb 18 02:15:41 PM PST 24 |
1279863971 ps |
| T837 |
/workspace/coverage/default/19.spi_device_flash_mode.1762026943 |
|
|
Feb 18 02:13:42 PM PST 24 |
Feb 18 02:14:46 PM PST 24 |
5551485768 ps |
| T838 |
/workspace/coverage/default/20.spi_device_intercept.2257964080 |
|
|
Feb 18 02:13:56 PM PST 24 |
Feb 18 02:14:40 PM PST 24 |
97611236 ps |
| T839 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.3566817459 |
|
|
Feb 18 02:15:35 PM PST 24 |
Feb 18 02:16:32 PM PST 24 |
7202593242 ps |
| T840 |
/workspace/coverage/default/7.spi_device_tpm_rw.4233111996 |
|
|
Feb 18 02:12:39 PM PST 24 |
Feb 18 02:13:22 PM PST 24 |
158599745 ps |
| T841 |
/workspace/coverage/default/16.spi_device_intercept.3536672987 |
|
|
Feb 18 02:13:36 PM PST 24 |
Feb 18 02:14:25 PM PST 24 |
1437041654 ps |
| T842 |
/workspace/coverage/default/16.spi_device_mailbox.3424383491 |
|
|
Feb 18 02:13:35 PM PST 24 |
Feb 18 02:14:41 PM PST 24 |
26857997179 ps |
| T843 |
/workspace/coverage/default/38.spi_device_flash_mode.534698678 |
|
|
Feb 18 02:15:37 PM PST 24 |
Feb 18 02:16:40 PM PST 24 |
14430058419 ps |
| T844 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.3646534682 |
|
|
Feb 18 02:13:58 PM PST 24 |
Feb 18 02:14:41 PM PST 24 |
712471039 ps |
| T845 |
/workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3879586119 |
|
|
Feb 18 02:13:31 PM PST 24 |
Feb 18 02:15:44 PM PST 24 |
34285871968 ps |
| T135 |
/workspace/coverage/default/32.spi_device_stress_all.3600192822 |
|
|
Feb 18 02:14:56 PM PST 24 |
Feb 18 02:25:53 PM PST 24 |
153818258535 ps |
| T846 |
/workspace/coverage/default/46.spi_device_cfg_cmd.3563042356 |
|
|
Feb 18 02:15:59 PM PST 24 |
Feb 18 02:16:39 PM PST 24 |
2460602865 ps |
| T847 |
/workspace/coverage/default/30.spi_device_flash_and_tpm.2345873626 |
|
|
Feb 18 02:14:49 PM PST 24 |
Feb 18 02:18:04 PM PST 24 |
174270240973 ps |
| T848 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.2540385617 |
|
|
Feb 18 02:13:40 PM PST 24 |
Feb 18 02:14:30 PM PST 24 |
3187804393 ps |
| T849 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.1774320931 |
|
|
Feb 18 02:13:43 PM PST 24 |
Feb 18 02:14:37 PM PST 24 |
662223342 ps |
| T850 |
/workspace/coverage/default/10.spi_device_upload.1667855247 |
|
|
Feb 18 02:13:09 PM PST 24 |
Feb 18 02:14:25 PM PST 24 |
9991159002 ps |
| T851 |
/workspace/coverage/default/12.spi_device_tpm_all.3228518949 |
|
|
Feb 18 02:13:12 PM PST 24 |
Feb 18 02:15:12 PM PST 24 |
16451699659 ps |
| T852 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.3190635160 |
|
|
Feb 18 02:14:09 PM PST 24 |
Feb 18 02:15:03 PM PST 24 |
5356014758 ps |
| T853 |
/workspace/coverage/default/42.spi_device_cfg_cmd.1201902400 |
|
|
Feb 18 02:15:42 PM PST 24 |
Feb 18 02:16:27 PM PST 24 |
1477863753 ps |
| T854 |
/workspace/coverage/default/44.spi_device_upload.1172179042 |
|
|
Feb 18 02:15:52 PM PST 24 |
Feb 18 02:16:46 PM PST 24 |
27036533638 ps |
| T855 |
/workspace/coverage/default/16.spi_device_tpm_rw.3842932562 |
|
|
Feb 18 02:13:31 PM PST 24 |
Feb 18 02:14:21 PM PST 24 |
85312876 ps |
| T856 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.1403581196 |
|
|
Feb 18 02:13:30 PM PST 24 |
Feb 18 02:14:43 PM PST 24 |
13544845325 ps |
| T136 |
/workspace/coverage/default/34.spi_device_stress_all.1534309098 |
|
|
Feb 18 02:15:08 PM PST 24 |
Feb 18 02:18:34 PM PST 24 |
9303328357 ps |
| T857 |
/workspace/coverage/default/14.spi_device_tpm_rw.1435327570 |
|
|
Feb 18 02:13:23 PM PST 24 |
Feb 18 02:14:07 PM PST 24 |
506938095 ps |
| T858 |
/workspace/coverage/default/41.spi_device_flash_mode.657364704 |
|
|
Feb 18 02:15:32 PM PST 24 |
Feb 18 02:16:31 PM PST 24 |
4294815077 ps |
| T859 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.2226524548 |
|
|
Feb 18 02:15:19 PM PST 24 |
Feb 18 02:16:03 PM PST 24 |
1175147555 ps |
| T860 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.57261673 |
|
|
Feb 18 02:13:58 PM PST 24 |
Feb 18 02:14:50 PM PST 24 |
3174558205 ps |
| T861 |
/workspace/coverage/default/30.spi_device_tpm_all.1653072716 |
|
|
Feb 18 02:14:44 PM PST 24 |
Feb 18 02:15:40 PM PST 24 |
590916723 ps |
| T862 |
/workspace/coverage/default/25.spi_device_flash_mode.3026026391 |
|
|
Feb 18 02:14:19 PM PST 24 |
Feb 18 02:15:21 PM PST 24 |
9867112867 ps |
| T863 |
/workspace/coverage/default/2.spi_device_cfg_cmd.889014435 |
|
|
Feb 18 02:12:23 PM PST 24 |
Feb 18 02:13:04 PM PST 24 |
1020634328 ps |
| T864 |
/workspace/coverage/default/14.spi_device_cfg_cmd.3424182308 |
|
|
Feb 18 02:13:24 PM PST 24 |
Feb 18 02:14:10 PM PST 24 |
1663277233 ps |
| T865 |
/workspace/coverage/default/8.spi_device_csb_read.323796393 |
|
|
Feb 18 02:12:48 PM PST 24 |
Feb 18 02:13:30 PM PST 24 |
78328937 ps |
| T866 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.3559144321 |
|
|
Feb 18 02:12:40 PM PST 24 |
Feb 18 02:13:29 PM PST 24 |
285672926 ps |
| T867 |
/workspace/coverage/default/43.spi_device_tpm_all.4082465380 |
|
|
Feb 18 02:15:41 PM PST 24 |
Feb 18 02:17:05 PM PST 24 |
5687631679 ps |
| T868 |
/workspace/coverage/default/26.spi_device_read_buffer_direct.729613708 |
|
|
Feb 18 02:14:37 PM PST 24 |
Feb 18 02:15:30 PM PST 24 |
1361804597 ps |
| T869 |
/workspace/coverage/default/8.spi_device_alert_test.113109905 |
|
|
Feb 18 02:12:57 PM PST 24 |
Feb 18 02:13:37 PM PST 24 |
32986236 ps |
| T870 |
/workspace/coverage/default/0.spi_device_tpm_rw.1736416358 |
|
|
Feb 18 02:12:16 PM PST 24 |
Feb 18 02:12:55 PM PST 24 |
2458152974 ps |
| T871 |
/workspace/coverage/default/18.spi_device_tpm_rw.1003654024 |
|
|
Feb 18 02:13:36 PM PST 24 |
Feb 18 02:14:21 PM PST 24 |
265749032 ps |
| T872 |
/workspace/coverage/default/23.spi_device_tpm_rw.1183184520 |
|
|
Feb 18 02:13:59 PM PST 24 |
Feb 18 02:14:51 PM PST 24 |
564804225 ps |
| T873 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.2894814005 |
|
|
Feb 18 02:14:29 PM PST 24 |
Feb 18 02:15:26 PM PST 24 |
3394160937 ps |
| T874 |
/workspace/coverage/default/18.spi_device_stress_all.1993462660 |
|
|
Feb 18 02:13:36 PM PST 24 |
Feb 18 02:18:20 PM PST 24 |
432255101886 ps |
| T875 |
/workspace/coverage/default/14.spi_device_alert_test.3487059691 |
|
|
Feb 18 02:14:24 PM PST 24 |
Feb 18 02:15:18 PM PST 24 |
15090670 ps |
| T876 |
/workspace/coverage/default/33.spi_device_flash_and_tpm.293260122 |
|
|
Feb 18 02:15:05 PM PST 24 |
Feb 18 02:19:36 PM PST 24 |
27484803152 ps |
| T877 |
/workspace/coverage/default/31.spi_device_flash_and_tpm.1401988188 |
|
|
Feb 18 02:14:59 PM PST 24 |
Feb 18 02:16:48 PM PST 24 |
19685033621 ps |
| T878 |
/workspace/coverage/default/36.spi_device_intercept.108881665 |
|
|
Feb 18 02:15:15 PM PST 24 |
Feb 18 02:15:56 PM PST 24 |
852498151 ps |
| T879 |
/workspace/coverage/default/39.spi_device_tpm_all.2544972411 |
|
|
Feb 18 02:15:23 PM PST 24 |
Feb 18 02:16:21 PM PST 24 |
5274516375 ps |
| T880 |
/workspace/coverage/default/17.spi_device_cfg_cmd.819327991 |
|
|
Feb 18 02:13:38 PM PST 24 |
Feb 18 02:14:23 PM PST 24 |
141894387 ps |
| T881 |
/workspace/coverage/default/39.spi_device_flash_all.1789354750 |
|
|
Feb 18 02:15:29 PM PST 24 |
Feb 18 02:16:45 PM PST 24 |
26617291423 ps |
| T882 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.2591722599 |
|
|
Feb 18 02:14:13 PM PST 24 |
Feb 18 02:15:25 PM PST 24 |
9362621784 ps |
| T883 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.276930592 |
|
|
Feb 18 02:12:23 PM PST 24 |
Feb 18 02:13:15 PM PST 24 |
3671176045 ps |
| T884 |
/workspace/coverage/default/34.spi_device_upload.4119592509 |
|
|
Feb 18 02:15:08 PM PST 24 |
Feb 18 02:16:16 PM PST 24 |
49677114741 ps |
| T885 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1978234851 |
|
|
Feb 18 02:12:22 PM PST 24 |
Feb 18 02:12:59 PM PST 24 |
4704597066 ps |
| T886 |
/workspace/coverage/default/30.spi_device_stress_all.3581340871 |
|
|
Feb 18 02:14:51 PM PST 24 |
Feb 18 02:15:40 PM PST 24 |
155789912 ps |
| T887 |
/workspace/coverage/default/46.spi_device_flash_mode.4225508443 |
|
|
Feb 18 02:15:59 PM PST 24 |
Feb 18 02:16:43 PM PST 24 |
2719474887 ps |
| T888 |
/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.2516461107 |
|
|
Feb 18 02:15:53 PM PST 24 |
Feb 18 02:21:29 PM PST 24 |
33995146138 ps |
| T889 |
/workspace/coverage/default/36.spi_device_tpm_all.3638701545 |
|
|
Feb 18 02:15:17 PM PST 24 |
Feb 18 02:16:45 PM PST 24 |
4504644591 ps |
| T890 |
/workspace/coverage/default/4.spi_device_flash_all.3985437225 |
|
|
Feb 18 02:12:37 PM PST 24 |
Feb 18 02:16:10 PM PST 24 |
85765075248 ps |
| T891 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.3443031570 |
|
|
Feb 18 02:16:05 PM PST 24 |
Feb 18 02:16:42 PM PST 24 |
305592957 ps |
| T892 |
/workspace/coverage/default/0.spi_device_tpm_all.710289707 |
|
|
Feb 18 02:12:05 PM PST 24 |
Feb 18 02:13:35 PM PST 24 |
17150033988 ps |
| T893 |
/workspace/coverage/default/37.spi_device_mailbox.1372465980 |
|
|
Feb 18 02:15:19 PM PST 24 |
Feb 18 02:16:02 PM PST 24 |
3335040326 ps |
| T894 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.2512581533 |
|
|
Feb 18 02:12:49 PM PST 24 |
Feb 18 02:13:38 PM PST 24 |
1395308222 ps |
| T895 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.2575347146 |
|
|
Feb 18 02:12:16 PM PST 24 |
Feb 18 02:12:50 PM PST 24 |
70017785 ps |
| T896 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.2876798813 |
|
|
Feb 18 02:16:01 PM PST 24 |
Feb 18 02:16:39 PM PST 24 |
283856539 ps |
| T897 |
/workspace/coverage/default/21.spi_device_tpm_rw.2753237238 |
|
|
Feb 18 02:13:52 PM PST 24 |
Feb 18 02:14:38 PM PST 24 |
249293678 ps |
| T898 |
/workspace/coverage/default/25.spi_device_tpm_all.244730933 |
|
|
Feb 18 02:14:25 PM PST 24 |
Feb 18 02:15:18 PM PST 24 |
2398334388 ps |
| T899 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.3562981560 |
|
|
Feb 18 02:12:43 PM PST 24 |
Feb 18 02:13:31 PM PST 24 |
529646075 ps |
| T900 |
/workspace/coverage/default/48.spi_device_mailbox.3066054721 |
|
|
Feb 18 02:16:19 PM PST 24 |
Feb 18 02:16:50 PM PST 24 |
37397797 ps |
| T901 |
/workspace/coverage/default/43.spi_device_pass_addr_payload_swap.2158175501 |
|
|
Feb 18 02:15:49 PM PST 24 |
Feb 18 02:16:50 PM PST 24 |
8257774037 ps |
| T902 |
/workspace/coverage/default/33.spi_device_cfg_cmd.1003268872 |
|
|
Feb 18 02:15:05 PM PST 24 |
Feb 18 02:15:49 PM PST 24 |
63187788 ps |
| T903 |
/workspace/coverage/default/2.spi_device_flash_all.3741687837 |
|
|
Feb 18 02:12:21 PM PST 24 |
Feb 18 02:15:15 PM PST 24 |
23588857526 ps |
| T904 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.2155889934 |
|
|
Feb 18 02:15:22 PM PST 24 |
Feb 18 02:16:02 PM PST 24 |
362318497 ps |
| T905 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.3676637367 |
|
|
Feb 18 02:15:32 PM PST 24 |
Feb 18 02:16:41 PM PST 24 |
12521473849 ps |
| T906 |
/workspace/coverage/default/26.spi_device_csb_read.689891976 |
|
|
Feb 18 02:14:18 PM PST 24 |
Feb 18 02:15:12 PM PST 24 |
17316726 ps |
| T907 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.450360771 |
|
|
Feb 18 02:16:06 PM PST 24 |
Feb 18 02:16:41 PM PST 24 |
228616387 ps |
| T908 |
/workspace/coverage/default/8.spi_device_flash_mode.1977073196 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:13:54 PM PST 24 |
4834806392 ps |
| T909 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.3703442959 |
|
|
Feb 18 02:13:11 PM PST 24 |
Feb 18 02:13:52 PM PST 24 |
814194451 ps |
| T910 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.1778913167 |
|
|
Feb 18 02:12:22 PM PST 24 |
Feb 18 02:13:05 PM PST 24 |
2179306236 ps |
| T911 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.2900920260 |
|
|
Feb 18 02:14:57 PM PST 24 |
Feb 18 02:15:49 PM PST 24 |
305304048 ps |
| T912 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.876013238 |
|
|
Feb 18 02:15:51 PM PST 24 |
Feb 18 02:16:29 PM PST 24 |
53291113 ps |
| T913 |
/workspace/coverage/default/41.spi_device_upload.2903827780 |
|
|
Feb 18 02:15:34 PM PST 24 |
Feb 18 02:16:14 PM PST 24 |
37683524 ps |
| T914 |
/workspace/coverage/default/26.spi_device_upload.3755808947 |
|
|
Feb 18 02:14:38 PM PST 24 |
Feb 18 02:15:37 PM PST 24 |
7480640447 ps |
| T915 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.2561312370 |
|
|
Feb 18 02:12:23 PM PST 24 |
Feb 18 02:13:08 PM PST 24 |
21959435235 ps |
| T916 |
/workspace/coverage/default/37.spi_device_flash_all.1429013789 |
|
|
Feb 18 02:15:17 PM PST 24 |
Feb 18 02:18:48 PM PST 24 |
37286858681 ps |
| T917 |
/workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.1572907905 |
|
|
Feb 18 02:13:59 PM PST 24 |
Feb 18 02:19:23 PM PST 24 |
348990576980 ps |
| T918 |
/workspace/coverage/default/47.spi_device_tpm_all.4174720494 |
|
|
Feb 18 02:15:58 PM PST 24 |
Feb 18 02:17:18 PM PST 24 |
14338395130 ps |
| T196 |
/workspace/coverage/default/41.spi_device_stress_all.2369489638 |
|
|
Feb 18 02:15:35 PM PST 24 |
Feb 18 02:27:57 PM PST 24 |
407842864193 ps |
| T919 |
/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.3700868894 |
|
|
Feb 18 02:14:12 PM PST 24 |
Feb 18 02:16:48 PM PST 24 |
31943109217 ps |
| T920 |
/workspace/coverage/default/15.spi_device_upload.1590723297 |
|
|
Feb 18 02:13:37 PM PST 24 |
Feb 18 02:14:30 PM PST 24 |
1141103404 ps |
| T921 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.2829366953 |
|
|
Feb 18 02:16:01 PM PST 24 |
Feb 18 02:16:36 PM PST 24 |
26067655 ps |
| T922 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3366152336 |
|
|
Feb 18 02:13:00 PM PST 24 |
Feb 18 02:13:49 PM PST 24 |
590691771 ps |
| T923 |
/workspace/coverage/default/12.spi_device_flash_and_tpm.2020525834 |
|
|
Feb 18 02:13:24 PM PST 24 |
Feb 18 02:17:28 PM PST 24 |
34508075694 ps |
| T924 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.3746623386 |
|
|
Feb 18 02:15:49 PM PST 24 |
Feb 18 02:16:28 PM PST 24 |
74253508 ps |
| T925 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.422104425 |
|
|
Feb 18 02:12:58 PM PST 24 |
Feb 18 02:13:47 PM PST 24 |
3041737481 ps |
| T926 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.1563751086 |
|
|
Feb 18 02:12:41 PM PST 24 |
Feb 18 02:13:31 PM PST 24 |
1352660310 ps |
| T927 |
/workspace/coverage/default/26.spi_device_cfg_cmd.3494056060 |
|
|
Feb 18 02:14:21 PM PST 24 |
Feb 18 02:15:08 PM PST 24 |
862854322 ps |
| T928 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.3042277463 |
|
|
Feb 18 02:12:16 PM PST 24 |
Feb 18 02:12:52 PM PST 24 |
61861092 ps |
| T929 |
/workspace/coverage/default/1.spi_device_mailbox.2837863723 |
|
|
Feb 18 02:12:25 PM PST 24 |
Feb 18 02:13:42 PM PST 24 |
63695733355 ps |
| T930 |
/workspace/coverage/default/8.spi_device_ram_cfg.3287568991 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:13:29 PM PST 24 |
17135339 ps |
| T931 |
/workspace/coverage/default/3.spi_device_tpm_rw.3525941798 |
|
|
Feb 18 02:12:25 PM PST 24 |
Feb 18 02:13:03 PM PST 24 |
21733619 ps |
| T932 |
/workspace/coverage/default/33.spi_device_tpm_sts_read.2321419056 |
|
|
Feb 18 02:14:59 PM PST 24 |
Feb 18 02:15:44 PM PST 24 |
193197216 ps |
| T933 |
/workspace/coverage/default/49.spi_device_upload.1521193559 |
|
|
Feb 18 02:16:17 PM PST 24 |
Feb 18 02:16:59 PM PST 24 |
2130441529 ps |
| T934 |
/workspace/coverage/default/47.spi_device_flash_all.3899193104 |
|
|
Feb 18 02:16:05 PM PST 24 |
Feb 18 02:17:40 PM PST 24 |
4131608078 ps |
| T935 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.3453207150 |
|
|
Feb 18 02:12:25 PM PST 24 |
Feb 18 02:13:12 PM PST 24 |
16352606358 ps |
| T936 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.1887069947 |
|
|
Feb 18 02:15:54 PM PST 24 |
Feb 18 02:16:38 PM PST 24 |
5413270217 ps |
| T937 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.1696739125 |
|
|
Feb 18 02:12:37 PM PST 24 |
Feb 18 02:13:29 PM PST 24 |
3047511191 ps |
| T938 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.3046840246 |
|
|
Feb 18 02:13:55 PM PST 24 |
Feb 18 02:14:49 PM PST 24 |
9119415947 ps |
| T939 |
/workspace/coverage/default/13.spi_device_tpm_all.3720248440 |
|
|
Feb 18 02:13:23 PM PST 24 |
Feb 18 02:14:44 PM PST 24 |
19122499796 ps |
| T940 |
/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.2661987597 |
|
|
Feb 18 02:16:00 PM PST 24 |
Feb 18 02:19:40 PM PST 24 |
110806641652 ps |
| T941 |
/workspace/coverage/default/46.spi_device_flash_all.2207052742 |
|
|
Feb 18 02:16:02 PM PST 24 |
Feb 18 02:17:20 PM PST 24 |
8445804031 ps |
| T942 |
/workspace/coverage/default/11.spi_device_alert_test.3203860103 |
|
|
Feb 18 02:13:10 PM PST 24 |
Feb 18 02:13:50 PM PST 24 |
22085796 ps |
| T943 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.4145285469 |
|
|
Feb 18 02:13:03 PM PST 24 |
Feb 18 02:15:34 PM PST 24 |
9653868403 ps |
| T944 |
/workspace/coverage/default/23.spi_device_tpm_sts_read.3869353123 |
|
|
Feb 18 02:14:08 PM PST 24 |
Feb 18 02:14:53 PM PST 24 |
64055466 ps |
| T945 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.3243193611 |
|
|
Feb 18 02:16:19 PM PST 24 |
Feb 18 02:16:48 PM PST 24 |
91013877 ps |
| T946 |
/workspace/coverage/default/38.spi_device_mailbox.1328259268 |
|
|
Feb 18 02:15:37 PM PST 24 |
Feb 18 02:16:19 PM PST 24 |
96024845 ps |
| T947 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.1755615377 |
|
|
Feb 18 02:15:31 PM PST 24 |
Feb 18 02:16:13 PM PST 24 |
1434174479 ps |
| T948 |
/workspace/coverage/default/23.spi_device_tpm_all.878889175 |
|
|
Feb 18 02:14:00 PM PST 24 |
Feb 18 02:15:27 PM PST 24 |
4891285477 ps |
| T949 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.709400489 |
|
|
Feb 18 02:13:24 PM PST 24 |
Feb 18 02:14:12 PM PST 24 |
171854449 ps |
| T950 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.3781887999 |
|
|
Feb 18 02:15:21 PM PST 24 |
Feb 18 02:16:01 PM PST 24 |
162313828 ps |
| T951 |
/workspace/coverage/default/27.spi_device_stress_all.352829137 |
|
|
Feb 18 02:14:37 PM PST 24 |
Feb 18 02:16:44 PM PST 24 |
9311813749 ps |
| T952 |
/workspace/coverage/default/37.spi_device_alert_test.1520194040 |
|
|
Feb 18 02:15:19 PM PST 24 |
Feb 18 02:15:57 PM PST 24 |
23549257 ps |
| T953 |
/workspace/coverage/default/5.spi_device_flash_all.2324779367 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:15:26 PM PST 24 |
18029692877 ps |
| T954 |
/workspace/coverage/default/36.spi_device_csb_read.2870385398 |
|
|
Feb 18 02:15:31 PM PST 24 |
Feb 18 02:16:07 PM PST 24 |
45500404 ps |
| T955 |
/workspace/coverage/default/44.spi_device_stress_all.648227027 |
|
|
Feb 18 02:15:52 PM PST 24 |
Feb 18 02:18:28 PM PST 24 |
54327478465 ps |
| T956 |
/workspace/coverage/default/17.spi_device_ram_cfg.4033547998 |
|
|
Feb 18 02:13:35 PM PST 24 |
Feb 18 02:14:17 PM PST 24 |
18645822 ps |
| T957 |
/workspace/coverage/default/5.spi_device_alert_test.1960054719 |
|
|
Feb 18 02:12:37 PM PST 24 |
Feb 18 02:13:19 PM PST 24 |
22974216 ps |
| T958 |
/workspace/coverage/default/36.spi_device_flash_and_tpm.4184864711 |
|
|
Feb 18 02:15:17 PM PST 24 |
Feb 18 02:24:30 PM PST 24 |
287788394594 ps |
| T959 |
/workspace/coverage/default/25.spi_device_flash_and_tpm.3117996057 |
|
|
Feb 18 02:14:16 PM PST 24 |
Feb 18 02:16:13 PM PST 24 |
5158859204 ps |
| T960 |
/workspace/coverage/default/34.spi_device_flash_all.2942724915 |
|
|
Feb 18 02:15:07 PM PST 24 |
Feb 18 02:17:58 PM PST 24 |
163418929359 ps |
| T961 |
/workspace/coverage/default/7.spi_device_stress_all.1422256763 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:15:43 PM PST 24 |
55691019323 ps |
| T962 |
/workspace/coverage/default/49.spi_device_tpm_rw.3368706448 |
|
|
Feb 18 02:16:15 PM PST 24 |
Feb 18 02:16:50 PM PST 24 |
394710202 ps |
| T963 |
/workspace/coverage/default/22.spi_device_read_buffer_direct.2172833530 |
|
|
Feb 18 02:13:54 PM PST 24 |
Feb 18 02:14:43 PM PST 24 |
2156146887 ps |
| T964 |
/workspace/coverage/default/0.spi_device_upload.2608299115 |
|
|
Feb 18 02:12:16 PM PST 24 |
Feb 18 02:13:00 PM PST 24 |
3739514329 ps |
| T965 |
/workspace/coverage/default/42.spi_device_upload.4268067154 |
|
|
Feb 18 02:15:40 PM PST 24 |
Feb 18 02:17:09 PM PST 24 |
13811959169 ps |
| T52 |
/workspace/coverage/default/1.spi_device_sec_cm.2536048112 |
|
|
Feb 18 02:12:28 PM PST 24 |
Feb 18 02:13:08 PM PST 24 |
110080298 ps |
| T966 |
/workspace/coverage/default/3.spi_device_tpm_all.2995821373 |
|
|
Feb 18 02:12:29 PM PST 24 |
Feb 18 02:13:22 PM PST 24 |
2073895308 ps |
| T967 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.2765141197 |
|
|
Feb 18 02:15:14 PM PST 24 |
Feb 18 02:15:53 PM PST 24 |
108761024 ps |
| T968 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.222160692 |
|
|
Feb 18 02:12:25 PM PST 24 |
Feb 18 02:13:08 PM PST 24 |
22490887662 ps |
| T969 |
/workspace/coverage/default/8.spi_device_mailbox.3183102184 |
|
|
Feb 18 02:12:53 PM PST 24 |
Feb 18 02:14:28 PM PST 24 |
21551286398 ps |
| T970 |
/workspace/coverage/default/49.spi_device_flash_mode.3403921452 |
|
|
Feb 18 02:16:19 PM PST 24 |
Feb 18 02:16:59 PM PST 24 |
3458940325 ps |
| T971 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.3183167069 |
|
|
Feb 18 02:15:17 PM PST 24 |
Feb 18 02:15:56 PM PST 24 |
25304820 ps |
| T972 |
/workspace/coverage/default/45.spi_device_upload.2760731486 |
|
|
Feb 18 02:15:57 PM PST 24 |
Feb 18 02:16:38 PM PST 24 |
549090582 ps |
| T973 |
/workspace/coverage/default/8.spi_device_cfg_cmd.3050220113 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:13:30 PM PST 24 |
59354199 ps |
| T974 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.801994144 |
|
|
Feb 18 02:15:02 PM PST 24 |
Feb 18 02:15:51 PM PST 24 |
1834178843 ps |
| T975 |
/workspace/coverage/default/46.spi_device_tpm_all.2444192158 |
|
|
Feb 18 02:16:01 PM PST 24 |
Feb 18 02:16:46 PM PST 24 |
578788882 ps |
| T976 |
/workspace/coverage/default/20.spi_device_flash_mode.2454048849 |
|
|
Feb 18 02:13:52 PM PST 24 |
Feb 18 02:15:29 PM PST 24 |
30653838335 ps |
| T977 |
/workspace/coverage/default/43.spi_device_stress_all.3247617906 |
|
|
Feb 18 02:15:53 PM PST 24 |
Feb 18 02:23:20 PM PST 24 |
188399660815 ps |
| T978 |
/workspace/coverage/default/8.spi_device_tpm_rw.3773504322 |
|
|
Feb 18 02:12:47 PM PST 24 |
Feb 18 02:13:30 PM PST 24 |
192736832 ps |
| T205 |
/workspace/coverage/default/49.spi_device_flash_all.2463562129 |
|
|
Feb 18 02:16:18 PM PST 24 |
Feb 18 02:17:42 PM PST 24 |
11149044803 ps |
| T979 |
/workspace/coverage/default/12.spi_device_mem_parity.1385040984 |
|
|
Feb 18 02:13:24 PM PST 24 |
Feb 18 02:14:05 PM PST 24 |
25697648 ps |
| T980 |
/workspace/coverage/default/37.spi_device_stress_all.3019410355 |
|
|
Feb 18 02:15:26 PM PST 24 |
Feb 18 02:16:03 PM PST 24 |
206866502 ps |
| T981 |
/workspace/coverage/default/41.spi_device_tpm_rw.2328548831 |
|
|
Feb 18 02:15:39 PM PST 24 |
Feb 18 02:16:20 PM PST 24 |
253205888 ps |
| T982 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.2099692174 |
|
|
Feb 18 02:13:57 PM PST 24 |
Feb 18 02:15:03 PM PST 24 |
8868596490 ps |
| T983 |
/workspace/coverage/default/11.spi_device_ram_cfg.3250155365 |
|
|
Feb 18 02:13:01 PM PST 24 |
Feb 18 02:13:40 PM PST 24 |
34055492 ps |
| T984 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.1989947757 |
|
|
Feb 18 02:16:03 PM PST 24 |
Feb 18 02:16:59 PM PST 24 |
13052612229 ps |
| T73 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3044854179 |
|
|
Feb 18 12:28:35 PM PST 24 |
Feb 18 12:28:55 PM PST 24 |
1229426742 ps |
| T985 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.2344003871 |
|
|
Feb 18 12:29:02 PM PST 24 |
Feb 18 12:29:08 PM PST 24 |
16615787 ps |
| T986 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1103232217 |
|
|
Feb 18 12:28:41 PM PST 24 |
Feb 18 12:28:45 PM PST 24 |
107344541 ps |
| T94 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3657814079 |
|
|
Feb 18 12:28:33 PM PST 24 |
Feb 18 12:28:54 PM PST 24 |
3471778465 ps |
| T74 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3833177192 |
|
|
Feb 18 12:29:12 PM PST 24 |
Feb 18 12:29:17 PM PST 24 |
116221528 ps |
| T987 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.576962113 |
|
|
Feb 18 12:29:01 PM PST 24 |
Feb 18 12:29:07 PM PST 24 |
11143041 ps |
| T95 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1336287086 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:28:45 PM PST 24 |
36571808 ps |
| T96 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.2548516407 |
|
|
Feb 18 12:28:57 PM PST 24 |
Feb 18 12:29:05 PM PST 24 |
203451677 ps |
| T75 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1665125052 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:28:47 PM PST 24 |
209511662 ps |
| T988 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3145788829 |
|
|
Feb 18 12:28:39 PM PST 24 |
Feb 18 12:28:43 PM PST 24 |
48926292 ps |
| T77 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.2879267430 |
|
|
Feb 18 12:28:54 PM PST 24 |
Feb 18 12:29:19 PM PST 24 |
889704857 ps |
| T989 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.425048655 |
|
|
Feb 18 12:28:42 PM PST 24 |
Feb 18 12:28:45 PM PST 24 |
28698577 ps |
| T990 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.1326814841 |
|
|
Feb 18 12:28:46 PM PST 24 |
Feb 18 12:28:51 PM PST 24 |
1134706775 ps |
| T76 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1829178152 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:55 PM PST 24 |
456043087 ps |
| T78 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1432845054 |
|
|
Feb 18 12:28:29 PM PST 24 |
Feb 18 12:28:54 PM PST 24 |
1037365048 ps |
| T121 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.2008701692 |
|
|
Feb 18 12:28:45 PM PST 24 |
Feb 18 12:28:50 PM PST 24 |
77961340 ps |
| T991 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.3490125046 |
|
|
Feb 18 12:28:53 PM PST 24 |
Feb 18 12:29:02 PM PST 24 |
108491887 ps |
| T82 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2952041868 |
|
|
Feb 18 12:29:10 PM PST 24 |
Feb 18 12:29:13 PM PST 24 |
26457171 ps |
| T992 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.1421609392 |
|
|
Feb 18 12:28:44 PM PST 24 |
Feb 18 12:28:50 PM PST 24 |
316311716 ps |
| T80 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3589829363 |
|
|
Feb 18 12:29:26 PM PST 24 |
Feb 18 12:29:30 PM PST 24 |
415700108 ps |
| T993 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1341343864 |
|
|
Feb 18 12:28:36 PM PST 24 |
Feb 18 12:28:39 PM PST 24 |
24185852 ps |
| T994 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.445559198 |
|
|
Feb 18 12:28:46 PM PST 24 |
Feb 18 12:28:53 PM PST 24 |
758351236 ps |
| T995 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1647783759 |
|
|
Feb 18 12:28:49 PM PST 24 |
Feb 18 12:28:52 PM PST 24 |
29273342 ps |
| T85 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2737942436 |
|
|
Feb 18 12:28:50 PM PST 24 |
Feb 18 12:28:54 PM PST 24 |
109955282 ps |
| T996 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1208245052 |
|
|
Feb 18 12:28:49 PM PST 24 |
Feb 18 12:28:55 PM PST 24 |
245108465 ps |
| T997 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3500912683 |
|
|
Feb 18 12:28:52 PM PST 24 |
Feb 18 12:28:56 PM PST 24 |
34172025 ps |
| T998 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.3713821350 |
|
|
Feb 18 12:29:12 PM PST 24 |
Feb 18 12:29:14 PM PST 24 |
13220460 ps |
| T97 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.2022823676 |
|
|
Feb 18 12:28:54 PM PST 24 |
Feb 18 12:29:00 PM PST 24 |
51734909 ps |
| T122 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.2184767540 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:29:02 PM PST 24 |
3340368910 ps |
| T81 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.910076414 |
|
|
Feb 18 12:28:29 PM PST 24 |
Feb 18 12:28:44 PM PST 24 |
539976299 ps |
| T90 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3457935840 |
|
|
Feb 18 12:28:41 PM PST 24 |
Feb 18 12:28:57 PM PST 24 |
1157565252 ps |
| T999 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.609319793 |
|
|
Feb 18 12:28:51 PM PST 24 |
Feb 18 12:28:53 PM PST 24 |
43370419 ps |
| T83 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2117686180 |
|
|
Feb 18 12:28:49 PM PST 24 |
Feb 18 12:28:54 PM PST 24 |
1368663072 ps |
| T1000 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.1807523894 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:48 PM PST 24 |
56661195 ps |
| T1001 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.1622946229 |
|
|
Feb 18 12:28:47 PM PST 24 |
Feb 18 12:28:50 PM PST 24 |
12330471 ps |
| T1002 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1591963516 |
|
|
Feb 18 12:29:11 PM PST 24 |
Feb 18 12:29:13 PM PST 24 |
48402831 ps |
| T84 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3794939110 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:53 PM PST 24 |
80350786 ps |
| T1003 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1683670066 |
|
|
Feb 18 12:28:41 PM PST 24 |
Feb 18 12:28:45 PM PST 24 |
12449050 ps |
| T89 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.4228558673 |
|
|
Feb 18 12:28:58 PM PST 24 |
Feb 18 12:29:07 PM PST 24 |
211501591 ps |
| T1004 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.468836760 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:47 PM PST 24 |
12726787 ps |
| T98 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.778989362 |
|
|
Feb 18 12:28:48 PM PST 24 |
Feb 18 12:28:52 PM PST 24 |
24726936 ps |
| T1005 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.1221333951 |
|
|
Feb 18 12:28:57 PM PST 24 |
Feb 18 12:29:05 PM PST 24 |
56503539 ps |
| T1006 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3463278461 |
|
|
Feb 18 12:29:10 PM PST 24 |
Feb 18 12:29:11 PM PST 24 |
56742376 ps |
| T63 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2838373668 |
|
|
Feb 18 12:28:38 PM PST 24 |
Feb 18 12:28:41 PM PST 24 |
27889754 ps |
| T64 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.835670732 |
|
|
Feb 18 12:28:28 PM PST 24 |
Feb 18 12:28:34 PM PST 24 |
94056095 ps |
| T1007 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.2116537652 |
|
|
Feb 18 12:28:45 PM PST 24 |
Feb 18 12:28:49 PM PST 24 |
57365059 ps |
| T99 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2965658431 |
|
|
Feb 18 12:28:52 PM PST 24 |
Feb 18 12:29:31 PM PST 24 |
5041655871 ps |
| T1008 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2093584064 |
|
|
Feb 18 12:28:47 PM PST 24 |
Feb 18 12:28:50 PM PST 24 |
13476579 ps |
| T123 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.330786810 |
|
|
Feb 18 12:28:55 PM PST 24 |
Feb 18 12:29:04 PM PST 24 |
400685758 ps |
| T100 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.3811257808 |
|
|
Feb 18 12:28:44 PM PST 24 |
Feb 18 12:28:49 PM PST 24 |
87142494 ps |
| T1009 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.297408764 |
|
|
Feb 18 12:28:53 PM PST 24 |
Feb 18 12:28:57 PM PST 24 |
71393631 ps |
| T124 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.4089742196 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:28:51 PM PST 24 |
142473107 ps |
| T1010 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1328193694 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:28:44 PM PST 24 |
10267364 ps |
| T211 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.4238745347 |
|
|
Feb 18 12:28:37 PM PST 24 |
Feb 18 12:28:46 PM PST 24 |
672377553 ps |
| T214 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1766527501 |
|
|
Feb 18 12:28:47 PM PST 24 |
Feb 18 12:29:02 PM PST 24 |
206709319 ps |
| T1011 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.9777618 |
|
|
Feb 18 12:28:47 PM PST 24 |
Feb 18 12:29:02 PM PST 24 |
195202209 ps |
| T65 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3183171576 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:47 PM PST 24 |
19119694 ps |
| T215 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.2752548885 |
|
|
Feb 18 12:28:40 PM PST 24 |
Feb 18 12:28:52 PM PST 24 |
1151462543 ps |
| T104 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.4083794794 |
|
|
Feb 18 12:28:24 PM PST 24 |
Feb 18 12:28:32 PM PST 24 |
58081070 ps |
| T87 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2999256760 |
|
|
Feb 18 12:29:12 PM PST 24 |
Feb 18 12:29:20 PM PST 24 |
385288745 ps |
| T88 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2753702574 |
|
|
Feb 18 12:28:43 PM PST 24 |
Feb 18 12:28:49 PM PST 24 |
36793255 ps |
| T101 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.679607870 |
|
|
Feb 18 12:28:42 PM PST 24 |
Feb 18 12:29:00 PM PST 24 |
7957769676 ps |
| T1012 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.1289769881 |
|
|
Feb 18 12:28:56 PM PST 24 |
Feb 18 12:29:02 PM PST 24 |
37020168 ps |
| T1013 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.3813115856 |
|
|
Feb 18 12:28:50 PM PST 24 |
Feb 18 12:28:53 PM PST 24 |
45042202 ps |
| T86 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.4115940293 |
|
|
Feb 18 12:29:04 PM PST 24 |
Feb 18 12:29:11 PM PST 24 |
88937101 ps |
| T125 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.4279325866 |
|
|
Feb 18 12:28:48 PM PST 24 |
Feb 18 12:28:52 PM PST 24 |
84590969 ps |
| T91 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.4036121687 |
|
|
Feb 18 12:28:50 PM PST 24 |
Feb 18 12:28:56 PM PST 24 |
645165752 ps |
| T1014 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1891523562 |
|
|
Feb 18 12:28:53 PM PST 24 |
Feb 18 12:29:00 PM PST 24 |
19468843 ps |