| T811 |
/workspace/coverage/default/27.spi_device_read_buffer_direct.1815869279 |
|
|
Feb 25 02:44:16 PM PST 24 |
Feb 25 02:44:22 PM PST 24 |
5919605493 ps |
| T812 |
/workspace/coverage/default/28.spi_device_mailbox.729560436 |
|
|
Feb 25 02:44:24 PM PST 24 |
Feb 25 02:44:35 PM PST 24 |
5680996772 ps |
| T813 |
/workspace/coverage/default/47.spi_device_stress_all.46962251 |
|
|
Feb 25 02:45:25 PM PST 24 |
Feb 25 02:49:59 PM PST 24 |
81036826438 ps |
| T814 |
/workspace/coverage/default/20.spi_device_upload.216216084 |
|
|
Feb 25 02:44:05 PM PST 24 |
Feb 25 02:44:36 PM PST 24 |
49181843709 ps |
| T815 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.3209924260 |
|
|
Feb 25 02:44:02 PM PST 24 |
Feb 25 02:44:17 PM PST 24 |
53484408408 ps |
| T816 |
/workspace/coverage/default/25.spi_device_flash_and_tpm.3244169442 |
|
|
Feb 25 02:44:11 PM PST 24 |
Feb 25 02:45:55 PM PST 24 |
16022337997 ps |
| T817 |
/workspace/coverage/default/16.spi_device_upload.826227450 |
|
|
Feb 25 02:43:44 PM PST 24 |
Feb 25 02:43:52 PM PST 24 |
2522026818 ps |
| T818 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.2238881125 |
|
|
Feb 25 02:45:09 PM PST 24 |
Feb 25 02:45:13 PM PST 24 |
1013278036 ps |
| T819 |
/workspace/coverage/default/1.spi_device_csb_read.1501786841 |
|
|
Feb 25 02:42:52 PM PST 24 |
Feb 25 02:42:53 PM PST 24 |
21643321 ps |
| T820 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.3846897513 |
|
|
Feb 25 02:44:26 PM PST 24 |
Feb 25 02:44:33 PM PST 24 |
2092271233 ps |
| T821 |
/workspace/coverage/default/16.spi_device_tpm_sts_read.184787421 |
|
|
Feb 25 02:43:41 PM PST 24 |
Feb 25 02:43:43 PM PST 24 |
99520182 ps |
| T822 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.187772467 |
|
|
Feb 25 02:44:04 PM PST 24 |
Feb 25 02:44:08 PM PST 24 |
123257008 ps |
| T823 |
/workspace/coverage/default/0.spi_device_cfg_cmd.2341814952 |
|
|
Feb 25 02:42:45 PM PST 24 |
Feb 25 02:42:49 PM PST 24 |
4354468982 ps |
| T140 |
/workspace/coverage/default/34.spi_device_stress_all.2137105765 |
|
|
Feb 25 02:44:41 PM PST 24 |
Feb 25 02:57:25 PM PST 24 |
485853647629 ps |
| T824 |
/workspace/coverage/default/19.spi_device_alert_test.1049049635 |
|
|
Feb 25 02:43:58 PM PST 24 |
Feb 25 02:43:59 PM PST 24 |
16443052 ps |
| T240 |
/workspace/coverage/default/15.spi_device_flash_all.917956360 |
|
|
Feb 25 02:43:41 PM PST 24 |
Feb 25 02:44:24 PM PST 24 |
29115787531 ps |
| T825 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.2528175145 |
|
|
Feb 25 02:43:42 PM PST 24 |
Feb 25 02:43:51 PM PST 24 |
2125917222 ps |
| T141 |
/workspace/coverage/default/8.spi_device_stress_all.852052376 |
|
|
Feb 25 02:43:21 PM PST 24 |
Feb 25 02:43:22 PM PST 24 |
245681627 ps |
| T826 |
/workspace/coverage/default/35.spi_device_intercept.475809608 |
|
|
Feb 25 02:44:37 PM PST 24 |
Feb 25 02:44:42 PM PST 24 |
241165570 ps |
| T827 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.2368302334 |
|
|
Feb 25 02:44:05 PM PST 24 |
Feb 25 02:44:09 PM PST 24 |
373447427 ps |
| T828 |
/workspace/coverage/default/12.spi_device_upload.4000438590 |
|
|
Feb 25 02:43:23 PM PST 24 |
Feb 25 02:43:40 PM PST 24 |
48330277474 ps |
| T829 |
/workspace/coverage/default/40.spi_device_flash_mode.1932890586 |
|
|
Feb 25 02:45:09 PM PST 24 |
Feb 25 02:45:22 PM PST 24 |
8270541555 ps |
| T830 |
/workspace/coverage/default/48.spi_device_alert_test.2557203171 |
|
|
Feb 25 02:45:24 PM PST 24 |
Feb 25 02:45:25 PM PST 24 |
34148380 ps |
| T831 |
/workspace/coverage/default/18.spi_device_flash_and_tpm.2472080101 |
|
|
Feb 25 02:43:53 PM PST 24 |
Feb 25 02:47:57 PM PST 24 |
74179655382 ps |
| T832 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.3456005367 |
|
|
Feb 25 02:44:37 PM PST 24 |
Feb 25 02:44:38 PM PST 24 |
17658077 ps |
| T833 |
/workspace/coverage/default/27.spi_device_tpm_sts_read.441775383 |
|
|
Feb 25 02:44:19 PM PST 24 |
Feb 25 02:44:20 PM PST 24 |
40129358 ps |
| T834 |
/workspace/coverage/default/16.spi_device_cfg_cmd.3728509337 |
|
|
Feb 25 02:43:41 PM PST 24 |
Feb 25 02:43:45 PM PST 24 |
615665867 ps |
| T835 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.2654626770 |
|
|
Feb 25 02:44:29 PM PST 24 |
Feb 25 02:44:35 PM PST 24 |
547667728 ps |
| T836 |
/workspace/coverage/default/4.spi_device_flash_mode.4143930135 |
|
|
Feb 25 02:43:01 PM PST 24 |
Feb 25 02:43:53 PM PST 24 |
20879114955 ps |
| T837 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.431480406 |
|
|
Feb 25 02:43:23 PM PST 24 |
Feb 25 02:43:53 PM PST 24 |
46690656583 ps |
| T838 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3083425656 |
|
|
Feb 25 02:44:07 PM PST 24 |
Feb 25 02:44:21 PM PST 24 |
6506793651 ps |
| T839 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.3993514878 |
|
|
Feb 25 02:43:10 PM PST 24 |
Feb 25 02:43:15 PM PST 24 |
1761822342 ps |
| T840 |
/workspace/coverage/default/45.spi_device_stress_all.830357333 |
|
|
Feb 25 02:45:15 PM PST 24 |
Feb 25 02:50:13 PM PST 24 |
43647916563 ps |
| T841 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.4117820117 |
|
|
Feb 25 02:43:00 PM PST 24 |
Feb 25 02:43:07 PM PST 24 |
1107305917 ps |
| T842 |
/workspace/coverage/default/4.spi_device_stress_all.3467319036 |
|
|
Feb 25 02:43:02 PM PST 24 |
Feb 25 02:43:03 PM PST 24 |
52666138 ps |
| T843 |
/workspace/coverage/default/9.spi_device_mailbox.2022851840 |
|
|
Feb 25 02:43:22 PM PST 24 |
Feb 25 02:43:58 PM PST 24 |
41786517587 ps |
| T844 |
/workspace/coverage/default/34.spi_device_flash_and_tpm_min_idle.1531854093 |
|
|
Feb 25 02:44:39 PM PST 24 |
Feb 25 02:45:05 PM PST 24 |
4745323483 ps |
| T845 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.4248638901 |
|
|
Feb 25 02:44:28 PM PST 24 |
Feb 25 02:44:44 PM PST 24 |
2580111567 ps |
| T243 |
/workspace/coverage/default/13.spi_device_flash_all.3208885878 |
|
|
Feb 25 02:43:28 PM PST 24 |
Feb 25 02:45:49 PM PST 24 |
133182102936 ps |
| T846 |
/workspace/coverage/default/32.spi_device_mailbox.2031897281 |
|
|
Feb 25 02:44:32 PM PST 24 |
Feb 25 02:44:43 PM PST 24 |
8533403427 ps |
| T847 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.4113829332 |
|
|
Feb 25 02:43:55 PM PST 24 |
Feb 25 02:43:59 PM PST 24 |
574011195 ps |
| T848 |
/workspace/coverage/default/14.spi_device_csb_read.2235654969 |
|
|
Feb 25 02:43:33 PM PST 24 |
Feb 25 02:43:34 PM PST 24 |
52671820 ps |
| T849 |
/workspace/coverage/default/35.spi_device_flash_mode.313463985 |
|
|
Feb 25 02:44:41 PM PST 24 |
Feb 25 02:44:58 PM PST 24 |
924458031 ps |
| T222 |
/workspace/coverage/default/28.spi_device_stress_all.1995037799 |
|
|
Feb 25 02:44:16 PM PST 24 |
Feb 25 02:55:05 PM PST 24 |
328664683850 ps |
| T850 |
/workspace/coverage/default/30.spi_device_csb_read.2968928782 |
|
|
Feb 25 02:44:18 PM PST 24 |
Feb 25 02:44:19 PM PST 24 |
29728055 ps |
| T851 |
/workspace/coverage/default/36.spi_device_stress_all.708804228 |
|
|
Feb 25 02:44:45 PM PST 24 |
Feb 25 02:45:23 PM PST 24 |
7797688167 ps |
| T852 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.624281150 |
|
|
Feb 25 02:44:50 PM PST 24 |
Feb 25 02:44:51 PM PST 24 |
31700301 ps |
| T214 |
/workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.800380483 |
|
|
Feb 25 02:44:02 PM PST 24 |
Feb 25 02:45:41 PM PST 24 |
32375895879 ps |
| T853 |
/workspace/coverage/default/27.spi_device_tpm_all.3630439124 |
|
|
Feb 25 02:44:20 PM PST 24 |
Feb 25 02:45:08 PM PST 24 |
12975310485 ps |
| T854 |
/workspace/coverage/default/44.spi_device_cfg_cmd.2651910578 |
|
|
Feb 25 02:45:20 PM PST 24 |
Feb 25 02:45:25 PM PST 24 |
683239139 ps |
| T855 |
/workspace/coverage/default/30.spi_device_flash_mode.4181845845 |
|
|
Feb 25 02:44:37 PM PST 24 |
Feb 25 02:44:51 PM PST 24 |
1118662811 ps |
| T856 |
/workspace/coverage/default/44.spi_device_intercept.3217011932 |
|
|
Feb 25 02:45:18 PM PST 24 |
Feb 25 02:45:22 PM PST 24 |
102265032 ps |
| T857 |
/workspace/coverage/default/2.spi_device_csb_read.3302178742 |
|
|
Feb 25 02:43:00 PM PST 24 |
Feb 25 02:43:02 PM PST 24 |
21365110 ps |
| T858 |
/workspace/coverage/default/7.spi_device_csb_read.3131711349 |
|
|
Feb 25 02:43:11 PM PST 24 |
Feb 25 02:43:12 PM PST 24 |
47879532 ps |
| T859 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.1221565910 |
|
|
Feb 25 02:45:02 PM PST 24 |
Feb 25 02:45:46 PM PST 24 |
265042177292 ps |
| T860 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.2273974334 |
|
|
Feb 25 02:43:46 PM PST 24 |
Feb 25 02:43:51 PM PST 24 |
2092501445 ps |
| T861 |
/workspace/coverage/default/29.spi_device_tpm_all.3392105670 |
|
|
Feb 25 02:44:26 PM PST 24 |
Feb 25 02:44:30 PM PST 24 |
1871017052 ps |
| T79 |
/workspace/coverage/default/13.spi_device_flash_and_tpm.1045583051 |
|
|
Feb 25 02:43:35 PM PST 24 |
Feb 25 02:44:15 PM PST 24 |
2581969155 ps |
| T862 |
/workspace/coverage/default/4.spi_device_flash_all.3068665094 |
|
|
Feb 25 02:43:00 PM PST 24 |
Feb 25 02:50:58 PM PST 24 |
96363130184 ps |
| T863 |
/workspace/coverage/default/30.spi_device_alert_test.822670038 |
|
|
Feb 25 02:44:36 PM PST 24 |
Feb 25 02:44:37 PM PST 24 |
38655402 ps |
| T864 |
/workspace/coverage/default/16.spi_device_ram_cfg.1122321233 |
|
|
Feb 25 02:43:39 PM PST 24 |
Feb 25 02:43:40 PM PST 24 |
15073838 ps |
| T865 |
/workspace/coverage/default/5.spi_device_tpm_all.3363084370 |
|
|
Feb 25 02:43:09 PM PST 24 |
Feb 25 02:43:39 PM PST 24 |
2035152938 ps |
| T866 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.774803798 |
|
|
Feb 25 02:43:33 PM PST 24 |
Feb 25 02:43:38 PM PST 24 |
3588988246 ps |
| T867 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.2983997666 |
|
|
Feb 25 02:44:10 PM PST 24 |
Feb 25 02:44:30 PM PST 24 |
5018186183 ps |
| T868 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.9382045 |
|
|
Feb 25 02:43:48 PM PST 24 |
Feb 25 02:43:49 PM PST 24 |
139772347 ps |
| T869 |
/workspace/coverage/default/22.spi_device_alert_test.739044970 |
|
|
Feb 25 02:43:59 PM PST 24 |
Feb 25 02:44:00 PM PST 24 |
22132490 ps |
| T870 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.430410815 |
|
|
Feb 25 02:43:17 PM PST 24 |
Feb 25 02:43:22 PM PST 24 |
2671147498 ps |
| T871 |
/workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.2303796528 |
|
|
Feb 25 02:43:23 PM PST 24 |
Feb 25 02:44:11 PM PST 24 |
95930010191 ps |
| T872 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.1798508192 |
|
|
Feb 25 02:44:21 PM PST 24 |
Feb 25 02:44:22 PM PST 24 |
286603781 ps |
| T873 |
/workspace/coverage/default/47.spi_device_alert_test.4166253184 |
|
|
Feb 25 02:45:29 PM PST 24 |
Feb 25 02:45:30 PM PST 24 |
13892662 ps |
| T874 |
/workspace/coverage/default/37.spi_device_cfg_cmd.266342410 |
|
|
Feb 25 02:44:55 PM PST 24 |
Feb 25 02:44:57 PM PST 24 |
49429909 ps |
| T142 |
/workspace/coverage/default/0.spi_device_stress_all.345725372 |
|
|
Feb 25 02:42:58 PM PST 24 |
Feb 25 02:42:59 PM PST 24 |
58494096 ps |
| T875 |
/workspace/coverage/default/15.spi_device_upload.4046787395 |
|
|
Feb 25 02:43:41 PM PST 24 |
Feb 25 02:43:44 PM PST 24 |
38454299 ps |
| T876 |
/workspace/coverage/default/18.spi_device_mem_parity.1835043403 |
|
|
Feb 25 02:43:54 PM PST 24 |
Feb 25 02:43:56 PM PST 24 |
30717245 ps |
| T877 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.2465423943 |
|
|
Feb 25 02:43:44 PM PST 24 |
Feb 25 02:43:48 PM PST 24 |
1389591278 ps |
| T878 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.4268579924 |
|
|
Feb 25 02:43:29 PM PST 24 |
Feb 25 02:43:33 PM PST 24 |
665116801 ps |
| T879 |
/workspace/coverage/default/29.spi_device_upload.508103364 |
|
|
Feb 25 02:44:18 PM PST 24 |
Feb 25 02:44:31 PM PST 24 |
12812723478 ps |
| T880 |
/workspace/coverage/default/41.spi_device_upload.268267632 |
|
|
Feb 25 02:45:02 PM PST 24 |
Feb 25 02:45:23 PM PST 24 |
9481622567 ps |
| T881 |
/workspace/coverage/default/18.spi_device_tpm_rw.1626438317 |
|
|
Feb 25 02:43:49 PM PST 24 |
Feb 25 02:43:52 PM PST 24 |
68963871 ps |
| T882 |
/workspace/coverage/default/27.spi_device_flash_mode.3582811135 |
|
|
Feb 25 02:44:31 PM PST 24 |
Feb 25 02:45:01 PM PST 24 |
17254607683 ps |
| T883 |
/workspace/coverage/default/5.spi_device_flash_and_tpm.472397872 |
|
|
Feb 25 02:43:11 PM PST 24 |
Feb 25 02:43:49 PM PST 24 |
1638983824 ps |
| T884 |
/workspace/coverage/default/16.spi_device_flash_mode.710761103 |
|
|
Feb 25 02:43:37 PM PST 24 |
Feb 25 02:43:44 PM PST 24 |
1086248094 ps |
| T885 |
/workspace/coverage/default/11.spi_device_flash_mode.3505431008 |
|
|
Feb 25 02:43:25 PM PST 24 |
Feb 25 02:43:58 PM PST 24 |
12175557789 ps |
| T886 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.3171946871 |
|
|
Feb 25 02:43:46 PM PST 24 |
Feb 25 02:43:56 PM PST 24 |
7863639121 ps |
| T887 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.927841475 |
|
|
Feb 25 02:43:29 PM PST 24 |
Feb 25 02:43:34 PM PST 24 |
1244701752 ps |
| T888 |
/workspace/coverage/default/27.spi_device_mailbox.1525127418 |
|
|
Feb 25 02:44:14 PM PST 24 |
Feb 25 02:44:21 PM PST 24 |
1538438194 ps |
| T889 |
/workspace/coverage/default/24.spi_device_tpm_rw.4261283610 |
|
|
Feb 25 02:44:16 PM PST 24 |
Feb 25 02:44:17 PM PST 24 |
51771778 ps |
| T143 |
/workspace/coverage/default/11.spi_device_stress_all.1291703796 |
|
|
Feb 25 02:43:35 PM PST 24 |
Feb 25 02:46:08 PM PST 24 |
10179306153 ps |
| T890 |
/workspace/coverage/default/3.spi_device_csb_read.1187308954 |
|
|
Feb 25 02:43:10 PM PST 24 |
Feb 25 02:43:11 PM PST 24 |
57108473 ps |
| T891 |
/workspace/coverage/default/26.spi_device_flash_mode.1136985206 |
|
|
Feb 25 02:44:05 PM PST 24 |
Feb 25 02:44:26 PM PST 24 |
3172123925 ps |
| T892 |
/workspace/coverage/default/43.spi_device_pass_addr_payload_swap.3751083091 |
|
|
Feb 25 02:45:06 PM PST 24 |
Feb 25 02:45:24 PM PST 24 |
6587886909 ps |
| T893 |
/workspace/coverage/default/31.spi_device_upload.3387415920 |
|
|
Feb 25 02:44:34 PM PST 24 |
Feb 25 02:44:51 PM PST 24 |
6006495564 ps |
| T894 |
/workspace/coverage/default/40.spi_device_tpm_all.2219555007 |
|
|
Feb 25 02:44:59 PM PST 24 |
Feb 25 02:45:12 PM PST 24 |
5596039155 ps |
| T895 |
/workspace/coverage/default/39.spi_device_flash_mode.446616857 |
|
|
Feb 25 02:44:54 PM PST 24 |
Feb 25 02:45:17 PM PST 24 |
4461453781 ps |
| T896 |
/workspace/coverage/default/39.spi_device_stress_all.2650167710 |
|
|
Feb 25 02:44:56 PM PST 24 |
Feb 25 02:44:57 PM PST 24 |
896970900 ps |
| T897 |
/workspace/coverage/default/0.spi_device_tpm_all.2225199675 |
|
|
Feb 25 02:42:51 PM PST 24 |
Feb 25 02:43:13 PM PST 24 |
3023620958 ps |
| T233 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.2423287655 |
|
|
Feb 25 02:44:00 PM PST 24 |
Feb 25 02:44:06 PM PST 24 |
1757165989 ps |
| T898 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.4198331514 |
|
|
Feb 25 02:45:28 PM PST 24 |
Feb 25 02:55:50 PM PST 24 |
482873329607 ps |
| T899 |
/workspace/coverage/default/5.spi_device_csb_read.2382222682 |
|
|
Feb 25 02:43:14 PM PST 24 |
Feb 25 02:43:15 PM PST 24 |
14550756 ps |
| T900 |
/workspace/coverage/default/3.spi_device_cfg_cmd.3602182035 |
|
|
Feb 25 02:43:12 PM PST 24 |
Feb 25 02:43:15 PM PST 24 |
92205883 ps |
| T901 |
/workspace/coverage/default/2.spi_device_alert_test.1783049518 |
|
|
Feb 25 02:42:59 PM PST 24 |
Feb 25 02:43:00 PM PST 24 |
13667459 ps |
| T44 |
/workspace/coverage/default/4.spi_device_sec_cm.690087606 |
|
|
Feb 25 02:43:06 PM PST 24 |
Feb 25 02:43:08 PM PST 24 |
377627928 ps |
| T902 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.48995359 |
|
|
Feb 25 02:43:01 PM PST 24 |
Feb 25 02:43:13 PM PST 24 |
1804134683 ps |
| T903 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.391806393 |
|
|
Feb 25 02:43:53 PM PST 24 |
Feb 25 02:44:02 PM PST 24 |
18990911287 ps |
| T904 |
/workspace/coverage/default/9.spi_device_upload.427200765 |
|
|
Feb 25 02:43:21 PM PST 24 |
Feb 25 02:43:23 PM PST 24 |
156823018 ps |
| T905 |
/workspace/coverage/default/13.spi_device_alert_test.3630743239 |
|
|
Feb 25 02:43:31 PM PST 24 |
Feb 25 02:43:32 PM PST 24 |
27745467 ps |
| T906 |
/workspace/coverage/default/26.spi_device_pass_cmd_filtering.1541419448 |
|
|
Feb 25 02:44:10 PM PST 24 |
Feb 25 02:44:46 PM PST 24 |
46527494690 ps |
| T907 |
/workspace/coverage/default/42.spi_device_upload.90234514 |
|
|
Feb 25 02:45:03 PM PST 24 |
Feb 25 02:45:11 PM PST 24 |
1832678880 ps |
| T908 |
/workspace/coverage/default/29.spi_device_flash_and_tpm.4016724884 |
|
|
Feb 25 02:44:24 PM PST 24 |
Feb 25 02:45:21 PM PST 24 |
13161329170 ps |
| T909 |
/workspace/coverage/default/29.spi_device_read_buffer_direct.1197963807 |
|
|
Feb 25 02:44:18 PM PST 24 |
Feb 25 02:44:23 PM PST 24 |
2620617325 ps |
| T910 |
/workspace/coverage/default/30.spi_device_tpm_rw.1928144353 |
|
|
Feb 25 02:44:36 PM PST 24 |
Feb 25 02:44:37 PM PST 24 |
329943215 ps |
| T911 |
/workspace/coverage/default/5.spi_device_stress_all.1421242982 |
|
|
Feb 25 02:43:08 PM PST 24 |
Feb 25 02:46:00 PM PST 24 |
32258843923 ps |
| T912 |
/workspace/coverage/default/23.spi_device_cfg_cmd.1728182164 |
|
|
Feb 25 02:44:08 PM PST 24 |
Feb 25 02:44:16 PM PST 24 |
19124391763 ps |
| T913 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.2642691302 |
|
|
Feb 25 02:44:11 PM PST 24 |
Feb 25 02:44:16 PM PST 24 |
668107408 ps |
| T914 |
/workspace/coverage/default/27.spi_device_alert_test.2216680460 |
|
|
Feb 25 02:44:18 PM PST 24 |
Feb 25 02:44:19 PM PST 24 |
13499299 ps |
| T915 |
/workspace/coverage/default/18.spi_device_flash_mode.2696828552 |
|
|
Feb 25 02:43:54 PM PST 24 |
Feb 25 02:44:05 PM PST 24 |
1897604446 ps |
| T916 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.1224466098 |
|
|
Feb 25 02:43:28 PM PST 24 |
Feb 25 02:43:29 PM PST 24 |
148289510 ps |
| T917 |
/workspace/coverage/default/10.spi_device_upload.2296822785 |
|
|
Feb 25 02:43:32 PM PST 24 |
Feb 25 02:43:35 PM PST 24 |
386787010 ps |
| T918 |
/workspace/coverage/default/17.spi_device_flash_all.952964157 |
|
|
Feb 25 02:43:52 PM PST 24 |
Feb 25 02:44:58 PM PST 24 |
25097984073 ps |
| T919 |
/workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.719649883 |
|
|
Feb 25 02:45:01 PM PST 24 |
Feb 25 02:46:21 PM PST 24 |
23352965534 ps |
| T920 |
/workspace/coverage/default/42.spi_device_mailbox.2488418017 |
|
|
Feb 25 02:45:02 PM PST 24 |
Feb 25 02:45:56 PM PST 24 |
78083436454 ps |
| T921 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.3624723997 |
|
|
Feb 25 02:44:06 PM PST 24 |
Feb 25 02:44:10 PM PST 24 |
868739986 ps |
| T922 |
/workspace/coverage/default/9.spi_device_tpm_rw.1147143474 |
|
|
Feb 25 02:43:19 PM PST 24 |
Feb 25 02:43:21 PM PST 24 |
199489858 ps |
| T923 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.412803625 |
|
|
Feb 25 02:45:29 PM PST 24 |
Feb 25 02:45:39 PM PST 24 |
4995586383 ps |
| T924 |
/workspace/coverage/default/42.spi_device_alert_test.1381311290 |
|
|
Feb 25 02:45:06 PM PST 24 |
Feb 25 02:45:06 PM PST 24 |
64545187 ps |
| T925 |
/workspace/coverage/default/32.spi_device_csb_read.3874984711 |
|
|
Feb 25 02:44:36 PM PST 24 |
Feb 25 02:44:37 PM PST 24 |
44710996 ps |
| T926 |
/workspace/coverage/default/3.spi_device_pass_cmd_filtering.1507004542 |
|
|
Feb 25 02:43:06 PM PST 24 |
Feb 25 02:43:17 PM PST 24 |
621156051 ps |
| T927 |
/workspace/coverage/default/17.spi_device_csb_read.354039961 |
|
|
Feb 25 02:43:39 PM PST 24 |
Feb 25 02:43:40 PM PST 24 |
57194154 ps |
| T928 |
/workspace/coverage/default/48.spi_device_tpm_all.3526272442 |
|
|
Feb 25 02:45:23 PM PST 24 |
Feb 25 02:46:15 PM PST 24 |
10287208081 ps |
| T45 |
/workspace/coverage/default/2.spi_device_sec_cm.1034682079 |
|
|
Feb 25 02:43:07 PM PST 24 |
Feb 25 02:43:08 PM PST 24 |
123212000 ps |
| T929 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.2344834171 |
|
|
Feb 25 02:44:29 PM PST 24 |
Feb 25 02:44:43 PM PST 24 |
7041287276 ps |
| T930 |
/workspace/coverage/default/38.spi_device_alert_test.2284666035 |
|
|
Feb 25 02:44:52 PM PST 24 |
Feb 25 02:44:53 PM PST 24 |
12568139 ps |
| T931 |
/workspace/coverage/default/49.spi_device_flash_all.313716349 |
|
|
Feb 25 02:45:33 PM PST 24 |
Feb 25 02:46:03 PM PST 24 |
42567626641 ps |
| T932 |
/workspace/coverage/default/19.spi_device_flash_mode.178757705 |
|
|
Feb 25 02:43:45 PM PST 24 |
Feb 25 02:43:57 PM PST 24 |
4920777227 ps |
| T933 |
/workspace/coverage/default/45.spi_device_alert_test.4066236450 |
|
|
Feb 25 02:45:19 PM PST 24 |
Feb 25 02:45:20 PM PST 24 |
60216510 ps |
| T934 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.505910556 |
|
|
Feb 25 02:43:12 PM PST 24 |
Feb 25 02:44:07 PM PST 24 |
23567132392 ps |
| T935 |
/workspace/coverage/default/12.spi_device_flash_all.3316829731 |
|
|
Feb 25 02:43:29 PM PST 24 |
Feb 25 02:47:27 PM PST 24 |
127240053137 ps |
| T936 |
/workspace/coverage/default/18.spi_device_tpm_sts_read.4167413135 |
|
|
Feb 25 02:43:44 PM PST 24 |
Feb 25 02:43:45 PM PST 24 |
27848528 ps |
| T937 |
/workspace/coverage/default/1.spi_device_upload.898594267 |
|
|
Feb 25 02:42:47 PM PST 24 |
Feb 25 02:43:13 PM PST 24 |
21670071915 ps |
| T938 |
/workspace/coverage/default/38.spi_device_flash_mode.1885285063 |
|
|
Feb 25 02:44:52 PM PST 24 |
Feb 25 02:46:05 PM PST 24 |
15469142802 ps |
| T939 |
/workspace/coverage/default/38.spi_device_csb_read.597475493 |
|
|
Feb 25 02:44:48 PM PST 24 |
Feb 25 02:44:49 PM PST 24 |
82630856 ps |
| T940 |
/workspace/coverage/default/29.spi_device_stress_all.4086127765 |
|
|
Feb 25 02:44:19 PM PST 24 |
Feb 25 02:44:20 PM PST 24 |
67443233 ps |
| T941 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.3970771167 |
|
|
Feb 25 02:43:22 PM PST 24 |
Feb 25 02:43:23 PM PST 24 |
528506748 ps |
| T942 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.1768603830 |
|
|
Feb 25 02:44:17 PM PST 24 |
Feb 25 02:44:25 PM PST 24 |
2495274323 ps |
| T943 |
/workspace/coverage/default/45.spi_device_flash_and_tpm.1072418622 |
|
|
Feb 25 02:45:14 PM PST 24 |
Feb 25 02:49:04 PM PST 24 |
232265594986 ps |
| T944 |
/workspace/coverage/default/10.spi_device_flash_mode.3814404458 |
|
|
Feb 25 02:43:29 PM PST 24 |
Feb 25 02:43:45 PM PST 24 |
519223671 ps |
| T945 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.871992253 |
|
|
Feb 25 02:44:08 PM PST 24 |
Feb 25 02:48:16 PM PST 24 |
70752168318 ps |
| T946 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.2355968810 |
|
|
Feb 25 02:45:05 PM PST 24 |
Feb 25 02:45:09 PM PST 24 |
1376072533 ps |
| T947 |
/workspace/coverage/default/35.spi_device_flash_all.2781300548 |
|
|
Feb 25 02:44:50 PM PST 24 |
Feb 25 02:45:35 PM PST 24 |
5883823144 ps |
| T948 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.392691065 |
|
|
Feb 25 02:44:56 PM PST 24 |
Feb 25 02:45:01 PM PST 24 |
1119549624 ps |
| T949 |
/workspace/coverage/default/6.spi_device_mailbox.850669877 |
|
|
Feb 25 02:43:17 PM PST 24 |
Feb 25 02:43:35 PM PST 24 |
5018815640 ps |
| T950 |
/workspace/coverage/default/12.spi_device_mailbox.3431937054 |
|
|
Feb 25 02:43:37 PM PST 24 |
Feb 25 02:43:43 PM PST 24 |
2043558272 ps |
| T951 |
/workspace/coverage/default/20.spi_device_csb_read.1901542668 |
|
|
Feb 25 02:43:50 PM PST 24 |
Feb 25 02:43:51 PM PST 24 |
63354908 ps |
| T226 |
/workspace/coverage/default/24.spi_device_flash_all.2884260156 |
|
|
Feb 25 02:44:18 PM PST 24 |
Feb 25 02:48:27 PM PST 24 |
247237545184 ps |
| T952 |
/workspace/coverage/default/10.spi_device_flash_all.2314784 |
|
|
Feb 25 02:43:18 PM PST 24 |
Feb 25 02:46:46 PM PST 24 |
36161259982 ps |
| T953 |
/workspace/coverage/default/11.spi_device_tpm_all.291687545 |
|
|
Feb 25 02:43:22 PM PST 24 |
Feb 25 02:43:56 PM PST 24 |
5850030369 ps |
| T231 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.955348952 |
|
|
Feb 25 02:45:22 PM PST 24 |
Feb 25 02:50:29 PM PST 24 |
43197299047 ps |
| T954 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.1294507720 |
|
|
Feb 25 02:42:55 PM PST 24 |
Feb 25 02:42:56 PM PST 24 |
47083408 ps |
| T955 |
/workspace/coverage/default/47.spi_device_flash_all.1419659513 |
|
|
Feb 25 02:45:26 PM PST 24 |
Feb 25 02:47:28 PM PST 24 |
23269958183 ps |
| T956 |
/workspace/coverage/default/23.spi_device_upload.1952618537 |
|
|
Feb 25 02:44:04 PM PST 24 |
Feb 25 02:44:19 PM PST 24 |
17704966188 ps |
| T957 |
/workspace/coverage/default/40.spi_device_upload.1320447119 |
|
|
Feb 25 02:45:02 PM PST 24 |
Feb 25 02:45:21 PM PST 24 |
30260927236 ps |
| T958 |
/workspace/coverage/default/41.spi_device_mailbox.4059874647 |
|
|
Feb 25 02:45:02 PM PST 24 |
Feb 25 02:45:07 PM PST 24 |
404817583 ps |
| T959 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.961335669 |
|
|
Feb 25 02:44:58 PM PST 24 |
Feb 25 02:44:59 PM PST 24 |
45503230 ps |
| T960 |
/workspace/coverage/default/41.spi_device_alert_test.3950667411 |
|
|
Feb 25 02:45:09 PM PST 24 |
Feb 25 02:45:10 PM PST 24 |
43310393 ps |
| T961 |
/workspace/coverage/default/22.spi_device_flash_mode.1655318071 |
|
|
Feb 25 02:44:00 PM PST 24 |
Feb 25 02:44:26 PM PST 24 |
6448137415 ps |
| T962 |
/workspace/coverage/default/49.spi_device_tpm_all.59458671 |
|
|
Feb 25 02:45:28 PM PST 24 |
Feb 25 02:45:41 PM PST 24 |
10233132025 ps |
| T963 |
/workspace/coverage/default/30.spi_device_cfg_cmd.944380712 |
|
|
Feb 25 02:44:35 PM PST 24 |
Feb 25 02:44:39 PM PST 24 |
331907035 ps |
| T964 |
/workspace/coverage/default/42.spi_device_stress_all.2353838091 |
|
|
Feb 25 02:45:03 PM PST 24 |
Feb 25 02:45:04 PM PST 24 |
178335198 ps |
| T965 |
/workspace/coverage/default/36.spi_device_flash_all.2792675967 |
|
|
Feb 25 02:44:50 PM PST 24 |
Feb 25 02:47:02 PM PST 24 |
99241304477 ps |
| T966 |
/workspace/coverage/default/26.spi_device_csb_read.2462275114 |
|
|
Feb 25 02:44:05 PM PST 24 |
Feb 25 02:44:07 PM PST 24 |
60979013 ps |
| T967 |
/workspace/coverage/default/30.spi_device_flash_all.3269674772 |
|
|
Feb 25 02:44:29 PM PST 24 |
Feb 25 02:44:44 PM PST 24 |
1061253721 ps |
| T968 |
/workspace/coverage/default/31.spi_device_stress_all.3222145730 |
|
|
Feb 25 02:44:27 PM PST 24 |
Feb 25 02:51:08 PM PST 24 |
43472255149 ps |
| T969 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.2300583349 |
|
|
Feb 25 02:45:31 PM PST 24 |
Feb 25 02:45:35 PM PST 24 |
873697943 ps |
| T970 |
/workspace/coverage/default/17.spi_device_mailbox.424341405 |
|
|
Feb 25 02:43:43 PM PST 24 |
Feb 25 02:43:49 PM PST 24 |
312182720 ps |
| T971 |
/workspace/coverage/default/6.spi_device_tpm_all.3732197869 |
|
|
Feb 25 02:43:05 PM PST 24 |
Feb 25 02:43:14 PM PST 24 |
6590235888 ps |
| T265 |
/workspace/coverage/default/36.spi_device_flash_and_tpm.2510415976 |
|
|
Feb 25 02:44:52 PM PST 24 |
Feb 25 02:46:25 PM PST 24 |
20311580553 ps |
| T972 |
/workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.17224029 |
|
|
Feb 25 02:43:22 PM PST 24 |
Feb 25 02:46:31 PM PST 24 |
91009216527 ps |
| T973 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.3104375679 |
|
|
Feb 25 02:44:40 PM PST 24 |
Feb 25 02:45:15 PM PST 24 |
11396774571 ps |
| T974 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.3695995385 |
|
|
Feb 25 02:42:54 PM PST 24 |
Feb 25 02:43:02 PM PST 24 |
4008397820 ps |
| T234 |
/workspace/coverage/default/30.spi_device_flash_and_tpm.1584882738 |
|
|
Feb 25 02:44:33 PM PST 24 |
Feb 25 02:46:24 PM PST 24 |
16000774383 ps |
| T975 |
/workspace/coverage/default/22.spi_device_upload.4047150796 |
|
|
Feb 25 02:43:59 PM PST 24 |
Feb 25 02:44:23 PM PST 24 |
32307637289 ps |
| T976 |
/workspace/coverage/default/10.spi_device_ram_cfg.1548400122 |
|
|
Feb 25 02:43:19 PM PST 24 |
Feb 25 02:43:20 PM PST 24 |
26616359 ps |
| T977 |
/workspace/coverage/default/8.spi_device_cfg_cmd.898125190 |
|
|
Feb 25 02:43:29 PM PST 24 |
Feb 25 02:43:33 PM PST 24 |
1286275410 ps |
| T978 |
/workspace/coverage/default/3.spi_device_ram_cfg.3086042616 |
|
|
Feb 25 02:43:07 PM PST 24 |
Feb 25 02:43:08 PM PST 24 |
45017712 ps |
| T979 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.2156001554 |
|
|
Feb 25 02:43:50 PM PST 24 |
Feb 25 02:44:19 PM PST 24 |
9726417293 ps |
| T980 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.1342697584 |
|
|
Feb 25 02:44:04 PM PST 24 |
Feb 25 02:44:29 PM PST 24 |
8864982275 ps |
| T981 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.3686277198 |
|
|
Feb 25 01:50:27 PM PST 24 |
Feb 25 01:50:28 PM PST 24 |
18447549 ps |
| T86 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.132472127 |
|
|
Feb 25 01:50:30 PM PST 24 |
Feb 25 01:50:33 PM PST 24 |
82322990 ps |
| T105 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1703692751 |
|
|
Feb 25 01:49:35 PM PST 24 |
Feb 25 01:49:37 PM PST 24 |
80970635 ps |
| T982 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.108696253 |
|
|
Feb 25 01:50:32 PM PST 24 |
Feb 25 01:50:35 PM PST 24 |
370948841 ps |
| T983 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.2705827875 |
|
|
Feb 25 01:50:41 PM PST 24 |
Feb 25 01:50:42 PM PST 24 |
17333212 ps |
| T984 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.2121674744 |
|
|
Feb 25 01:50:40 PM PST 24 |
Feb 25 01:50:43 PM PST 24 |
45145072 ps |
| T87 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4193612196 |
|
|
Feb 25 01:50:17 PM PST 24 |
Feb 25 01:50:19 PM PST 24 |
142144945 ps |
| T985 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.3075204789 |
|
|
Feb 25 01:49:33 PM PST 24 |
Feb 25 01:49:34 PM PST 24 |
29950263 ps |
| T88 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.2509247953 |
|
|
Feb 25 01:49:22 PM PST 24 |
Feb 25 01:49:44 PM PST 24 |
3179850042 ps |
| T90 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1870964109 |
|
|
Feb 25 01:50:35 PM PST 24 |
Feb 25 01:50:55 PM PST 24 |
3876252439 ps |
| T986 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2602533797 |
|
|
Feb 25 01:50:50 PM PST 24 |
Feb 25 01:50:51 PM PST 24 |
12990698 ps |
| T132 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1372755611 |
|
|
Feb 25 01:50:09 PM PST 24 |
Feb 25 01:50:13 PM PST 24 |
524886289 ps |
| T89 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2409274610 |
|
|
Feb 25 01:50:37 PM PST 24 |
Feb 25 01:50:42 PM PST 24 |
58715779 ps |
| T99 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.388167064 |
|
|
Feb 25 01:50:09 PM PST 24 |
Feb 25 01:50:16 PM PST 24 |
529459614 ps |
| T100 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3534268428 |
|
|
Feb 25 01:50:41 PM PST 24 |
Feb 25 01:50:46 PM PST 24 |
457166078 ps |
| T987 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1366990717 |
|
|
Feb 25 01:50:10 PM PST 24 |
Feb 25 01:50:11 PM PST 24 |
39630332 ps |
| T988 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.980523515 |
|
|
Feb 25 01:50:41 PM PST 24 |
Feb 25 01:50:44 PM PST 24 |
172947818 ps |
| T989 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2333674861 |
|
|
Feb 25 01:50:32 PM PST 24 |
Feb 25 01:50:33 PM PST 24 |
14854263 ps |
| T990 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3186936016 |
|
|
Feb 25 01:49:34 PM PST 24 |
Feb 25 01:49:38 PM PST 24 |
163470342 ps |
| T91 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.718248995 |
|
|
Feb 25 01:50:12 PM PST 24 |
Feb 25 01:50:21 PM PST 24 |
287098786 ps |
| T106 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1941581361 |
|
|
Feb 25 01:50:42 PM PST 24 |
Feb 25 01:50:44 PM PST 24 |
489012453 ps |
| T101 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2573283307 |
|
|
Feb 25 01:50:28 PM PST 24 |
Feb 25 01:50:34 PM PST 24 |
123533904 ps |
| T102 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.701728264 |
|
|
Feb 25 01:50:17 PM PST 24 |
Feb 25 01:50:22 PM PST 24 |
184588394 ps |
| T94 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2822841716 |
|
|
Feb 25 01:50:40 PM PST 24 |
Feb 25 01:50:44 PM PST 24 |
45493888 ps |
| T991 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.2002446263 |
|
|
Feb 25 01:50:42 PM PST 24 |
Feb 25 01:50:43 PM PST 24 |
291684467 ps |
| T96 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1955503773 |
|
|
Feb 25 01:49:53 PM PST 24 |
Feb 25 01:50:00 PM PST 24 |
252947901 ps |
| T250 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.2903921185 |
|
|
Feb 25 01:49:35 PM PST 24 |
Feb 25 01:49:41 PM PST 24 |
424202033 ps |
| T992 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.898910278 |
|
|
Feb 25 01:50:52 PM PST 24 |
Feb 25 01:50:53 PM PST 24 |
167918163 ps |
| T95 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2870734427 |
|
|
Feb 25 01:50:26 PM PST 24 |
Feb 25 01:50:29 PM PST 24 |
160752462 ps |
| T107 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1023583251 |
|
|
Feb 25 01:49:42 PM PST 24 |
Feb 25 01:49:43 PM PST 24 |
31318033 ps |
| T993 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.277780527 |
|
|
Feb 25 01:50:10 PM PST 24 |
Feb 25 01:50:12 PM PST 24 |
31032787 ps |
| T994 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1467473592 |
|
|
Feb 25 01:49:26 PM PST 24 |
Feb 25 01:49:27 PM PST 24 |
19445839 ps |
| T995 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.1948505318 |
|
|
Feb 25 01:49:35 PM PST 24 |
Feb 25 01:49:36 PM PST 24 |
20918184 ps |
| T996 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1694975903 |
|
|
Feb 25 01:49:27 PM PST 24 |
Feb 25 01:49:30 PM PST 24 |
74656100 ps |
| T997 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.1067244470 |
|
|
Feb 25 01:50:40 PM PST 24 |
Feb 25 01:50:41 PM PST 24 |
17247703 ps |
| T998 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.614068246 |
|
|
Feb 25 01:49:42 PM PST 24 |
Feb 25 01:49:44 PM PST 24 |
120184737 ps |
| T999 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.1517318149 |
|
|
Feb 25 01:49:43 PM PST 24 |
Feb 25 01:49:44 PM PST 24 |
14223135 ps |
| T1000 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2066237861 |
|
|
Feb 25 01:50:09 PM PST 24 |
Feb 25 01:50:13 PM PST 24 |
52975962 ps |
| T1001 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.227980428 |
|
|
Feb 25 01:50:57 PM PST 24 |
Feb 25 01:50:58 PM PST 24 |
14385284 ps |
| T1002 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3587794598 |
|
|
Feb 25 01:50:53 PM PST 24 |
Feb 25 01:50:54 PM PST 24 |
40802876 ps |
| T1003 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.1640867063 |
|
|
Feb 25 01:50:20 PM PST 24 |
Feb 25 01:50:21 PM PST 24 |
47483851 ps |
| T1004 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3109264240 |
|
|
Feb 25 01:50:15 PM PST 24 |
Feb 25 01:50:18 PM PST 24 |
35992180 ps |
| T1005 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.1695153623 |
|
|
Feb 25 01:50:53 PM PST 24 |
Feb 25 01:50:54 PM PST 24 |
23894032 ps |
| T1006 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2333459835 |
|
|
Feb 25 01:50:24 PM PST 24 |
Feb 25 01:50:26 PM PST 24 |
63347949 ps |
| T1007 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1901569539 |
|
|
Feb 25 01:50:51 PM PST 24 |
Feb 25 01:50:52 PM PST 24 |
34858404 ps |
| T1008 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.2310669914 |
|
|
Feb 25 01:50:51 PM PST 24 |
Feb 25 01:50:52 PM PST 24 |
18593602 ps |
| T245 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.1368116349 |
|
|
Feb 25 01:50:31 PM PST 24 |
Feb 25 01:50:51 PM PST 24 |
2204780079 ps |
| T1009 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.1283243165 |
|
|
Feb 25 01:50:22 PM PST 24 |
Feb 25 01:50:24 PM PST 24 |
109030361 ps |
| T1010 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3533194205 |
|
|
Feb 25 01:50:45 PM PST 24 |
Feb 25 01:50:46 PM PST 24 |
111451160 ps |
| T1011 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3631176888 |
|
|
Feb 25 01:50:31 PM PST 24 |
Feb 25 01:50:32 PM PST 24 |
82357558 ps |
| T1012 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1347136830 |
|
|
Feb 25 01:49:51 PM PST 24 |
Feb 25 01:49:53 PM PST 24 |
44164382 ps |
| T1013 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.546460507 |
|
|
Feb 25 01:49:36 PM PST 24 |
Feb 25 01:50:00 PM PST 24 |
390206605 ps |
| T108 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.550512846 |
|
|
Feb 25 01:49:49 PM PST 24 |
Feb 25 01:49:50 PM PST 24 |
35713394 ps |
| T1014 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.75170541 |
|
|
Feb 25 01:50:53 PM PST 24 |
Feb 25 01:50:53 PM PST 24 |
99515161 ps |
| T1015 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3118645533 |
|
|
Feb 25 01:51:04 PM PST 24 |
Feb 25 01:51:05 PM PST 24 |
14485312 ps |
| T109 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.28175415 |
|
|
Feb 25 01:50:28 PM PST 24 |
Feb 25 01:50:31 PM PST 24 |
76146362 ps |
| T110 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3577114853 |
|
|
Feb 25 01:49:43 PM PST 24 |
Feb 25 01:49:45 PM PST 24 |
109903340 ps |
| T111 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.2605245308 |
|
|
Feb 25 01:50:23 PM PST 24 |
Feb 25 01:50:26 PM PST 24 |
115319764 ps |
| T1016 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.1204431214 |
|
|
Feb 25 01:50:29 PM PST 24 |
Feb 25 01:50:30 PM PST 24 |
23786086 ps |
| T97 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.493510279 |
|
|
Feb 25 01:49:26 PM PST 24 |
Feb 25 01:49:28 PM PST 24 |
85147755 ps |
| T254 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.3253906355 |
|
|
Feb 25 01:50:47 PM PST 24 |
Feb 25 01:51:06 PM PST 24 |
1671351953 ps |
| T1017 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.4126025984 |
|
|
Feb 25 01:50:53 PM PST 24 |
Feb 25 01:50:53 PM PST 24 |
96843623 ps |
| T133 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.1613950113 |
|
|
Feb 25 01:50:46 PM PST 24 |
Feb 25 01:50:52 PM PST 24 |
2747980614 ps |
| T1018 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2849603106 |
|
|
Feb 25 01:50:16 PM PST 24 |
Feb 25 01:50:19 PM PST 24 |
162144132 ps |