T818 |
/workspace/coverage/default/31.spi_device_tpm_rw.2791868492 |
|
|
Feb 29 01:38:28 PM PST 24 |
Feb 29 01:38:33 PM PST 24 |
316973084 ps |
T819 |
/workspace/coverage/default/37.spi_device_tpm_rw.2045212724 |
|
|
Feb 29 01:38:54 PM PST 24 |
Feb 29 01:38:55 PM PST 24 |
30506142 ps |
T820 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.901270337 |
|
|
Feb 29 01:38:05 PM PST 24 |
Feb 29 01:38:08 PM PST 24 |
162907053 ps |
T821 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.1991757526 |
|
|
Feb 29 01:38:29 PM PST 24 |
Feb 29 01:38:46 PM PST 24 |
5841663731 ps |
T822 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.1649904513 |
|
|
Feb 29 01:36:34 PM PST 24 |
Feb 29 01:36:52 PM PST 24 |
108494562459 ps |
T823 |
/workspace/coverage/default/44.spi_device_flash_mode.2998032345 |
|
|
Feb 29 01:39:30 PM PST 24 |
Feb 29 01:39:56 PM PST 24 |
72100675146 ps |
T824 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.3360153273 |
|
|
Feb 29 01:37:29 PM PST 24 |
Feb 29 01:37:42 PM PST 24 |
8231365248 ps |
T825 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.3413422116 |
|
|
Feb 29 01:38:54 PM PST 24 |
Feb 29 01:38:55 PM PST 24 |
155444812 ps |
T826 |
/workspace/coverage/default/2.spi_device_pass_cmd_filtering.3338490965 |
|
|
Feb 29 01:35:59 PM PST 24 |
Feb 29 01:36:09 PM PST 24 |
1285809427 ps |
T827 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.517915716 |
|
|
Feb 29 01:37:27 PM PST 24 |
Feb 29 01:37:36 PM PST 24 |
9381982391 ps |
T828 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.3903747935 |
|
|
Feb 29 01:39:16 PM PST 24 |
Feb 29 01:39:17 PM PST 24 |
36175057 ps |
T829 |
/workspace/coverage/default/16.spi_device_alert_test.69708448 |
|
|
Feb 29 01:37:26 PM PST 24 |
Feb 29 01:37:27 PM PST 24 |
47758257 ps |
T830 |
/workspace/coverage/default/3.spi_device_flash_all.1582859120 |
|
|
Feb 29 01:36:12 PM PST 24 |
Feb 29 01:37:05 PM PST 24 |
8565142582 ps |
T831 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.1442699241 |
|
|
Feb 29 01:37:25 PM PST 24 |
Feb 29 01:37:29 PM PST 24 |
238490725 ps |
T832 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.2820896880 |
|
|
Feb 29 01:36:57 PM PST 24 |
Feb 29 01:36:58 PM PST 24 |
145659232 ps |
T833 |
/workspace/coverage/default/0.spi_device_csb_read.65204162 |
|
|
Feb 29 01:35:40 PM PST 24 |
Feb 29 01:35:42 PM PST 24 |
12362786 ps |
T834 |
/workspace/coverage/default/41.spi_device_flash_and_tpm.4019727806 |
|
|
Feb 29 01:39:15 PM PST 24 |
Feb 29 01:40:28 PM PST 24 |
7103795764 ps |
T835 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3545077164 |
|
|
Feb 29 01:36:44 PM PST 24 |
Feb 29 01:36:48 PM PST 24 |
415631091 ps |
T836 |
/workspace/coverage/default/3.spi_device_csb_read.1006109475 |
|
|
Feb 29 01:35:56 PM PST 24 |
Feb 29 01:35:57 PM PST 24 |
60630006 ps |
T837 |
/workspace/coverage/default/47.spi_device_csb_read.663571601 |
|
|
Feb 29 01:39:39 PM PST 24 |
Feb 29 01:39:40 PM PST 24 |
36543149 ps |
T838 |
/workspace/coverage/default/9.spi_device_flash_all.2537082156 |
|
|
Feb 29 01:36:43 PM PST 24 |
Feb 29 01:37:51 PM PST 24 |
16674871186 ps |
T839 |
/workspace/coverage/default/30.spi_device_cfg_cmd.1199746997 |
|
|
Feb 29 01:38:30 PM PST 24 |
Feb 29 01:38:34 PM PST 24 |
1347357635 ps |
T84 |
/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.836971140 |
|
|
Feb 29 01:39:38 PM PST 24 |
Feb 29 01:40:41 PM PST 24 |
12976841358 ps |
T840 |
/workspace/coverage/default/44.spi_device_read_buffer_direct.894384358 |
|
|
Feb 29 01:39:28 PM PST 24 |
Feb 29 01:39:32 PM PST 24 |
604591652 ps |
T841 |
/workspace/coverage/default/1.spi_device_stress_all.1919080148 |
|
|
Feb 29 01:36:02 PM PST 24 |
Feb 29 01:42:29 PM PST 24 |
49167080686 ps |
T842 |
/workspace/coverage/default/31.spi_device_flash_all.651118837 |
|
|
Feb 29 01:38:33 PM PST 24 |
Feb 29 01:39:50 PM PST 24 |
15423555146 ps |
T843 |
/workspace/coverage/default/26.spi_device_tpm_all.1597429956 |
|
|
Feb 29 01:38:11 PM PST 24 |
Feb 29 01:38:38 PM PST 24 |
19994234241 ps |
T844 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.3315374915 |
|
|
Feb 29 01:39:28 PM PST 24 |
Feb 29 01:39:33 PM PST 24 |
2551696570 ps |
T845 |
/workspace/coverage/default/48.spi_device_upload.4037348625 |
|
|
Feb 29 01:39:39 PM PST 24 |
Feb 29 01:39:42 PM PST 24 |
56210613 ps |
T846 |
/workspace/coverage/default/49.spi_device_cfg_cmd.3048814321 |
|
|
Feb 29 01:39:41 PM PST 24 |
Feb 29 01:39:46 PM PST 24 |
2465235749 ps |
T847 |
/workspace/coverage/default/23.spi_device_flash_all.4156290361 |
|
|
Feb 29 01:37:54 PM PST 24 |
Feb 29 01:38:06 PM PST 24 |
2458927985 ps |
T848 |
/workspace/coverage/default/25.spi_device_flash_mode.823467379 |
|
|
Feb 29 01:38:01 PM PST 24 |
Feb 29 01:38:19 PM PST 24 |
5252515906 ps |
T849 |
/workspace/coverage/default/4.spi_device_pass_addr_payload_swap.4184163876 |
|
|
Feb 29 01:36:10 PM PST 24 |
Feb 29 01:36:19 PM PST 24 |
12774104437 ps |
T850 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.2138870087 |
|
|
Feb 29 01:39:40 PM PST 24 |
Feb 29 01:39:41 PM PST 24 |
65402109 ps |
T262 |
/workspace/coverage/default/43.spi_device_flash_all.1821551637 |
|
|
Feb 29 01:39:21 PM PST 24 |
Feb 29 01:40:42 PM PST 24 |
10481779012 ps |
T851 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.3770529227 |
|
|
Feb 29 01:35:55 PM PST 24 |
Feb 29 01:36:23 PM PST 24 |
10118645675 ps |
T852 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.517038091 |
|
|
Feb 29 01:37:57 PM PST 24 |
Feb 29 01:38:43 PM PST 24 |
15347014967 ps |
T853 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.2534200770 |
|
|
Feb 29 01:36:12 PM PST 24 |
Feb 29 01:36:32 PM PST 24 |
7148393712 ps |
T854 |
/workspace/coverage/default/42.spi_device_intercept.4159530445 |
|
|
Feb 29 01:39:13 PM PST 24 |
Feb 29 01:39:25 PM PST 24 |
4085978992 ps |
T855 |
/workspace/coverage/default/41.spi_device_tpm_all.3104007421 |
|
|
Feb 29 01:39:04 PM PST 24 |
Feb 29 01:39:37 PM PST 24 |
29757005453 ps |
T856 |
/workspace/coverage/default/44.spi_device_csb_read.897218073 |
|
|
Feb 29 01:39:16 PM PST 24 |
Feb 29 01:39:17 PM PST 24 |
39950314 ps |
T857 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.561560728 |
|
|
Feb 29 01:39:02 PM PST 24 |
Feb 29 01:39:07 PM PST 24 |
1471050719 ps |
T858 |
/workspace/coverage/default/6.spi_device_mailbox.2320756762 |
|
|
Feb 29 01:36:30 PM PST 24 |
Feb 29 01:36:40 PM PST 24 |
1260800163 ps |
T859 |
/workspace/coverage/default/44.spi_device_flash_all.1539544873 |
|
|
Feb 29 01:39:29 PM PST 24 |
Feb 29 01:40:16 PM PST 24 |
19587453958 ps |
T860 |
/workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.3015731571 |
|
|
Feb 29 01:38:18 PM PST 24 |
Feb 29 01:39:20 PM PST 24 |
8503514229 ps |
T861 |
/workspace/coverage/default/3.spi_device_mem_parity.1389851633 |
|
|
Feb 29 01:36:01 PM PST 24 |
Feb 29 01:36:03 PM PST 24 |
14811476 ps |
T260 |
/workspace/coverage/default/0.spi_device_flash_all.1288718093 |
|
|
Feb 29 01:35:53 PM PST 24 |
Feb 29 01:38:31 PM PST 24 |
16453785618 ps |
T862 |
/workspace/coverage/default/14.spi_device_csb_read.768647645 |
|
|
Feb 29 01:36:59 PM PST 24 |
Feb 29 01:37:00 PM PST 24 |
51753645 ps |
T863 |
/workspace/coverage/default/4.spi_device_intercept.3214863532 |
|
|
Feb 29 01:36:11 PM PST 24 |
Feb 29 01:36:24 PM PST 24 |
3382023878 ps |
T864 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.3899219569 |
|
|
Feb 29 01:38:53 PM PST 24 |
Feb 29 01:39:03 PM PST 24 |
1778037381 ps |
T865 |
/workspace/coverage/default/9.spi_device_tpm_rw.3475574028 |
|
|
Feb 29 01:36:46 PM PST 24 |
Feb 29 01:36:48 PM PST 24 |
232203461 ps |
T866 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.959255104 |
|
|
Feb 29 01:39:03 PM PST 24 |
Feb 29 01:39:11 PM PST 24 |
1763678079 ps |
T867 |
/workspace/coverage/default/12.spi_device_upload.852724446 |
|
|
Feb 29 01:37:09 PM PST 24 |
Feb 29 01:37:21 PM PST 24 |
11255866819 ps |
T868 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.1739638968 |
|
|
Feb 29 01:36:28 PM PST 24 |
Feb 29 01:36:42 PM PST 24 |
2606853239 ps |
T869 |
/workspace/coverage/default/24.spi_device_alert_test.220124424 |
|
|
Feb 29 01:37:59 PM PST 24 |
Feb 29 01:38:00 PM PST 24 |
34397508 ps |
T870 |
/workspace/coverage/default/14.spi_device_ram_cfg.88005993 |
|
|
Feb 29 01:37:12 PM PST 24 |
Feb 29 01:37:14 PM PST 24 |
19093842 ps |
T871 |
/workspace/coverage/default/49.spi_device_mailbox.2845775994 |
|
|
Feb 29 01:39:39 PM PST 24 |
Feb 29 01:39:57 PM PST 24 |
22695710033 ps |
T287 |
/workspace/coverage/default/21.spi_device_flash_all.3154459282 |
|
|
Feb 29 01:37:40 PM PST 24 |
Feb 29 01:40:37 PM PST 24 |
68637305789 ps |
T872 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.594677537 |
|
|
Feb 29 01:37:40 PM PST 24 |
Feb 29 01:37:42 PM PST 24 |
379478693 ps |
T873 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.1175555384 |
|
|
Feb 29 01:36:29 PM PST 24 |
Feb 29 01:36:36 PM PST 24 |
570411270 ps |
T874 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.2393624840 |
|
|
Feb 29 01:39:42 PM PST 24 |
Feb 29 01:39:54 PM PST 24 |
2033413637 ps |
T875 |
/workspace/coverage/default/32.spi_device_mailbox.3112215941 |
|
|
Feb 29 01:38:33 PM PST 24 |
Feb 29 01:38:51 PM PST 24 |
8051946847 ps |
T876 |
/workspace/coverage/default/28.spi_device_flash_mode.1885484990 |
|
|
Feb 29 01:38:15 PM PST 24 |
Feb 29 01:38:48 PM PST 24 |
41351517032 ps |
T877 |
/workspace/coverage/default/13.spi_device_flash_mode.3460023560 |
|
|
Feb 29 01:37:06 PM PST 24 |
Feb 29 01:37:16 PM PST 24 |
918006134 ps |
T878 |
/workspace/coverage/default/6.spi_device_csb_read.548431259 |
|
|
Feb 29 01:36:28 PM PST 24 |
Feb 29 01:36:28 PM PST 24 |
16131984 ps |
T879 |
/workspace/coverage/default/37.spi_device_intercept.2217269232 |
|
|
Feb 29 01:39:06 PM PST 24 |
Feb 29 01:39:12 PM PST 24 |
553592321 ps |
T277 |
/workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.858823198 |
|
|
Feb 29 01:39:39 PM PST 24 |
Feb 29 01:41:28 PM PST 24 |
19376990816 ps |
T880 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.1458633347 |
|
|
Feb 29 01:37:58 PM PST 24 |
Feb 29 01:37:59 PM PST 24 |
209730414 ps |
T881 |
/workspace/coverage/default/19.spi_device_cfg_cmd.3283077030 |
|
|
Feb 29 01:37:43 PM PST 24 |
Feb 29 01:37:48 PM PST 24 |
893929204 ps |
T882 |
/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.3322371189 |
|
|
Feb 29 01:37:25 PM PST 24 |
Feb 29 01:37:48 PM PST 24 |
8405413662 ps |
T883 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.1303148112 |
|
|
Feb 29 01:39:06 PM PST 24 |
Feb 29 01:39:09 PM PST 24 |
114184286 ps |
T884 |
/workspace/coverage/default/11.spi_device_upload.274944392 |
|
|
Feb 29 01:36:57 PM PST 24 |
Feb 29 01:37:02 PM PST 24 |
932494752 ps |
T885 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.1365034515 |
|
|
Feb 29 01:36:48 PM PST 24 |
Feb 29 01:37:05 PM PST 24 |
5593801059 ps |
T886 |
/workspace/coverage/default/30.spi_device_flash_all.1871973593 |
|
|
Feb 29 01:38:33 PM PST 24 |
Feb 29 01:39:32 PM PST 24 |
17093319005 ps |
T887 |
/workspace/coverage/default/22.spi_device_tpm_all.3999941560 |
|
|
Feb 29 01:37:56 PM PST 24 |
Feb 29 01:38:15 PM PST 24 |
7302727095 ps |
T888 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.903866341 |
|
|
Feb 29 01:39:27 PM PST 24 |
Feb 29 01:39:31 PM PST 24 |
396634899 ps |
T889 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.4045579775 |
|
|
Feb 29 01:37:39 PM PST 24 |
Feb 29 01:42:43 PM PST 24 |
155296848467 ps |
T890 |
/workspace/coverage/default/11.spi_device_mailbox.1093267346 |
|
|
Feb 29 01:36:55 PM PST 24 |
Feb 29 01:37:07 PM PST 24 |
4159354637 ps |
T270 |
/workspace/coverage/default/35.spi_device_flash_all.3371078021 |
|
|
Feb 29 01:38:56 PM PST 24 |
Feb 29 01:44:48 PM PST 24 |
1334995402356 ps |
T891 |
/workspace/coverage/default/1.spi_device_upload.3408427157 |
|
|
Feb 29 01:35:52 PM PST 24 |
Feb 29 01:36:01 PM PST 24 |
1220773901 ps |
T892 |
/workspace/coverage/default/28.spi_device_cfg_cmd.3610553120 |
|
|
Feb 29 01:38:19 PM PST 24 |
Feb 29 01:38:24 PM PST 24 |
497049051 ps |
T893 |
/workspace/coverage/default/32.spi_device_flash_and_tpm.3883567985 |
|
|
Feb 29 01:38:28 PM PST 24 |
Feb 29 01:42:41 PM PST 24 |
42165307646 ps |
T894 |
/workspace/coverage/default/23.spi_device_flash_mode.4075893385 |
|
|
Feb 29 01:37:54 PM PST 24 |
Feb 29 01:38:16 PM PST 24 |
8207019423 ps |
T895 |
/workspace/coverage/default/0.spi_device_tpm_all.3150570772 |
|
|
Feb 29 01:35:55 PM PST 24 |
Feb 29 01:36:10 PM PST 24 |
17507664708 ps |
T896 |
/workspace/coverage/default/22.spi_device_mailbox.1515087689 |
|
|
Feb 29 01:37:53 PM PST 24 |
Feb 29 01:38:35 PM PST 24 |
47105028418 ps |
T897 |
/workspace/coverage/default/6.spi_device_tpm_all.3890220240 |
|
|
Feb 29 01:36:30 PM PST 24 |
Feb 29 01:37:35 PM PST 24 |
44780967869 ps |
T898 |
/workspace/coverage/default/48.spi_device_mailbox.382674546 |
|
|
Feb 29 01:39:41 PM PST 24 |
Feb 29 01:39:58 PM PST 24 |
12791185845 ps |
T899 |
/workspace/coverage/default/2.spi_device_csb_read.3184581378 |
|
|
Feb 29 01:35:58 PM PST 24 |
Feb 29 01:36:00 PM PST 24 |
45030557 ps |
T900 |
/workspace/coverage/default/1.spi_device_flash_mode.3326753280 |
|
|
Feb 29 01:36:01 PM PST 24 |
Feb 29 01:36:37 PM PST 24 |
23727133002 ps |
T901 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3475458823 |
|
|
Feb 29 01:38:43 PM PST 24 |
Feb 29 01:39:16 PM PST 24 |
11532790288 ps |
T902 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.4211880772 |
|
|
Feb 29 01:38:17 PM PST 24 |
Feb 29 01:38:30 PM PST 24 |
3381840456 ps |
T903 |
/workspace/coverage/default/23.spi_device_tpm_rw.3078244965 |
|
|
Feb 29 01:37:57 PM PST 24 |
Feb 29 01:38:04 PM PST 24 |
162586713 ps |
T904 |
/workspace/coverage/default/6.spi_device_cfg_cmd.3868531516 |
|
|
Feb 29 01:36:29 PM PST 24 |
Feb 29 01:36:34 PM PST 24 |
1380615724 ps |
T905 |
/workspace/coverage/default/2.spi_device_upload.2793434608 |
|
|
Feb 29 01:36:00 PM PST 24 |
Feb 29 01:36:09 PM PST 24 |
3685895726 ps |
T906 |
/workspace/coverage/default/8.spi_device_intercept.2680027640 |
|
|
Feb 29 01:36:47 PM PST 24 |
Feb 29 01:36:53 PM PST 24 |
1141880956 ps |
T907 |
/workspace/coverage/default/2.spi_device_flash_and_tpm.1011018808 |
|
|
Feb 29 01:35:57 PM PST 24 |
Feb 29 01:38:32 PM PST 24 |
15777485696 ps |
T908 |
/workspace/coverage/default/28.spi_device_alert_test.1542264531 |
|
|
Feb 29 01:38:13 PM PST 24 |
Feb 29 01:38:14 PM PST 24 |
34311241 ps |
T909 |
/workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.499330355 |
|
|
Feb 29 01:39:05 PM PST 24 |
Feb 29 01:46:35 PM PST 24 |
141347677260 ps |
T910 |
/workspace/coverage/default/43.spi_device_tpm_rw.2077412441 |
|
|
Feb 29 01:39:16 PM PST 24 |
Feb 29 01:39:17 PM PST 24 |
73253007 ps |
T911 |
/workspace/coverage/default/38.spi_device_flash_all.3318831961 |
|
|
Feb 29 01:39:01 PM PST 24 |
Feb 29 01:40:24 PM PST 24 |
43516581778 ps |
T912 |
/workspace/coverage/default/29.spi_device_tpm_all.2571004222 |
|
|
Feb 29 01:38:24 PM PST 24 |
Feb 29 01:38:36 PM PST 24 |
9323485385 ps |
T913 |
/workspace/coverage/default/3.spi_device_tpm_all.3093018797 |
|
|
Feb 29 01:35:56 PM PST 24 |
Feb 29 01:36:31 PM PST 24 |
28625027830 ps |
T914 |
/workspace/coverage/default/37.spi_device_mailbox.3452310973 |
|
|
Feb 29 01:38:53 PM PST 24 |
Feb 29 01:39:14 PM PST 24 |
39086770478 ps |
T915 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.3759335080 |
|
|
Feb 29 01:38:17 PM PST 24 |
Feb 29 01:38:18 PM PST 24 |
112271463 ps |
T916 |
/workspace/coverage/default/14.spi_device_tpm_rw.3172898631 |
|
|
Feb 29 01:37:13 PM PST 24 |
Feb 29 01:37:15 PM PST 24 |
19378329 ps |
T917 |
/workspace/coverage/default/15.spi_device_mailbox.1161077006 |
|
|
Feb 29 01:37:24 PM PST 24 |
Feb 29 01:37:31 PM PST 24 |
451851478 ps |
T918 |
/workspace/coverage/default/45.spi_device_tpm_sts_read.4251701684 |
|
|
Feb 29 01:39:26 PM PST 24 |
Feb 29 01:39:27 PM PST 24 |
308094096 ps |
T919 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.3145389687 |
|
|
Feb 29 01:39:04 PM PST 24 |
Feb 29 01:39:11 PM PST 24 |
4652913207 ps |
T920 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.1804823493 |
|
|
Feb 29 01:37:56 PM PST 24 |
Feb 29 01:38:03 PM PST 24 |
695937860 ps |
T921 |
/workspace/coverage/default/22.spi_device_csb_read.2722715696 |
|
|
Feb 29 01:37:53 PM PST 24 |
Feb 29 01:37:54 PM PST 24 |
34819259 ps |
T922 |
/workspace/coverage/default/37.spi_device_alert_test.983014597 |
|
|
Feb 29 01:38:50 PM PST 24 |
Feb 29 01:38:51 PM PST 24 |
20420763 ps |
T923 |
/workspace/coverage/default/24.spi_device_flash_all.2512215918 |
|
|
Feb 29 01:37:56 PM PST 24 |
Feb 29 01:39:39 PM PST 24 |
133710533142 ps |
T924 |
/workspace/coverage/default/21.spi_device_alert_test.2268347480 |
|
|
Feb 29 01:37:55 PM PST 24 |
Feb 29 01:37:57 PM PST 24 |
11597641 ps |
T925 |
/workspace/coverage/default/26.spi_device_flash_and_tpm.1541972620 |
|
|
Feb 29 01:38:11 PM PST 24 |
Feb 29 01:40:24 PM PST 24 |
74346521374 ps |
T926 |
/workspace/coverage/default/47.spi_device_upload.3142427636 |
|
|
Feb 29 01:39:38 PM PST 24 |
Feb 29 01:39:54 PM PST 24 |
12775504007 ps |
T927 |
/workspace/coverage/default/15.spi_device_stress_all.2544384804 |
|
|
Feb 29 01:37:28 PM PST 24 |
Feb 29 01:37:29 PM PST 24 |
31153036 ps |
T928 |
/workspace/coverage/default/1.spi_device_mem_parity.2701479087 |
|
|
Feb 29 01:35:53 PM PST 24 |
Feb 29 01:35:54 PM PST 24 |
26072154 ps |
T929 |
/workspace/coverage/default/28.spi_device_mailbox.3808235623 |
|
|
Feb 29 01:38:17 PM PST 24 |
Feb 29 01:38:25 PM PST 24 |
5043883337 ps |
T930 |
/workspace/coverage/default/38.spi_device_alert_test.3839829194 |
|
|
Feb 29 01:39:01 PM PST 24 |
Feb 29 01:39:03 PM PST 24 |
17767994 ps |
T931 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.1745249122 |
|
|
Feb 29 01:37:12 PM PST 24 |
Feb 29 01:37:15 PM PST 24 |
432925143 ps |
T932 |
/workspace/coverage/default/25.spi_device_cfg_cmd.282513131 |
|
|
Feb 29 01:38:08 PM PST 24 |
Feb 29 01:38:15 PM PST 24 |
6291874116 ps |
T933 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.888153428 |
|
|
Feb 29 01:39:14 PM PST 24 |
Feb 29 01:39:17 PM PST 24 |
1263897653 ps |
T934 |
/workspace/coverage/default/37.spi_device_stress_all.1492614229 |
|
|
Feb 29 01:38:55 PM PST 24 |
Feb 29 01:39:49 PM PST 24 |
27821211039 ps |
T935 |
/workspace/coverage/default/24.spi_device_cfg_cmd.3159153548 |
|
|
Feb 29 01:37:56 PM PST 24 |
Feb 29 01:38:00 PM PST 24 |
832568790 ps |
T936 |
/workspace/coverage/default/11.spi_device_tpm_all.962729765 |
|
|
Feb 29 01:36:56 PM PST 24 |
Feb 29 01:37:06 PM PST 24 |
1322459612 ps |
T937 |
/workspace/coverage/default/8.spi_device_mem_parity.7032652 |
|
|
Feb 29 01:36:34 PM PST 24 |
Feb 29 01:36:35 PM PST 24 |
49821459 ps |
T938 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3836712850 |
|
|
Feb 29 01:37:29 PM PST 24 |
Feb 29 01:37:34 PM PST 24 |
590874410 ps |
T939 |
/workspace/coverage/default/15.spi_device_upload.3094463915 |
|
|
Feb 29 01:37:28 PM PST 24 |
Feb 29 01:37:36 PM PST 24 |
4055872504 ps |
T940 |
/workspace/coverage/default/16.spi_device_ram_cfg.2209440756 |
|
|
Feb 29 01:37:29 PM PST 24 |
Feb 29 01:37:30 PM PST 24 |
18847815 ps |
T941 |
/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.1985339765 |
|
|
Feb 29 01:35:58 PM PST 24 |
Feb 29 01:36:19 PM PST 24 |
7535553357 ps |
T942 |
/workspace/coverage/default/17.spi_device_tpm_sts_read.3141282212 |
|
|
Feb 29 01:37:31 PM PST 24 |
Feb 29 01:37:32 PM PST 24 |
78418657 ps |
T943 |
/workspace/coverage/default/31.spi_device_stress_all.39463018 |
|
|
Feb 29 01:38:28 PM PST 24 |
Feb 29 01:38:29 PM PST 24 |
52328899 ps |
T944 |
/workspace/coverage/default/40.spi_device_alert_test.4006619382 |
|
|
Feb 29 01:39:03 PM PST 24 |
Feb 29 01:39:04 PM PST 24 |
41654331 ps |
T945 |
/workspace/coverage/default/32.spi_device_tpm_rw.1441044029 |
|
|
Feb 29 01:38:31 PM PST 24 |
Feb 29 01:38:33 PM PST 24 |
90386258 ps |
T946 |
/workspace/coverage/default/29.spi_device_csb_read.3270296949 |
|
|
Feb 29 01:38:16 PM PST 24 |
Feb 29 01:38:17 PM PST 24 |
30566679 ps |
T947 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.292414199 |
|
|
Feb 29 01:37:39 PM PST 24 |
Feb 29 01:37:40 PM PST 24 |
104115969 ps |
T948 |
/workspace/coverage/default/6.spi_device_flash_all.3591270524 |
|
|
Feb 29 01:36:28 PM PST 24 |
Feb 29 01:36:53 PM PST 24 |
20758958233 ps |
T949 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.1325454672 |
|
|
Feb 29 01:39:19 PM PST 24 |
Feb 29 01:39:36 PM PST 24 |
20249220408 ps |
T950 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.3727270041 |
|
|
Feb 29 01:37:58 PM PST 24 |
Feb 29 01:38:00 PM PST 24 |
443132993 ps |
T951 |
/workspace/coverage/default/27.spi_device_tpm_all.2605341512 |
|
|
Feb 29 01:38:09 PM PST 24 |
Feb 29 01:38:46 PM PST 24 |
4755999377 ps |
T952 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.381862076 |
|
|
Feb 29 01:39:04 PM PST 24 |
Feb 29 01:39:14 PM PST 24 |
5711816025 ps |
T953 |
/workspace/coverage/default/3.spi_device_cfg_cmd.3799664735 |
|
|
Feb 29 01:36:12 PM PST 24 |
Feb 29 01:36:24 PM PST 24 |
14103413055 ps |
T954 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.1512015884 |
|
|
Feb 29 01:37:23 PM PST 24 |
Feb 29 01:37:26 PM PST 24 |
1644029955 ps |
T955 |
/workspace/coverage/default/22.spi_device_intercept.3295868322 |
|
|
Feb 29 01:37:55 PM PST 24 |
Feb 29 01:38:00 PM PST 24 |
194657324 ps |
T273 |
/workspace/coverage/default/40.spi_device_stress_all.3453921330 |
|
|
Feb 29 01:39:03 PM PST 24 |
Feb 29 01:59:53 PM PST 24 |
872137338430 ps |
T956 |
/workspace/coverage/default/39.spi_device_alert_test.4145978611 |
|
|
Feb 29 01:39:03 PM PST 24 |
Feb 29 01:39:04 PM PST 24 |
49877096 ps |
T957 |
/workspace/coverage/default/20.spi_device_flash_all.1059357864 |
|
|
Feb 29 01:37:39 PM PST 24 |
Feb 29 01:39:54 PM PST 24 |
110894497897 ps |
T958 |
/workspace/coverage/default/43.spi_device_flash_and_tpm.748342378 |
|
|
Feb 29 01:39:14 PM PST 24 |
Feb 29 01:46:23 PM PST 24 |
56512301926 ps |
T959 |
/workspace/coverage/default/19.spi_device_mem_parity.647081753 |
|
|
Feb 29 01:37:40 PM PST 24 |
Feb 29 01:37:42 PM PST 24 |
28439470 ps |
T960 |
/workspace/coverage/default/21.spi_device_csb_read.532971935 |
|
|
Feb 29 01:37:39 PM PST 24 |
Feb 29 01:37:40 PM PST 24 |
48127791 ps |
T961 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.2959372284 |
|
|
Feb 29 01:39:40 PM PST 24 |
Feb 29 01:44:22 PM PST 24 |
92235461261 ps |
T962 |
/workspace/coverage/default/21.spi_device_mailbox.1229126401 |
|
|
Feb 29 01:37:43 PM PST 24 |
Feb 29 01:38:14 PM PST 24 |
30113167059 ps |
T963 |
/workspace/coverage/default/24.spi_device_mailbox.3545414022 |
|
|
Feb 29 01:37:57 PM PST 24 |
Feb 29 01:38:07 PM PST 24 |
8937192242 ps |
T964 |
/workspace/coverage/default/30.spi_device_tpm_rw.2669412415 |
|
|
Feb 29 01:38:29 PM PST 24 |
Feb 29 01:38:32 PM PST 24 |
767590040 ps |
T965 |
/workspace/coverage/default/11.spi_device_pass_cmd_filtering.2244743561 |
|
|
Feb 29 01:36:52 PM PST 24 |
Feb 29 01:37:10 PM PST 24 |
24950707198 ps |
T966 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.2859161794 |
|
|
Feb 29 01:37:28 PM PST 24 |
Feb 29 01:37:32 PM PST 24 |
1409271552 ps |
T967 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.2834958219 |
|
|
Feb 29 01:37:53 PM PST 24 |
Feb 29 01:37:54 PM PST 24 |
125863439 ps |
T968 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.956812222 |
|
|
Feb 29 01:39:30 PM PST 24 |
Feb 29 01:39:31 PM PST 24 |
304947760 ps |
T969 |
/workspace/coverage/default/2.spi_device_mailbox.225958024 |
|
|
Feb 29 01:36:01 PM PST 24 |
Feb 29 01:36:15 PM PST 24 |
4723316948 ps |
T970 |
/workspace/coverage/default/17.spi_device_tpm_all.1694754395 |
|
|
Feb 29 01:37:28 PM PST 24 |
Feb 29 01:37:41 PM PST 24 |
2345080994 ps |
T971 |
/workspace/coverage/default/14.spi_device_tpm_all.3170637323 |
|
|
Feb 29 01:37:12 PM PST 24 |
Feb 29 01:37:58 PM PST 24 |
110156127341 ps |
T972 |
/workspace/coverage/default/32.spi_device_flash_mode.4170601665 |
|
|
Feb 29 01:38:31 PM PST 24 |
Feb 29 01:38:42 PM PST 24 |
1904630437 ps |
T261 |
/workspace/coverage/default/13.spi_device_stress_all.1561574390 |
|
|
Feb 29 01:37:00 PM PST 24 |
Feb 29 01:47:15 PM PST 24 |
70936687864 ps |
T973 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.2215454138 |
|
|
Feb 29 01:38:28 PM PST 24 |
Feb 29 01:38:39 PM PST 24 |
1241279662 ps |
T974 |
/workspace/coverage/default/37.spi_device_tpm_all.1837551397 |
|
|
Feb 29 01:38:52 PM PST 24 |
Feb 29 01:39:13 PM PST 24 |
2815703846 ps |
T975 |
/workspace/coverage/default/8.spi_device_alert_test.1717012966 |
|
|
Feb 29 01:36:43 PM PST 24 |
Feb 29 01:36:44 PM PST 24 |
23600640 ps |
T976 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.2619352867 |
|
|
Feb 29 01:38:24 PM PST 24 |
Feb 29 01:38:36 PM PST 24 |
21174754782 ps |
T977 |
/workspace/coverage/default/10.spi_device_csb_read.3571976729 |
|
|
Feb 29 01:36:48 PM PST 24 |
Feb 29 01:36:49 PM PST 24 |
34577440 ps |
T978 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.2748287298 |
|
|
Feb 29 01:36:28 PM PST 24 |
Feb 29 01:36:34 PM PST 24 |
9858565155 ps |
T979 |
/workspace/coverage/default/17.spi_device_intercept.1989407520 |
|
|
Feb 29 01:37:25 PM PST 24 |
Feb 29 01:37:29 PM PST 24 |
352626785 ps |
T980 |
/workspace/coverage/default/43.spi_device_alert_test.1887327923 |
|
|
Feb 29 01:39:15 PM PST 24 |
Feb 29 01:39:16 PM PST 24 |
18602067 ps |
T981 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3108029346 |
|
|
Feb 29 01:38:24 PM PST 24 |
Feb 29 01:38:33 PM PST 24 |
697597079 ps |
T982 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.3946343746 |
|
|
Feb 29 01:37:53 PM PST 24 |
Feb 29 01:38:18 PM PST 24 |
19232915296 ps |
T282 |
/workspace/coverage/default/39.spi_device_flash_and_tpm.114615176 |
|
|
Feb 29 01:39:02 PM PST 24 |
Feb 29 01:39:48 PM PST 24 |
12849239415 ps |
T983 |
/workspace/coverage/default/28.spi_device_upload.906684128 |
|
|
Feb 29 01:38:20 PM PST 24 |
Feb 29 01:38:50 PM PST 24 |
9856280689 ps |
T984 |
/workspace/coverage/default/5.spi_device_flash_and_tpm.3861352449 |
|
|
Feb 29 01:36:29 PM PST 24 |
Feb 29 01:39:09 PM PST 24 |
189272882681 ps |
T985 |
/workspace/coverage/default/19.spi_device_intercept.4040539454 |
|
|
Feb 29 01:37:40 PM PST 24 |
Feb 29 01:37:44 PM PST 24 |
1540805399 ps |
T986 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.56151776 |
|
|
Feb 29 01:36:32 PM PST 24 |
Feb 29 01:36:33 PM PST 24 |
56925611 ps |
T987 |
/workspace/coverage/default/25.spi_device_alert_test.3191593173 |
|
|
Feb 29 01:38:03 PM PST 24 |
Feb 29 01:38:05 PM PST 24 |
22069982 ps |
T279 |
/workspace/coverage/default/3.spi_device_flash_and_tpm.3207721792 |
|
|
Feb 29 01:36:10 PM PST 24 |
Feb 29 01:40:14 PM PST 24 |
31300271411 ps |
T988 |
/workspace/coverage/default/10.spi_device_cfg_cmd.1613492678 |
|
|
Feb 29 01:36:45 PM PST 24 |
Feb 29 01:36:48 PM PST 24 |
80967548 ps |
T989 |
/workspace/coverage/default/42.spi_device_read_buffer_direct.534679437 |
|
|
Feb 29 01:39:16 PM PST 24 |
Feb 29 01:39:19 PM PST 24 |
755489479 ps |
T990 |
/workspace/coverage/default/30.spi_device_alert_test.1111470392 |
|
|
Feb 29 01:38:29 PM PST 24 |
Feb 29 01:38:30 PM PST 24 |
23287512 ps |
T991 |
/workspace/coverage/default/33.spi_device_csb_read.3267597622 |
|
|
Feb 29 01:38:42 PM PST 24 |
Feb 29 01:38:44 PM PST 24 |
119643068 ps |
T992 |
/workspace/coverage/default/1.spi_device_ram_cfg.2169246654 |
|
|
Feb 29 01:35:53 PM PST 24 |
Feb 29 01:35:53 PM PST 24 |
29997441 ps |
T993 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.3262781083 |
|
|
Feb 29 01:36:58 PM PST 24 |
Feb 29 01:37:03 PM PST 24 |
3563896679 ps |
T994 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.1428280900 |
|
|
Feb 29 01:38:44 PM PST 24 |
Feb 29 01:38:58 PM PST 24 |
2847962151 ps |
T995 |
/workspace/coverage/default/1.spi_device_flash_all.3907711279 |
|
|
Feb 29 01:35:57 PM PST 24 |
Feb 29 01:39:22 PM PST 24 |
146216319302 ps |
T996 |
/workspace/coverage/default/20.spi_device_tpm_rw.461620781 |
|
|
Feb 29 01:37:42 PM PST 24 |
Feb 29 01:37:45 PM PST 24 |
80256042 ps |
T997 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.771176747 |
|
|
Feb 29 01:00:36 PM PST 24 |
Feb 29 01:00:37 PM PST 24 |
11293349 ps |
T998 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.2832112951 |
|
|
Feb 29 01:00:35 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
15133325 ps |
T131 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3751764044 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:32 PM PST 24 |
325977437 ps |
T85 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.3062870636 |
|
|
Feb 29 01:00:33 PM PST 24 |
Feb 29 01:00:40 PM PST 24 |
111710509 ps |
T999 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.4180271436 |
|
|
Feb 29 01:00:28 PM PST 24 |
Feb 29 01:00:29 PM PST 24 |
65217093 ps |
T1000 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.639474310 |
|
|
Feb 29 01:00:31 PM PST 24 |
Feb 29 01:00:32 PM PST 24 |
45312312 ps |
T111 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.748599350 |
|
|
Feb 29 01:00:32 PM PST 24 |
Feb 29 01:00:33 PM PST 24 |
57648470 ps |
T1001 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.440240111 |
|
|
Feb 29 01:00:17 PM PST 24 |
Feb 29 01:00:18 PM PST 24 |
16596508 ps |
T86 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1371244313 |
|
|
Feb 29 01:00:34 PM PST 24 |
Feb 29 01:00:37 PM PST 24 |
93132626 ps |
T87 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2626729182 |
|
|
Feb 29 01:00:31 PM PST 24 |
Feb 29 01:00:34 PM PST 24 |
59750701 ps |
T89 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.3000319965 |
|
|
Feb 29 01:00:32 PM PST 24 |
Feb 29 01:00:43 PM PST 24 |
424746449 ps |
T112 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2647701484 |
|
|
Feb 29 01:00:13 PM PST 24 |
Feb 29 01:00:27 PM PST 24 |
2541060506 ps |
T88 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1590949899 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:35 PM PST 24 |
327227903 ps |
T1002 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.3633475917 |
|
|
Feb 29 01:00:34 PM PST 24 |
Feb 29 01:00:35 PM PST 24 |
16155569 ps |
T106 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2536741623 |
|
|
Feb 29 01:00:16 PM PST 24 |
Feb 29 01:00:19 PM PST 24 |
402657714 ps |
T113 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.2335961300 |
|
|
Feb 29 01:00:11 PM PST 24 |
Feb 29 01:00:13 PM PST 24 |
64241471 ps |
T1003 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.3974904955 |
|
|
Feb 29 01:00:35 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
20062665 ps |
T91 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.465441536 |
|
|
Feb 29 01:00:26 PM PST 24 |
Feb 29 01:00:29 PM PST 24 |
469897210 ps |
T114 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.2146618946 |
|
|
Feb 29 01:00:29 PM PST 24 |
Feb 29 01:00:31 PM PST 24 |
47919000 ps |
T92 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2629547195 |
|
|
Feb 29 01:00:39 PM PST 24 |
Feb 29 01:00:41 PM PST 24 |
114883128 ps |
T98 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1421399672 |
|
|
Feb 29 01:00:40 PM PST 24 |
Feb 29 01:00:44 PM PST 24 |
106367977 ps |
T1004 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.2117275197 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:31 PM PST 24 |
15368716 ps |
T132 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3412832244 |
|
|
Feb 29 01:00:15 PM PST 24 |
Feb 29 01:00:20 PM PST 24 |
900640952 ps |
T133 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3273116390 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:34 PM PST 24 |
575211443 ps |
T1005 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.2410489050 |
|
|
Feb 29 01:00:27 PM PST 24 |
Feb 29 01:00:31 PM PST 24 |
224698445 ps |
T115 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2303210507 |
|
|
Feb 29 01:00:09 PM PST 24 |
Feb 29 01:00:11 PM PST 24 |
221945795 ps |
T1006 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.2783451564 |
|
|
Feb 29 01:00:28 PM PST 24 |
Feb 29 01:00:29 PM PST 24 |
14840815 ps |
T107 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2393738821 |
|
|
Feb 29 01:00:12 PM PST 24 |
Feb 29 01:00:14 PM PST 24 |
58481231 ps |
T1007 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3017130569 |
|
|
Feb 29 01:00:31 PM PST 24 |
Feb 29 01:00:32 PM PST 24 |
27915046 ps |
T1008 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.2199868222 |
|
|
Feb 29 01:00:33 PM PST 24 |
Feb 29 01:00:34 PM PST 24 |
67910886 ps |
T1009 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1077747201 |
|
|
Feb 29 01:00:27 PM PST 24 |
Feb 29 01:00:28 PM PST 24 |
87771620 ps |
T134 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.2836342840 |
|
|
Feb 29 01:00:27 PM PST 24 |
Feb 29 01:00:32 PM PST 24 |
870819387 ps |
T1010 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2342241152 |
|
|
Feb 29 01:00:12 PM PST 24 |
Feb 29 01:00:14 PM PST 24 |
14147007 ps |
T90 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3260311299 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:43 PM PST 24 |
404804931 ps |
T108 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2502492145 |
|
|
Feb 29 01:00:31 PM PST 24 |
Feb 29 01:00:34 PM PST 24 |
144630944 ps |
T109 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.65533123 |
|
|
Feb 29 01:00:12 PM PST 24 |
Feb 29 01:00:20 PM PST 24 |
1131187426 ps |
T100 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1383411069 |
|
|
Feb 29 01:00:33 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
116405519 ps |
T161 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.4128260219 |
|
|
Feb 29 01:00:10 PM PST 24 |
Feb 29 01:00:16 PM PST 24 |
413097223 ps |
T1011 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.697647773 |
|
|
Feb 29 01:00:10 PM PST 24 |
Feb 29 01:00:11 PM PST 24 |
11428967 ps |
T153 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.95423757 |
|
|
Feb 29 01:00:29 PM PST 24 |
Feb 29 01:00:51 PM PST 24 |
807454805 ps |
T1012 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.231292752 |
|
|
Feb 29 01:00:29 PM PST 24 |
Feb 29 01:00:33 PM PST 24 |
167671804 ps |
T159 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1413374760 |
|
|
Feb 29 01:00:13 PM PST 24 |
Feb 29 01:00:27 PM PST 24 |
205063692 ps |
T1013 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.4042135683 |
|
|
Feb 29 01:00:11 PM PST 24 |
Feb 29 01:00:11 PM PST 24 |
40251099 ps |
T79 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3199937514 |
|
|
Feb 29 01:00:14 PM PST 24 |
Feb 29 01:00:15 PM PST 24 |
21889712 ps |
T116 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.968840286 |
|
|
Feb 29 01:00:30 PM PST 24 |
Feb 29 01:00:33 PM PST 24 |
68169554 ps |
T1014 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.1385839467 |
|
|
Feb 29 01:00:42 PM PST 24 |
Feb 29 01:00:43 PM PST 24 |
22628529 ps |
T1015 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2692249753 |
|
|
Feb 29 01:00:35 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
28569900 ps |
T1016 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.3101329417 |
|
|
Feb 29 01:00:29 PM PST 24 |
Feb 29 01:00:33 PM PST 24 |
152576698 ps |
T95 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.4213308881 |
|
|
Feb 29 01:00:12 PM PST 24 |
Feb 29 01:00:17 PM PST 24 |
60378839 ps |
T117 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2428873732 |
|
|
Feb 29 01:00:13 PM PST 24 |
Feb 29 01:00:15 PM PST 24 |
21792451 ps |
T1017 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.201956875 |
|
|
Feb 29 01:00:12 PM PST 24 |
Feb 29 01:00:13 PM PST 24 |
23788262 ps |
T1018 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2593516455 |
|
|
Feb 29 01:00:11 PM PST 24 |
Feb 29 01:00:16 PM PST 24 |
1846662094 ps |
T80 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.1909904060 |
|
|
Feb 29 01:00:16 PM PST 24 |
Feb 29 01:00:18 PM PST 24 |
77198147 ps |
T1019 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.19454925 |
|
|
Feb 29 01:00:35 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
23455259 ps |
T157 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3239265921 |
|
|
Feb 29 01:00:09 PM PST 24 |
Feb 29 01:00:22 PM PST 24 |
788982844 ps |
T102 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2876786956 |
|
|
Feb 29 01:00:33 PM PST 24 |
Feb 29 01:00:36 PM PST 24 |
208453509 ps |
T1020 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1502987651 |
|
|
Feb 29 01:00:07 PM PST 24 |
Feb 29 01:00:12 PM PST 24 |
149088724 ps |
T1021 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1772317948 |
|
|
Feb 29 01:00:33 PM PST 24 |
Feb 29 01:00:37 PM PST 24 |
235981945 ps |
T1022 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.3352214183 |
|
|
Feb 29 01:00:32 PM PST 24 |
Feb 29 01:00:33 PM PST 24 |
21046811 ps |
T1023 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1474145449 |
|
|
Feb 29 01:00:35 PM PST 24 |
Feb 29 01:00:39 PM PST 24 |
181527625 ps |
T135 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.124626525 |
|
|
Feb 29 01:00:27 PM PST 24 |
Feb 29 01:00:51 PM PST 24 |
2344028875 ps |