Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
91.69	94.25	84.31	96.94		87.50	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	1280856937	6799	0	0
addr_swap_data_rd_A	1280856937	4137	0	0
addr_swap_mask_rd_A	1280856937	4262	0	0
cfg_rd_A	1280856937	5109	0	0
cmd_filter_0_rd_A	1280856937	18683	0	0
cmd_filter_1_rd_A	1280856937	16969	0	0
cmd_filter_2_rd_A	1280856937	16641	0	0
cmd_filter_3_rd_A	1280856937	18139	0	0
cmd_filter_4_rd_A	1280856937	18164	0	0
cmd_filter_5_rd_A	1280856937	16680	0	0
cmd_filter_6_rd_A	1280856937	17554	0	0
cmd_filter_7_rd_A	1280856937	16464	0	0
cmd_info_0_rd_A	1280856937	9317	0	0
cmd_info_10_rd_A	1280856937	9429	0	0
cmd_info_11_rd_A	1280856937	9758	0	0
cmd_info_12_rd_A	1280856937	9083	0	0
cmd_info_13_rd_A	1280856937	9650	0	0
cmd_info_14_rd_A	1280856937	9704	0	0
cmd_info_15_rd_A	1280856937	9700	0	0
cmd_info_16_rd_A	1280856937	9608	0	0
cmd_info_17_rd_A	1280856937	9650	0	0
cmd_info_18_rd_A	1280856937	9290	0	0
cmd_info_19_rd_A	1280856937	9693	0	0
cmd_info_1_rd_A	1280856937	10111	0	0
cmd_info_20_rd_A	1280856937	8964	0	0
cmd_info_21_rd_A	1280856937	9881	0	0
cmd_info_22_rd_A	1280856937	9597	0	0
cmd_info_23_rd_A	1280856937	8889	0	0
cmd_info_2_rd_A	1280856937	9104	0	0
cmd_info_3_rd_A	1280856937	9237	0	0
cmd_info_4_rd_A	1280856937	9658	0	0
cmd_info_5_rd_A	1280856937	9829	0	0
cmd_info_6_rd_A	1280856937	9760	0	0
cmd_info_7_rd_A	1280856937	10123	0	0
cmd_info_8_rd_A	1280856937	9524	0	0
cmd_info_9_rd_A	1280856937	9331	0	0
cmd_info_en4b_rd_A	1280856937	4607	0	0
cmd_info_ex4b_rd_A	1280856937	4934	0	0
cmd_info_wrdi_rd_A	1280856937	4779	0	0
cmd_info_wren_rd_A	1280856937	4738	0	0
intercept_en_rd_A	1280856937	5494	0	0
intr_enable_rd_A	1280856937	8977	0	0
jedec_cc_rd_A	1280856937	4790	0	0
jedec_id_rd_A	1280856937	4800	0	0
mailbox_addr_rd_A	1280856937	4301	0	0
payload_swap_data_rd_A	1280856937	4210	0	0
payload_swap_mask_rd_A	1280856937	4014	0	0
read_threshold_rd_A	1280856937	4361	0	0
tpm_access_0_rd_A	1280856937	5418	0	0
tpm_access_1_rd_A	1280856937	4445	0	0
tpm_cfg_rd_A	1280856937	6164	0	0
tpm_did_vid_rd_A	1280856937	4693	0	0
tpm_int_enable_rd_A	1280856937	4110	0	0
tpm_int_status_rd_A	1280856937	4301	0	0
tpm_int_vector_rd_A	1280856937	4087	0	0
tpm_intf_capability_rd_A	1280856937	4422	0	0
tpm_rid_rd_A	1280856937	4414	0	0
tpm_sts_rd_A	1280856937	4045	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	6799	0	0
T102	5014	3	0	0
T103	1680	7	0	0
T104	29365	8	0	0
T105	4575	174	0	0
T106	19147	5	0	0
T107	28435	1	0	0
T108	4379	42	0	0
T109	10924	184	0	0
T122	13418	2	0	0
T126	2631	2	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4137	0	0
T88	3259	7	0	0
T89	4997	5	0	0
T123	9839	16	0	0
T130	7685	2	0	0
T150	4071	6	0	0
T151	19633	57	0	0
T152	16945	39	0	0
T153	5444	7	0	0
T154	42538	278	0	0
T155	12141	22	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4262	0	0
T88	3259	14	0	0
T89	4997	6	0	0
T123	9839	17	0	0
T137	4375	9	0	0
T150	4071	3	0	0
T151	19633	97	0	0
T152	16945	51	0	0
T153	5444	7	0	0
T154	42538	272	0	0
T155	12141	13	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	5109	0	0
T88	3259	13	0	0
T89	4997	12	0	0
T123	9839	9	0	0
T130	7685	11	0	0
T150	4071	5	0	0
T151	19633	80	0	0
T152	16945	18	0	0
T153	5444	4	0	0
T154	42538	244	0	0
T155	12141	17	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	18683	0	0
T88	3259	8	0	0
T89	4997	11	0	0
T123	9839	102	0	0
T130	7685	50	0	0
T150	4071	2	0	0
T151	19633	93	0	0
T152	16945	13	0	0
T153	5444	85	0	0
T154	42538	280	0	0
T155	12141	29	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	16969	0	0
T88	3259	13	0	0
T89	4997	20	0	0
T123	9839	107	0	0
T130	7685	54	0	0
T137	4375	133	0	0
T150	4071	121	0	0
T151	19633	70	0	0
T152	16945	53	0	0
T154	42538	250	0	0
T155	12141	32	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	16641	0	0
T88	3259	1	0	0
T89	4997	7	0	0
T123	9839	121	0	0
T130	7685	74	0	0
T150	4071	8	0	0
T151	19633	108	0	0
T152	16945	16	0	0
T153	5444	68	0	0
T154	42538	254	0	0
T155	12141	31	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	18139	0	0
T88	3259	5	0	0
T89	4997	11	0	0
T123	9839	16	0	0
T130	7685	74	0	0
T150	4071	5	0	0
T151	19633	48	0	0
T152	16945	43	0	0
T153	5444	7	0	0
T154	42538	301	0	0
T155	12141	28	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	18164	0	0
T88	3259	14	0	0
T89	4997	17	0	0
T123	9839	133	0	0
T130	7685	144	0	0
T150	4071	143	0	0
T151	19633	43	0	0
T152	16945	64	0	0
T153	5444	90	0	0
T154	42538	263	0	0
T155	12141	5	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	16680	0	0
T88	3259	5	0	0
T89	4997	2	0	0
T123	9839	9	0	0
T130	7685	38	0	0
T137	4375	123	0	0
T151	19633	54	0	0
T152	16945	41	0	0
T153	5444	13	0	0
T154	42538	292	0	0
T155	12141	30	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	17554	0	0
T89	4997	18	0	0
T116	9708	85	0	0
T123	9839	219	0	0
T130	7685	160	0	0
T137	4375	104	0	0
T151	19633	37	0	0
T152	16945	6	0	0
T153	5444	4	0	0
T154	42538	278	0	0
T155	12141	12	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	16464	0	0
T88	3259	11	0	0
T89	4997	12	0	0
T109	10924	8	0	0
T123	9839	203	0	0
T130	7685	149	0	0
T150	4071	138	0	0
T151	19633	77	0	0
T152	16945	32	0	0
T153	5444	57	0	0
T154	42538	269	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9317	0	0
T88	3259	6	0	0
T89	4997	9	0	0
T123	9839	103	0	0
T130	7685	54	0	0
T150	4071	50	0	0
T151	19633	93	0	0
T152	16945	32	0	0
T153	5444	20	0	0
T154	42538	284	0	0
T155	12141	12	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9429	0	0
T88	3259	4	0	0
T89	4997	10	0	0
T123	9839	18	0	0
T130	7685	70	0	0
T150	4071	3	0	0
T151	19633	80	0	0
T152	16945	33	0	0
T153	5444	21	0	0
T154	42538	240	0	0
T155	12141	20	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9758	0	0
T88	3259	13	0	0
T89	4997	19	0	0
T123	9839	56	0	0
T130	7685	9	0	0
T150	4071	78	0	0
T151	19633	29	0	0
T152	16945	35	0	0
T153	5444	32	0	0
T154	42538	247	0	0
T155	12141	59	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9083	0	0
T88	3259	8	0	0
T89	4997	11	0	0
T123	9839	8	0	0
T137	4375	2	0	0
T150	4071	72	0	0
T151	19633	57	0	0
T152	16945	78	0	0
T153	5444	31	0	0
T154	42538	277	0	0
T155	12141	34	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9650	0	0
T88	3259	10	0	0
T89	4997	8	0	0
T123	9839	19	0	0
T130	7685	34	0	0
T137	4375	1	0	0
T150	4071	52	0	0
T151	19633	46	0	0
T152	16945	24	0	0
T154	42538	259	0	0
T155	12141	10	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9704	0	0
T88	3259	7	0	0
T89	4997	7	0	0
T123	9839	78	0	0
T130	7685	43	0	0
T150	4071	9	0	0
T151	19633	56	0	0
T152	16945	25	0	0
T153	5444	3	0	0
T154	42538	242	0	0
T155	12141	48	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9700	0	0
T88	3259	10	0	0
T89	4997	4	0	0
T123	9839	117	0	0
T130	7685	11	0	0
T150	4071	1	0	0
T151	19633	36	0	0
T152	16945	15	0	0
T153	5444	14	0	0
T154	42538	269	0	0
T155	12141	45	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9608	0	0
T88	3259	4	0	0
T89	4997	13	0	0
T123	9839	11	0	0
T130	7685	39	0	0
T150	4071	1	0	0
T151	19633	59	0	0
T152	16945	84	0	0
T153	5444	9	0	0
T154	42538	249	0	0
T155	12141	5	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9650	0	0
T88	3259	11	0	0
T89	4997	25	0	0
T123	9839	20	0	0
T130	7685	30	0	0
T150	4071	55	0	0
T151	19633	80	0	0
T152	16945	32	0	0
T153	5444	17	0	0
T154	42538	259	0	0
T155	12141	49	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9290	0	0
T88	3259	6	0	0
T89	4997	9	0	0
T123	9839	15	0	0
T130	7685	37	0	0
T150	4071	50	0	0
T151	19633	65	0	0
T152	16945	39	0	0
T153	5444	30	0	0
T154	42538	252	0	0
T155	12141	41	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9693	0	0
T88	3259	12	0	0
T89	4997	17	0	0
T109	10924	4	0	0
T123	9839	12	0	0
T130	7685	44	0	0
T150	4071	62	0	0
T151	19633	85	0	0
T152	16945	22	0	0
T154	42538	286	0	0
T155	12141	27	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	10111	0	0
T88	3259	4	0	0
T89	4997	5	0	0
T123	9839	63	0	0
T130	7685	6	0	0
T150	4071	65	0	0
T151	19633	59	0	0
T152	16945	67	0	0
T153	5444	38	0	0
T154	42538	244	0	0
T155	12141	25	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	8964	0	0
T88	3259	14	0	0
T89	4997	8	0	0
T123	9839	9	0	0
T130	7685	36	0	0
T150	4071	5	0	0
T151	19633	42	0	0
T152	16945	41	0	0
T153	5444	26	0	0
T154	42538	257	0	0
T155	12141	41	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9881	0	0
T88	3259	11	0	0
T89	4997	5	0	0
T123	9839	46	0	0
T130	7685	50	0	0
T150	4071	58	0	0
T151	19633	95	0	0
T152	16945	57	0	0
T153	5444	35	0	0
T154	42538	247	0	0
T155	12141	27	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9597	0	0
T88	3259	10	0	0
T89	4997	11	0	0
T123	9839	64	0	0
T130	7685	14	0	0
T137	4375	36	0	0
T151	19633	50	0	0
T152	16945	23	0	0
T153	5444	9	0	0
T154	42538	249	0	0
T155	12141	13	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	8889	0	0
T88	3259	3	0	0
T89	4997	15	0	0
T123	9839	61	0	0
T137	4375	4	0	0
T150	4071	60	0	0
T151	19633	78	0	0
T152	16945	13	0	0
T153	5444	24	0	0
T154	42538	267	0	0
T155	12141	22	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9104	0	0
T88	3259	11	0	0
T89	4997	5	0	0
T123	9839	62	0	0
T130	7685	18	0	0
T150	4071	7	0	0
T151	19633	63	0	0
T152	16945	34	0	0
T153	5444	30	0	0
T154	42538	306	0	0
T155	12141	6	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9237	0	0
T88	3259	8	0	0
T89	4997	5	0	0
T123	9839	117	0	0
T130	7685	13	0	0
T150	4071	70	0	0
T151	19633	77	0	0
T152	16945	24	0	0
T153	5444	1	0	0
T154	42538	293	0	0
T155	12141	8	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9658	0	0
T88	3259	4	0	0
T89	4997	18	0	0
T123	9839	15	0	0
T130	7685	11	0	0
T137	4375	3	0	0
T150	4071	5	0	0
T151	19633	48	0	0
T152	16945	46	0	0
T154	42538	228	0	0
T155	12141	4	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9829	0	0
T88	3259	11	0	0
T89	4997	9	0	0
T123	9839	76	0	0
T130	7685	32	0	0
T150	4071	42	0	0
T151	19633	68	0	0
T152	16945	41	0	0
T153	5444	34	0	0
T154	42538	272	0	0
T155	12141	44	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9760	0	0
T88	3259	12	0	0
T89	4997	6	0	0
T123	9839	47	0	0
T130	7685	22	0	0
T150	4071	5	0	0
T151	19633	55	0	0
T152	16945	48	0	0
T153	5444	4	0	0
T154	42538	233	0	0
T155	12141	10	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	10123	0	0
T88	3259	11	0	0
T89	4997	6	0	0
T123	9839	86	0	0
T130	7685	47	0	0
T137	4375	47	0	0
T151	19633	105	0	0
T152	16945	50	0	0
T153	5444	39	0	0
T154	42538	278	0	0
T155	12141	14	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9524	0	0
T88	3259	8	0	0
T89	4997	4	0	0
T112	22205	3	0	0
T123	9839	53	0	0
T130	7685	16	0	0
T150	4071	4	0	0
T151	19633	79	0	0
T152	16945	59	0	0
T153	5444	26	0	0
T154	42538	263	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	9331	0	0
T88	3259	10	0	0
T89	4997	16	0	0
T123	9839	13	0	0
T130	7685	51	0	0
T137	4375	9	0	0
T150	4071	57	0	0
T151	19633	80	0	0
T152	16945	10	0	0
T154	42538	273	0	0
T155	12141	34	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4607	0	0
T88	3259	11	0	0
T89	4997	15	0	0
T123	9839	15	0	0
T130	7685	9	0	0
T150	4071	5	0	0
T151	19633	50	0	0
T152	16945	69	0	0
T153	5444	3	0	0
T154	42538	276	0	0
T155	12141	18	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4934	0	0
T88	3259	5	0	0
T89	4997	16	0	0
T123	9839	18	0	0
T130	7685	13	0	0
T150	4071	7	0	0
T151	19633	28	0	0
T152	16945	48	0	0
T153	5444	17	0	0
T154	42538	332	0	0
T155	12141	67	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4779	0	0
T88	3259	1	0	0
T89	4997	10	0	0
T123	9839	13	0	0
T130	7685	11	0	0
T150	4071	3	0	0
T151	19633	93	0	0
T152	16945	22	0	0
T153	5444	9	0	0
T154	42538	285	0	0
T155	12141	30	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4738	0	0
T88	3259	12	0	0
T89	4997	10	0	0
T123	9839	20	0	0
T130	7685	11	0	0
T150	4071	8	0	0
T151	19633	74	0	0
T152	16945	35	0	0
T153	5444	4	0	0
T154	42538	271	0	0
T155	12141	24	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	5494	0	0
T88	3259	5	0	0
T89	4997	11	0	0
T123	9839	19	0	0
T130	7685	11	0	0
T137	4375	14	0	0
T150	4071	1	0	0
T151	19633	51	0	0
T152	16945	22	0	0
T154	42538	281	0	0
T155	12141	20	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	8977	0	0
T8	711547	61	0	0
T9	317420	0	0	0
T10	142177	0	0	0
T11	37540	0	0	0
T12	124636	0	0	0
T13	31116	0	0	0
T14	952	0	0	0
T17	0	17	0	0
T20	0	16	0	0
T25	210598	0	0	0
T27	852016	0	0	0
T63	1268	0	0	0
T156	0	35	0	0
T157	0	30	0	0
T158	0	36	0	0
T159	0	5	0	0
T160	0	25	0	0
T161	0	28	0	0
T162	0	20	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4790	0	0
T89	4997	14	0	0
T116	9708	24	0	0
T123	9839	7	0	0
T130	7685	1	0	0
T150	4071	6	0	0
T151	19633	59	0	0
T152	16945	36	0	0
T153	5444	7	0	0
T154	42538	249	0	0
T155	12141	21	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4800	0	0
T88	3259	12	0	0
T89	4997	14	0	0
T123	9839	13	0	0
T130	7685	12	0	0
T150	4071	7	0	0
T151	19633	108	0	0
T152	16945	28	0	0
T153	5444	9	0	0
T154	42538	260	0	0
T155	12141	22	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4301	0	0
T88	3259	5	0	0
T89	4997	16	0	0
T123	9839	10	0	0
T130	7685	7	0	0
T150	4071	6	0	0
T151	19633	128	0	0
T152	16945	15	0	0
T153	5444	5	0	0
T154	42538	264	0	0
T155	12141	15	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4210	0	0
T88	3259	12	0	0
T89	4997	6	0	0
T123	9839	6	0	0
T130	7685	14	0	0
T137	4375	3	0	0
T150	4071	8	0	0
T151	19633	69	0	0
T152	16945	12	0	0
T154	42538	267	0	0
T155	12141	12	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4014	0	0
T88	3259	11	0	0
T89	4997	14	0	0
T123	9839	23	0	0
T130	7685	6	0	0
T150	4071	1	0	0
T151	19633	11	0	0
T152	16945	48	0	0
T153	5444	7	0	0
T154	42538	243	0	0
T155	12141	10	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4361	0	0
T88	3259	2	0	0
T89	4997	12	0	0
T123	9839	20	0	0
T130	7685	2	0	0
T150	4071	1	0	0
T151	19633	99	0	0
T152	16945	50	0	0
T153	5444	3	0	0
T154	42538	237	0	0
T155	12141	18	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	5418	0	0
T88	3259	11	0	0
T89	4997	11	0	0
T123	9839	46	0	0
T130	7685	1	0	0
T150	4071	7	0	0
T151	19633	67	0	0
T152	16945	33	0	0
T153	5444	7	0	0
T154	42538	264	0	0
T155	12141	33	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4445	0	0
T88	3259	10	0	0
T89	4997	5	0	0
T123	9839	15	0	0
T130	7685	9	0	0
T150	4071	3	0	0
T151	19633	79	0	0
T152	16945	18	0	0
T153	5444	12	0	0
T154	42538	265	0	0
T155	12141	10	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	6164	0	0
T88	3259	9	0	0
T89	4997	2	0	0
T112	22205	7	0	0
T123	9839	51	0	0
T130	7685	13	0	0
T150	4071	20	0	0
T151	19633	49	0	0
T152	16945	44	0	0
T153	5444	3	0	0
T154	42538	311	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4693	0	0
T88	3259	4	0	0
T89	4997	12	0	0
T123	9839	25	0	0
T137	4375	9	0	0
T150	4071	9	0	0
T151	19633	35	0	0
T152	16945	28	0	0
T153	5444	1	0	0
T154	42538	250	0	0
T155	12141	10	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4110	0	0
T88	3259	5	0	0
T89	4997	14	0	0
T123	9839	9	0	0
T130	7685	10	0	0
T137	4375	9	0	0
T151	19633	84	0	0
T152	16945	27	0	0
T153	5444	10	0	0
T154	42538	253	0	0
T155	12141	16	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4301	0	0
T88	3259	3	0	0
T89	4997	16	0	0
T116	9708	18	0	0
T123	9839	23	0	0
T150	4071	3	0	0
T151	19633	65	0	0
T152	16945	36	0	0
T153	5444	5	0	0
T154	42538	276	0	0
T155	12141	13	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4087	0	0
T88	3259	5	0	0
T89	4997	13	0	0
T123	9839	25	0	0
T130	7685	5	0	0
T150	4071	2	0	0
T151	19633	95	0	0
T152	16945	43	0	0
T153	5444	1	0	0
T154	42538	232	0	0
T155	12141	25	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4422	0	0
T88	3259	4	0	0
T89	4997	8	0	0
T123	9839	20	0	0
T130	7685	6	0	0
T150	4071	2	0	0
T151	19633	31	0	0
T152	16945	24	0	0
T153	5444	10	0	0
T154	42538	264	0	0
T155	12141	30	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4414	0	0
T88	3259	9	0	0
T89	4997	13	0	0
T112	22205	2	0	0
T123	9839	15	0	0
T130	7685	3	0	0
T151	19633	98	0	0
T152	16945	58	0	0
T153	5444	3	0	0
T154	42538	249	0	0
T155	12141	34	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1280856937	4045	0	0
T88	3259	3	0	0
T89	4997	3	0	0
T116	9708	5	0	0
T123	9839	19	0	0
T130	7685	5	0	0
T151	19633	39	0	0
T152	16945	13	0	0
T154	42538	253	0	0
T155	12141	41	0	0
T163	6295	6	0	0