Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
91.69	94.25	84.31	96.94		87.50	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	579622571	3107	0	0
addr_swap_data_rd_A	579622571	1471	0	0
addr_swap_mask_rd_A	579622571	1602	0	0
cfg_rd_A	579622571	1905	0	0
cmd_filter_0_rd_A	579622571	7948	0	0
cmd_filter_1_rd_A	579622571	8248	0	0
cmd_filter_2_rd_A	579622571	7751	0	0
cmd_filter_3_rd_A	579622571	8079	0	0
cmd_filter_4_rd_A	579622571	7633	0	0
cmd_filter_5_rd_A	579622571	8179	0	0
cmd_filter_6_rd_A	579622571	7430	0	0
cmd_filter_7_rd_A	579622571	6831	0	0
cmd_info_0_rd_A	579622571	3910	0	0
cmd_info_10_rd_A	579622571	3577	0	0
cmd_info_11_rd_A	579622571	4221	0	0
cmd_info_12_rd_A	579622571	3755	0	0
cmd_info_13_rd_A	579622571	3887	0	0
cmd_info_14_rd_A	579622571	3669	0	0
cmd_info_15_rd_A	579622571	3955	0	0
cmd_info_16_rd_A	579622571	3412	0	0
cmd_info_17_rd_A	579622571	4078	0	0
cmd_info_18_rd_A	579622571	3481	0	0
cmd_info_19_rd_A	579622571	3746	0	0
cmd_info_1_rd_A	579622571	3420	0	0
cmd_info_20_rd_A	579622571	4168	0	0
cmd_info_21_rd_A	579622571	3363	0	0
cmd_info_22_rd_A	579622571	4019	0	0
cmd_info_23_rd_A	579622571	3841	0	0
cmd_info_2_rd_A	579622571	3725	0	0
cmd_info_3_rd_A	579622571	3728	0	0
cmd_info_4_rd_A	579622571	3574	0	0
cmd_info_5_rd_A	579622571	3877	0	0
cmd_info_6_rd_A	579622571	3674	0	0
cmd_info_7_rd_A	579622571	4226	0	0
cmd_info_8_rd_A	579622571	3705	0	0
cmd_info_9_rd_A	579622571	3821	0	0
cmd_info_en4b_rd_A	579622571	1675	0	0
cmd_info_ex4b_rd_A	579622571	1733	0	0
cmd_info_wrdi_rd_A	579622571	1681	0	0
cmd_info_wren_rd_A	579622571	1632	0	0
intercept_en_rd_A	579622571	2102	0	0
intr_enable_rd_A	579622571	3750	0	0
jedec_cc_rd_A	579622571	1669	0	0
jedec_id_rd_A	579622571	1813	0	0
mailbox_addr_rd_A	579622571	1448	0	0
payload_swap_data_rd_A	579622571	1396	0	0
payload_swap_mask_rd_A	579622571	1526	0	0
read_threshold_rd_A	579622571	1458	0	0
tpm_access_0_rd_A	579622571	2145	0	0
tpm_access_1_rd_A	579622571	1418	0	0
tpm_cfg_rd_A	579622571	2286	0	0
tpm_did_vid_rd_A	579622571	1748	0	0
tpm_int_enable_rd_A	579622571	1544	0	0
tpm_int_status_rd_A	579622571	1612	0	0
tpm_int_vector_rd_A	579622571	1304	0	0
tpm_intf_capability_rd_A	579622571	1507	0	0
tpm_rid_rd_A	579622571	1502	0	0
tpm_sts_rd_A	579622571	1572	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3107	0	0
T65	18855	1	0	0
T66	4683	6	0	0
T67	18862	4	0	0
T101	8840	2	0	0
T102	2850	75	0	0
T103	79037	5	0	0
T104	9851	5	0	0
T105	14411	156	0	0
T106	5523	354	0	0
T120	29372	4	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1471	0	0
T92	4860	8	0	0
T104	9851	19	0	0
T121	6189	3	0	0
T131	6672	9	0	0
T146	18261	36	0	0
T147	3864	5	0	0
T148	12388	22	0	0
T149	66677	85	0	0
T150	15583	19	0	0
T151	14671	33	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1602	0	0
T92	4860	11	0	0
T104	9851	31	0	0
T121	6189	9	0	0
T131	6672	7	0	0
T146	18261	26	0	0
T147	3864	4	0	0
T148	12388	52	0	0
T149	66677	96	0	0
T150	15583	18	0	0
T151	14671	23	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1905	0	0
T92	4860	19	0	0
T104	9851	29	0	0
T121	6189	16	0	0
T131	6672	1	0	0
T146	18261	81	0	0
T147	3864	8	0	0
T148	12388	26	0	0
T149	66677	158	0	0
T150	15583	32	0	0
T151	14671	40	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	7948	0	0
T92	4860	12	0	0
T104	9851	251	0	0
T109	10670	3	0	0
T121	6189	11	0	0
T131	6672	110	0	0
T146	18261	53	0	0
T147	3864	4	0	0
T148	12388	30	0	0
T149	66677	1591	0	0
T150	15583	22	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	8248	0	0
T92	4860	21	0	0
T104	9851	128	0	0
T121	6189	232	0	0
T131	6672	221	0	0
T146	18261	37	0	0
T147	3864	1	0	0
T148	12388	20	0	0
T149	66677	1742	0	0
T150	15583	336	0	0
T151	14671	271	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	7751	0	0
T92	4860	13	0	0
T104	9851	246	0	0
T109	10670	4	0	0
T121	6189	97	0	0
T131	6672	108	0	0
T146	18261	10	0	0
T148	12388	34	0	0
T149	66677	1525	0	0
T150	15583	125	0	0
T151	14671	249	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	8079	0	0
T92	4860	19	0	0
T104	9851	93	0	0
T117	6463	5	0	0
T121	6189	73	0	0
T131	6672	112	0	0
T146	18261	48	0	0
T147	3864	7	0	0
T148	12388	36	0	0
T149	66677	1007	0	0
T150	15583	222	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	7633	0	0
T92	4860	8	0	0
T104	9851	132	0	0
T110	11960	2	0	0
T121	6189	103	0	0
T131	6672	117	0	0
T146	18261	41	0	0
T147	3864	2	0	0
T148	12388	5	0	0
T149	66677	1217	0	0
T150	15583	120	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	8179	0	0
T92	4860	14	0	0
T104	9851	15	0	0
T113	12618	1	0	0
T121	6189	115	0	0
T131	6672	249	0	0
T146	18261	34	0	0
T147	3864	5	0	0
T148	12388	29	0	0
T149	66677	1284	0	0
T150	15583	220	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	7430	0	0
T92	4860	13	0	0
T104	9851	118	0	0
T110	11960	1	0	0
T121	6189	9	0	0
T131	6672	115	0	0
T146	18261	22	0	0
T147	3864	6	0	0
T148	12388	14	0	0
T149	66677	1262	0	0
T150	15583	258	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	6831	0	0
T92	4860	4	0	0
T104	9851	11	0	0
T121	6189	5	0	0
T131	6672	16	0	0
T146	18261	42	0	0
T147	3864	135	0	0
T148	12388	8	0	0
T149	66677	1244	0	0
T150	15583	229	0	0
T151	14671	112	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3910	0	0
T92	4860	13	0	0
T104	9851	45	0	0
T121	6189	3	0	0
T131	6672	5	0	0
T146	18261	59	0	0
T147	3864	42	0	0
T148	12388	28	0	0
T149	66677	505	0	0
T150	15583	52	0	0
T151	14671	16	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3577	0	0
T92	4860	19	0	0
T104	9851	86	0	0
T121	6189	44	0	0
T131	6672	8	0	0
T146	18261	41	0	0
T148	12388	23	0	0
T149	66677	428	0	0
T150	15583	107	0	0
T151	14671	67	0	0
T152	69742	556	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	4221	0	0
T92	4860	15	0	0
T104	9851	114	0	0
T121	6189	106	0	0
T131	6672	64	0	0
T146	18261	57	0	0
T147	3864	5	0	0
T148	12388	11	0	0
T149	66677	551	0	0
T150	15583	50	0	0
T151	14671	118	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3755	0	0
T92	4860	11	0	0
T104	9851	68	0	0
T121	6189	31	0	0
T131	6672	50	0	0
T146	18261	38	0	0
T147	3864	42	0	0
T148	12388	18	0	0
T149	66677	462	0	0
T150	15583	38	0	0
T151	14671	72	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3887	0	0
T92	4860	11	0	0
T104	9851	58	0	0
T121	6189	92	0	0
T131	6672	43	0	0
T146	18261	24	0	0
T147	3864	8	0	0
T148	12388	17	0	0
T149	66677	594	0	0
T150	15583	169	0	0
T151	14671	107	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3669	0	0
T92	4860	15	0	0
T104	9851	68	0	0
T121	6189	50	0	0
T131	6672	67	0	0
T146	18261	20	0	0
T147	3864	2	0	0
T148	12388	4	0	0
T149	66677	578	0	0
T150	15583	95	0	0
T151	14671	60	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3955	0	0
T92	4860	15	0	0
T104	9851	23	0	0
T121	6189	9	0	0
T131	6672	50	0	0
T146	18261	51	0	0
T147	3864	2	0	0
T148	12388	8	0	0
T149	66677	594	0	0
T150	15583	83	0	0
T151	14671	52	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3412	0	0
T92	4860	9	0	0
T104	9851	49	0	0
T121	6189	8	0	0
T131	6672	3	0	0
T146	18261	31	0	0
T147	3864	39	0	0
T148	12388	5	0	0
T149	66677	529	0	0
T150	15583	56	0	0
T151	14671	56	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	4078	0	0
T92	4860	9	0	0
T104	9851	63	0	0
T121	6189	50	0	0
T131	6672	44	0	0
T146	18261	55	0	0
T147	3864	53	0	0
T148	12388	7	0	0
T149	66677	455	0	0
T150	15583	119	0	0
T151	14671	79	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3481	0	0
T92	4860	20	0	0
T104	9851	52	0	0
T121	6189	1	0	0
T131	6672	5	0	0
T146	18261	26	0	0
T148	12388	36	0	0
T149	66677	462	0	0
T150	15583	24	0	0
T151	14671	146	0	0
T152	69742	417	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3746	0	0
T92	4860	5	0	0
T104	9851	8	0	0
T121	6189	6	0	0
T131	6672	7	0	0
T146	18261	22	0	0
T148	12388	36	0	0
T149	66677	532	0	0
T150	15583	50	0	0
T151	14671	114	0	0
T152	69742	625	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3420	0	0
T92	4860	10	0	0
T104	9851	64	0	0
T121	6189	101	0	0
T131	6672	35	0	0
T146	18261	35	0	0
T148	12388	9	0	0
T149	66677	397	0	0
T150	15583	160	0	0
T151	14671	99	0	0
T152	69742	463	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	4168	0	0
T92	4860	5	0	0
T104	9851	77	0	0
T121	6189	50	0	0
T131	6672	53	0	0
T146	18261	2	0	0
T147	3864	52	0	0
T148	12388	37	0	0
T149	66677	553	0	0
T150	15583	110	0	0
T151	14671	18	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3363	0	0
T92	4860	15	0	0
T104	9851	63	0	0
T121	6189	14	0	0
T131	6672	51	0	0
T146	18261	19	0	0
T147	3864	42	0	0
T148	12388	6	0	0
T149	66677	369	0	0
T150	15583	61	0	0
T151	14671	46	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	4019	0	0
T92	4860	10	0	0
T104	9851	8	0	0
T121	6189	63	0	0
T131	6672	53	0	0
T146	18261	44	0	0
T147	3864	2	0	0
T148	12388	13	0	0
T149	66677	566	0	0
T150	15583	89	0	0
T151	14671	130	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3841	0	0
T92	4860	13	0	0
T104	9851	35	0	0
T117	6463	6	0	0
T121	6189	51	0	0
T131	6672	53	0	0
T146	18261	30	0	0
T147	3864	7	0	0
T148	12388	39	0	0
T149	66677	557	0	0
T150	15583	67	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3725	0	0
T92	4860	10	0	0
T104	9851	48	0	0
T121	6189	99	0	0
T131	6672	9	0	0
T146	18261	49	0	0
T147	3864	56	0	0
T148	12388	19	0	0
T149	66677	542	0	0
T150	15583	93	0	0
T151	14671	20	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3728	0	0
T92	4860	7	0	0
T104	9851	45	0	0
T121	6189	45	0	0
T131	6672	12	0	0
T146	18261	22	0	0
T147	3864	59	0	0
T148	12388	32	0	0
T149	66677	390	0	0
T150	15583	45	0	0
T151	14671	68	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3574	0	0
T92	4860	7	0	0
T104	9851	51	0	0
T121	6189	49	0	0
T131	6672	54	0	0
T146	18261	19	0	0
T147	3864	9	0	0
T148	12388	9	0	0
T149	66677	436	0	0
T150	15583	56	0	0
T151	14671	31	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3877	0	0
T92	4860	12	0	0
T104	9851	98	0	0
T121	6189	93	0	0
T131	6672	42	0	0
T146	18261	44	0	0
T147	3864	35	0	0
T148	12388	6	0	0
T149	66677	631	0	0
T150	15583	75	0	0
T151	14671	94	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3674	0	0
T92	4860	8	0	0
T104	9851	39	0	0
T121	6189	51	0	0
T131	6672	115	0	0
T146	18261	52	0	0
T147	3864	49	0	0
T148	12388	31	0	0
T149	66677	635	0	0
T150	15583	15	0	0
T151	14671	109	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	4226	0	0
T92	4860	10	0	0
T104	9851	47	0	0
T131	6672	9	0	0
T146	18261	40	0	0
T147	3864	48	0	0
T149	66677	495	0	0
T150	15583	58	0	0
T151	14671	170	0	0
T152	69742	639	0	0
T153	11934	9	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3705	0	0
T92	4860	10	0	0
T104	9851	43	0	0
T121	6189	8	0	0
T131	6672	54	0	0
T146	18261	21	0	0
T147	3864	5	0	0
T148	12388	10	0	0
T149	66677	456	0	0
T150	15583	141	0	0
T151	14671	136	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3821	0	0
T92	4860	8	0	0
T104	9851	47	0	0
T117	6463	6	0	0
T121	6189	77	0	0
T131	6672	104	0	0
T146	18261	11	0	0
T147	3864	45	0	0
T148	12388	35	0	0
T149	66677	539	0	0
T150	15583	61	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1675	0	0
T92	4860	10	0	0
T104	9851	23	0	0
T121	6189	15	0	0
T131	6672	7	0	0
T146	18261	48	0	0
T147	3864	3	0	0
T148	12388	41	0	0
T149	66677	99	0	0
T150	15583	30	0	0
T151	14671	32	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1733	0	0
T92	4860	14	0	0
T104	9851	18	0	0
T121	6189	19	0	0
T131	6672	13	0	0
T146	18261	38	0	0
T147	3864	7	0	0
T148	12388	31	0	0
T149	66677	99	0	0
T150	15583	34	0	0
T151	14671	15	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1681	0	0
T92	4860	11	0	0
T104	9851	23	0	0
T121	6189	13	0	0
T131	6672	2	0	0
T146	18261	44	0	0
T148	12388	3	0	0
T149	66677	137	0	0
T150	15583	30	0	0
T151	14671	33	0	0
T152	69742	115	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1632	0	0
T92	4860	10	0	0
T104	9851	31	0	0
T121	6189	16	0	0
T131	6672	20	0	0
T146	18261	17	0	0
T147	3864	8	0	0
T148	12388	25	0	0
T149	66677	121	0	0
T150	15583	28	0	0
T151	14671	18	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	2102	0	0
T92	4860	6	0	0
T104	9851	28	0	0
T121	6189	15	0	0
T131	6672	27	0	0
T146	18261	34	0	0
T148	12388	62	0	0
T149	66677	177	0	0
T150	15583	44	0	0
T151	14671	29	0	0
T152	69742	175	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	3750	0	0
T31	762134	20	0	0
T32	142501	0	0	0
T69	4545	0	0	0
T70	0	11	0	0
T80	28576	0	0	0
T81	1645	0	0	0
T82	72354	0	0	0
T83	37488	0	0	0
T84	289335	0	0	0
T85	7293	0	0	0
T135	78357	0	0	0
T154	0	57	0	0
T155	0	17	0	0
T156	0	25	0	0
T157	0	47	0	0
T158	0	29	0	0
T159	0	2	0	0
T160	0	30	0	0
T161	0	13	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1669	0	0
T92	4860	7	0	0
T104	9851	15	0	0
T121	6189	17	0	0
T131	6672	24	0	0
T146	18261	7	0	0
T147	3864	4	0	0
T148	12388	42	0	0
T149	66677	134	0	0
T150	15583	23	0	0
T151	14671	29	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1813	0	0
T92	4860	22	0	0
T104	9851	26	0	0
T121	6189	21	0	0
T131	6672	15	0	0
T146	18261	37	0	0
T147	3864	1	0	0
T148	12388	59	0	0
T149	66677	137	0	0
T150	15583	42	0	0
T151	14671	47	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1448	0	0
T92	4860	10	0	0
T104	9851	15	0	0
T121	6189	15	0	0
T131	6672	14	0	0
T146	18261	15	0	0
T147	3864	2	0	0
T148	12388	34	0	0
T149	66677	63	0	0
T150	15583	34	0	0
T151	14671	16	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1396	0	0
T92	4860	14	0	0
T104	9851	15	0	0
T121	6189	12	0	0
T131	6672	6	0	0
T146	18261	60	0	0
T147	3864	3	0	0
T149	66677	70	0	0
T150	15583	12	0	0
T151	14671	9	0	0
T152	69742	67	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1526	0	0
T92	4860	7	0	0
T104	9851	20	0	0
T121	6189	5	0	0
T131	6672	1	0	0
T146	18261	10	0	0
T147	3864	8	0	0
T148	12388	30	0	0
T149	66677	101	0	0
T150	15583	35	0	0
T151	14671	23	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1458	0	0
T92	4860	12	0	0
T104	9851	19	0	0
T117	6463	1	0	0
T121	6189	1	0	0
T131	6672	12	0	0
T146	18261	22	0	0
T147	3864	1	0	0
T148	12388	19	0	0
T149	66677	70	0	0
T150	15583	15	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	2145	0	0
T92	4860	16	0	0
T104	9851	43	0	0
T121	6189	22	0	0
T131	6672	20	0	0
T146	18261	73	0	0
T147	3864	18	0	0
T148	12388	7	0	0
T149	66677	222	0	0
T150	15583	27	0	0
T151	14671	14	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1418	0	0
T92	4860	14	0	0
T104	9851	14	0	0
T121	6189	4	0	0
T131	6672	10	0	0
T146	18261	19	0	0
T147	3864	6	0	0
T148	12388	12	0	0
T149	66677	81	0	0
T150	15583	9	0	0
T151	14671	24	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	2286	0	0
T92	4860	4	0	0
T104	9851	36	0	0
T121	6189	21	0	0
T131	6672	12	0	0
T146	18261	40	0	0
T147	3864	18	0	0
T148	12388	5	0	0
T149	66677	268	0	0
T150	15583	24	0	0
T151	14671	61	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1748	0	0
T92	4860	7	0	0
T104	9851	13	0	0
T121	6189	7	0	0
T131	6672	7	0	0
T146	18261	21	0	0
T147	3864	10	0	0
T148	12388	47	0	0
T149	66677	158	0	0
T150	15583	33	0	0
T151	14671	31	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1544	0	0
T92	4860	10	0	0
T104	9851	22	0	0
T121	6189	14	0	0
T131	6672	5	0	0
T146	18261	28	0	0
T147	3864	6	0	0
T148	12388	16	0	0
T149	66677	71	0	0
T150	15583	29	0	0
T151	14671	14	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1612	0	0
T92	4860	7	0	0
T104	9851	7	0	0
T131	6672	10	0	0
T146	18261	18	0	0
T147	3864	2	0	0
T148	12388	26	0	0
T149	66677	75	0	0
T150	15583	21	0	0
T151	14671	26	0	0
T152	69742	104	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1304	0	0
T92	4860	6	0	0
T104	9851	10	0	0
T121	6189	11	0	0
T131	6672	3	0	0
T146	18261	18	0	0
T147	3864	7	0	0
T148	12388	27	0	0
T149	66677	74	0	0
T150	15583	12	0	0
T151	14671	26	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1507	0	0
T92	4860	7	0	0
T104	9851	14	0	0
T121	6189	7	0	0
T131	6672	7	0	0
T146	18261	16	0	0
T147	3864	3	0	0
T148	12388	34	0	0
T149	66677	82	0	0
T150	15583	27	0	0
T151	14671	31	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1502	0	0
T92	4860	12	0	0
T104	9851	20	0	0
T121	6189	7	0	0
T131	6672	4	0	0
T146	18261	46	0	0
T147	3864	4	0	0
T148	12388	33	0	0
T149	66677	55	0	0
T150	15583	22	0	0
T151	14671	25	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579622571	1572	0	0
T92	4860	17	0	0
T104	9851	13	0	0
T117	6463	2	0	0
T121	6189	2	0	0
T131	6672	2	0	0
T146	18261	55	0	0
T147	3864	1	0	0
T148	12388	43	0	0
T149	66677	97	0	0
T150	15583	27	0	0