Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
3939 |
0 |
0 |
T34 |
7879 |
6 |
0 |
0 |
T35 |
55514 |
3 |
0 |
0 |
T36 |
56337 |
1 |
0 |
0 |
T113 |
15085 |
174 |
0 |
0 |
T114 |
15305 |
332 |
0 |
0 |
T118 |
5333 |
5 |
0 |
0 |
T122 |
14427 |
263 |
0 |
0 |
T124 |
3803 |
18 |
0 |
0 |
T132 |
83635 |
3 |
0 |
0 |
T133 |
57316 |
1 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
713 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
9 |
0 |
0 |
T135 |
100856 |
133 |
0 |
0 |
T139 |
9822 |
5 |
0 |
0 |
T148 |
15060 |
50 |
0 |
0 |
T149 |
17569 |
51 |
0 |
0 |
T151 |
6484 |
6 |
0 |
0 |
T154 |
19103 |
45 |
0 |
0 |
T162 |
71058 |
74 |
0 |
0 |
T163 |
10342 |
16 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
584 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
127 |
0 |
0 |
T141 |
8453 |
16 |
0 |
0 |
T148 |
15060 |
31 |
0 |
0 |
T149 |
17569 |
16 |
0 |
0 |
T150 |
6772 |
5 |
0 |
0 |
T154 |
19103 |
63 |
0 |
0 |
T162 |
71058 |
67 |
0 |
0 |
T163 |
10342 |
6 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
1005 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
7 |
0 |
0 |
T135 |
100856 |
247 |
0 |
0 |
T148 |
15060 |
59 |
0 |
0 |
T149 |
17569 |
22 |
0 |
0 |
T150 |
6772 |
7 |
0 |
0 |
T151 |
6484 |
2 |
0 |
0 |
T154 |
19103 |
66 |
0 |
0 |
T162 |
71058 |
154 |
0 |
0 |
T163 |
10342 |
39 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
6282 |
0 |
0 |
T114 |
15305 |
6 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
1897 |
0 |
0 |
T148 |
15060 |
49 |
0 |
0 |
T149 |
17569 |
27 |
0 |
0 |
T150 |
6772 |
7 |
0 |
0 |
T151 |
6484 |
22 |
0 |
0 |
T154 |
19103 |
52 |
0 |
0 |
T162 |
71058 |
1340 |
0 |
0 |
T163 |
10342 |
4 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
4796 |
0 |
0 |
T134 |
5113 |
107 |
0 |
0 |
T135 |
100856 |
1555 |
0 |
0 |
T139 |
9822 |
150 |
0 |
0 |
T148 |
15060 |
24 |
0 |
0 |
T149 |
17569 |
33 |
0 |
0 |
T150 |
6772 |
4 |
0 |
0 |
T151 |
6484 |
3 |
0 |
0 |
T154 |
19103 |
78 |
0 |
0 |
T162 |
71058 |
897 |
0 |
0 |
T163 |
10342 |
91 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
5788 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T114 |
15305 |
5 |
0 |
0 |
T134 |
5113 |
5 |
0 |
0 |
T135 |
100856 |
1749 |
0 |
0 |
T148 |
15060 |
30 |
0 |
0 |
T149 |
17569 |
42 |
0 |
0 |
T150 |
6772 |
19 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
78 |
0 |
0 |
T162 |
71058 |
1364 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
5481 |
0 |
0 |
T134 |
5113 |
2 |
0 |
0 |
T135 |
100856 |
1569 |
0 |
0 |
T139 |
9822 |
62 |
0 |
0 |
T148 |
15060 |
46 |
0 |
0 |
T149 |
17569 |
59 |
0 |
0 |
T150 |
6772 |
20 |
0 |
0 |
T151 |
6484 |
5 |
0 |
0 |
T154 |
19103 |
34 |
0 |
0 |
T162 |
71058 |
1435 |
0 |
0 |
T163 |
10342 |
261 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
7465 |
0 |
0 |
T104 |
2102 |
2 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
2907 |
0 |
0 |
T139 |
9822 |
126 |
0 |
0 |
T148 |
15060 |
45 |
0 |
0 |
T149 |
17569 |
69 |
0 |
0 |
T151 |
6484 |
44 |
0 |
0 |
T154 |
19103 |
91 |
0 |
0 |
T162 |
71058 |
1711 |
0 |
0 |
T163 |
10342 |
241 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
6693 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
2273 |
0 |
0 |
T139 |
9822 |
119 |
0 |
0 |
T148 |
15060 |
26 |
0 |
0 |
T149 |
17569 |
58 |
0 |
0 |
T150 |
6772 |
13 |
0 |
0 |
T151 |
6484 |
13 |
0 |
0 |
T154 |
19103 |
58 |
0 |
0 |
T162 |
71058 |
1761 |
0 |
0 |
T163 |
10342 |
126 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
5331 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
1 |
0 |
0 |
T135 |
100856 |
2146 |
0 |
0 |
T148 |
15060 |
45 |
0 |
0 |
T149 |
17569 |
56 |
0 |
0 |
T150 |
6772 |
6 |
0 |
0 |
T151 |
6484 |
17 |
0 |
0 |
T154 |
19103 |
50 |
0 |
0 |
T162 |
71058 |
865 |
0 |
0 |
T163 |
10342 |
142 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
5899 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
81 |
0 |
0 |
T135 |
100856 |
1692 |
0 |
0 |
T148 |
15060 |
88 |
0 |
0 |
T149 |
17569 |
56 |
0 |
0 |
T150 |
6772 |
39 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
65 |
0 |
0 |
T162 |
71058 |
1264 |
0 |
0 |
T163 |
10342 |
274 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2604 |
0 |
0 |
T104 |
2102 |
2 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
615 |
0 |
0 |
T148 |
15060 |
23 |
0 |
0 |
T149 |
17569 |
50 |
0 |
0 |
T150 |
6772 |
18 |
0 |
0 |
T151 |
6484 |
16 |
0 |
0 |
T154 |
19103 |
99 |
0 |
0 |
T162 |
71058 |
541 |
0 |
0 |
T163 |
10342 |
113 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2363 |
0 |
0 |
T134 |
5113 |
49 |
0 |
0 |
T135 |
100856 |
884 |
0 |
0 |
T139 |
9822 |
26 |
0 |
0 |
T148 |
15060 |
87 |
0 |
0 |
T149 |
17569 |
30 |
0 |
0 |
T150 |
6772 |
5 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
43 |
0 |
0 |
T162 |
71058 |
400 |
0 |
0 |
T163 |
10342 |
87 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2483 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
5 |
0 |
0 |
T135 |
100856 |
638 |
0 |
0 |
T148 |
15060 |
56 |
0 |
0 |
T149 |
17569 |
9 |
0 |
0 |
T150 |
6772 |
8 |
0 |
0 |
T151 |
6484 |
5 |
0 |
0 |
T154 |
19103 |
35 |
0 |
0 |
T162 |
71058 |
606 |
0 |
0 |
T163 |
10342 |
75 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2378 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T134 |
5113 |
40 |
0 |
0 |
T135 |
100856 |
645 |
0 |
0 |
T148 |
15060 |
7 |
0 |
0 |
T149 |
17569 |
19 |
0 |
0 |
T150 |
6772 |
18 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
40 |
0 |
0 |
T162 |
71058 |
386 |
0 |
0 |
T163 |
10342 |
52 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2643 |
0 |
0 |
T134 |
5113 |
1 |
0 |
0 |
T135 |
100856 |
760 |
0 |
0 |
T139 |
9822 |
32 |
0 |
0 |
T148 |
15060 |
82 |
0 |
0 |
T149 |
17569 |
42 |
0 |
0 |
T150 |
6772 |
9 |
0 |
0 |
T151 |
6484 |
7 |
0 |
0 |
T154 |
19103 |
54 |
0 |
0 |
T162 |
71058 |
479 |
0 |
0 |
T163 |
10342 |
72 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2784 |
0 |
0 |
T104 |
2102 |
7 |
0 |
0 |
T134 |
5113 |
3 |
0 |
0 |
T135 |
100856 |
956 |
0 |
0 |
T148 |
15060 |
93 |
0 |
0 |
T149 |
17569 |
22 |
0 |
0 |
T150 |
6772 |
4 |
0 |
0 |
T151 |
6484 |
21 |
0 |
0 |
T154 |
19103 |
54 |
0 |
0 |
T162 |
71058 |
535 |
0 |
0 |
T163 |
10342 |
103 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2594 |
0 |
0 |
T134 |
5113 |
5 |
0 |
0 |
T135 |
100856 |
887 |
0 |
0 |
T139 |
9822 |
55 |
0 |
0 |
T148 |
15060 |
54 |
0 |
0 |
T149 |
17569 |
101 |
0 |
0 |
T150 |
6772 |
11 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
40 |
0 |
0 |
T162 |
71058 |
398 |
0 |
0 |
T163 |
10342 |
60 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
3024 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
71 |
0 |
0 |
T135 |
100856 |
712 |
0 |
0 |
T148 |
15060 |
57 |
0 |
0 |
T149 |
17569 |
66 |
0 |
0 |
T150 |
6772 |
27 |
0 |
0 |
T151 |
6484 |
9 |
0 |
0 |
T154 |
19103 |
75 |
0 |
0 |
T162 |
71058 |
544 |
0 |
0 |
T163 |
10342 |
57 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
3002 |
0 |
0 |
T104 |
2102 |
8 |
0 |
0 |
T134 |
5113 |
2 |
0 |
0 |
T135 |
100856 |
952 |
0 |
0 |
T148 |
15060 |
36 |
0 |
0 |
T149 |
17569 |
18 |
0 |
0 |
T150 |
6772 |
33 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
28 |
0 |
0 |
T162 |
71058 |
546 |
0 |
0 |
T163 |
10342 |
124 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2440 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
66 |
0 |
0 |
T135 |
100856 |
903 |
0 |
0 |
T148 |
15060 |
53 |
0 |
0 |
T149 |
17569 |
47 |
0 |
0 |
T150 |
6772 |
15 |
0 |
0 |
T151 |
6484 |
7 |
0 |
0 |
T154 |
19103 |
26 |
0 |
0 |
T162 |
71058 |
352 |
0 |
0 |
T163 |
10342 |
12 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2644 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
38 |
0 |
0 |
T135 |
100856 |
735 |
0 |
0 |
T148 |
15060 |
50 |
0 |
0 |
T149 |
17569 |
36 |
0 |
0 |
T150 |
6772 |
14 |
0 |
0 |
T151 |
6484 |
8 |
0 |
0 |
T154 |
19103 |
91 |
0 |
0 |
T162 |
71058 |
513 |
0 |
0 |
T163 |
10342 |
60 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2571 |
0 |
0 |
T134 |
5113 |
5 |
0 |
0 |
T135 |
100856 |
651 |
0 |
0 |
T139 |
9822 |
63 |
0 |
0 |
T141 |
8453 |
67 |
0 |
0 |
T148 |
15060 |
45 |
0 |
0 |
T149 |
17569 |
16 |
0 |
0 |
T150 |
6772 |
7 |
0 |
0 |
T154 |
19103 |
32 |
0 |
0 |
T162 |
71058 |
562 |
0 |
0 |
T163 |
10342 |
50 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2834 |
0 |
0 |
T104 |
2102 |
5 |
0 |
0 |
T134 |
5113 |
15 |
0 |
0 |
T135 |
100856 |
840 |
0 |
0 |
T148 |
15060 |
70 |
0 |
0 |
T149 |
17569 |
68 |
0 |
0 |
T150 |
6772 |
4 |
0 |
0 |
T151 |
6484 |
8 |
0 |
0 |
T154 |
19103 |
85 |
0 |
0 |
T162 |
71058 |
590 |
0 |
0 |
T163 |
10342 |
23 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2920 |
0 |
0 |
T104 |
2102 |
2 |
0 |
0 |
T134 |
5113 |
52 |
0 |
0 |
T135 |
100856 |
738 |
0 |
0 |
T148 |
15060 |
42 |
0 |
0 |
T149 |
17569 |
43 |
0 |
0 |
T150 |
6772 |
19 |
0 |
0 |
T151 |
6484 |
13 |
0 |
0 |
T154 |
19103 |
91 |
0 |
0 |
T162 |
71058 |
760 |
0 |
0 |
T163 |
10342 |
86 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2675 |
0 |
0 |
T104 |
2102 |
3 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
737 |
0 |
0 |
T148 |
15060 |
40 |
0 |
0 |
T149 |
17569 |
42 |
0 |
0 |
T150 |
6772 |
1 |
0 |
0 |
T151 |
6484 |
1 |
0 |
0 |
T154 |
19103 |
122 |
0 |
0 |
T162 |
71058 |
380 |
0 |
0 |
T163 |
10342 |
66 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
3250 |
0 |
0 |
T104 |
2102 |
9 |
0 |
0 |
T134 |
5113 |
64 |
0 |
0 |
T135 |
100856 |
809 |
0 |
0 |
T148 |
15060 |
58 |
0 |
0 |
T149 |
17569 |
41 |
0 |
0 |
T150 |
6772 |
8 |
0 |
0 |
T151 |
6484 |
29 |
0 |
0 |
T154 |
19103 |
71 |
0 |
0 |
T162 |
71058 |
629 |
0 |
0 |
T163 |
10342 |
61 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2734 |
0 |
0 |
T104 |
2102 |
7 |
0 |
0 |
T134 |
5113 |
60 |
0 |
0 |
T135 |
100856 |
887 |
0 |
0 |
T148 |
15060 |
44 |
0 |
0 |
T149 |
17569 |
27 |
0 |
0 |
T150 |
6772 |
10 |
0 |
0 |
T151 |
6484 |
22 |
0 |
0 |
T154 |
19103 |
92 |
0 |
0 |
T162 |
71058 |
488 |
0 |
0 |
T163 |
10342 |
71 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2664 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
64 |
0 |
0 |
T135 |
100856 |
1006 |
0 |
0 |
T148 |
15060 |
52 |
0 |
0 |
T149 |
17569 |
20 |
0 |
0 |
T150 |
6772 |
4 |
0 |
0 |
T151 |
6484 |
22 |
0 |
0 |
T154 |
19103 |
58 |
0 |
0 |
T162 |
71058 |
380 |
0 |
0 |
T163 |
10342 |
72 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2596 |
0 |
0 |
T134 |
5113 |
52 |
0 |
0 |
T135 |
100856 |
754 |
0 |
0 |
T139 |
9822 |
61 |
0 |
0 |
T148 |
15060 |
22 |
0 |
0 |
T149 |
17569 |
26 |
0 |
0 |
T150 |
6772 |
19 |
0 |
0 |
T151 |
6484 |
8 |
0 |
0 |
T154 |
19103 |
97 |
0 |
0 |
T162 |
71058 |
515 |
0 |
0 |
T163 |
10342 |
43 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2495 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
9 |
0 |
0 |
T135 |
100856 |
747 |
0 |
0 |
T148 |
15060 |
75 |
0 |
0 |
T149 |
17569 |
25 |
0 |
0 |
T150 |
6772 |
6 |
0 |
0 |
T151 |
6484 |
9 |
0 |
0 |
T154 |
19103 |
35 |
0 |
0 |
T162 |
71058 |
406 |
0 |
0 |
T163 |
10342 |
31 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2482 |
0 |
0 |
T104 |
2102 |
8 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
794 |
0 |
0 |
T148 |
15060 |
37 |
0 |
0 |
T149 |
17569 |
12 |
0 |
0 |
T150 |
6772 |
10 |
0 |
0 |
T151 |
6484 |
7 |
0 |
0 |
T154 |
19103 |
43 |
0 |
0 |
T162 |
71058 |
489 |
0 |
0 |
T163 |
10342 |
10 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2448 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
13 |
0 |
0 |
T135 |
100856 |
694 |
0 |
0 |
T148 |
15060 |
57 |
0 |
0 |
T149 |
17569 |
38 |
0 |
0 |
T150 |
6772 |
4 |
0 |
0 |
T151 |
6484 |
2 |
0 |
0 |
T154 |
19103 |
64 |
0 |
0 |
T162 |
71058 |
627 |
0 |
0 |
T163 |
10342 |
45 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2392 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
652 |
0 |
0 |
T148 |
15060 |
58 |
0 |
0 |
T149 |
17569 |
2 |
0 |
0 |
T150 |
6772 |
14 |
0 |
0 |
T151 |
6484 |
13 |
0 |
0 |
T154 |
19103 |
119 |
0 |
0 |
T162 |
71058 |
475 |
0 |
0 |
T163 |
10342 |
19 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2486 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T113 |
15085 |
2 |
0 |
0 |
T114 |
15305 |
2 |
0 |
0 |
T134 |
5113 |
71 |
0 |
0 |
T135 |
100856 |
876 |
0 |
0 |
T148 |
15060 |
44 |
0 |
0 |
T149 |
17569 |
21 |
0 |
0 |
T151 |
6484 |
5 |
0 |
0 |
T154 |
19103 |
46 |
0 |
0 |
T162 |
71058 |
410 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
818 |
0 |
0 |
T104 |
2102 |
9 |
0 |
0 |
T134 |
5113 |
24 |
0 |
0 |
T135 |
100856 |
192 |
0 |
0 |
T148 |
15060 |
90 |
0 |
0 |
T149 |
17569 |
7 |
0 |
0 |
T150 |
6772 |
18 |
0 |
0 |
T151 |
6484 |
26 |
0 |
0 |
T154 |
19103 |
48 |
0 |
0 |
T162 |
71058 |
97 |
0 |
0 |
T163 |
10342 |
17 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
845 |
0 |
0 |
T114 |
15305 |
4 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
193 |
0 |
0 |
T148 |
15060 |
58 |
0 |
0 |
T149 |
17569 |
26 |
0 |
0 |
T150 |
6772 |
8 |
0 |
0 |
T151 |
6484 |
15 |
0 |
0 |
T154 |
19103 |
53 |
0 |
0 |
T162 |
71058 |
136 |
0 |
0 |
T163 |
10342 |
19 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
892 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
26 |
0 |
0 |
T135 |
100856 |
171 |
0 |
0 |
T139 |
9822 |
9 |
0 |
0 |
T148 |
15060 |
46 |
0 |
0 |
T149 |
17569 |
32 |
0 |
0 |
T150 |
6772 |
19 |
0 |
0 |
T154 |
19103 |
111 |
0 |
0 |
T162 |
71058 |
79 |
0 |
0 |
T163 |
10342 |
15 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
880 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T134 |
5113 |
10 |
0 |
0 |
T135 |
100856 |
199 |
0 |
0 |
T148 |
15060 |
23 |
0 |
0 |
T149 |
17569 |
37 |
0 |
0 |
T150 |
6772 |
18 |
0 |
0 |
T151 |
6484 |
6 |
0 |
0 |
T154 |
19103 |
85 |
0 |
0 |
T162 |
71058 |
130 |
0 |
0 |
T163 |
10342 |
25 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
983 |
0 |
0 |
T134 |
5113 |
18 |
0 |
0 |
T135 |
100856 |
249 |
0 |
0 |
T139 |
9822 |
2 |
0 |
0 |
T148 |
15060 |
13 |
0 |
0 |
T149 |
17569 |
18 |
0 |
0 |
T150 |
6772 |
5 |
0 |
0 |
T151 |
6484 |
5 |
0 |
0 |
T154 |
19103 |
79 |
0 |
0 |
T162 |
71058 |
166 |
0 |
0 |
T163 |
10342 |
28 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
2068 |
0 |
0 |
T22 |
7705 |
43 |
0 |
0 |
T39 |
0 |
16 |
0 |
0 |
T45 |
177838 |
0 |
0 |
0 |
T57 |
1618 |
0 |
0 |
0 |
T58 |
43870 |
0 |
0 |
0 |
T61 |
332378 |
0 |
0 |
0 |
T62 |
28426 |
0 |
0 |
0 |
T104 |
0 |
7 |
0 |
0 |
T110 |
814303 |
0 |
0 |
0 |
T119 |
9175 |
0 |
0 |
0 |
T148 |
0 |
5 |
0 |
0 |
T149 |
0 |
34 |
0 |
0 |
T151 |
0 |
7 |
0 |
0 |
T154 |
0 |
57 |
0 |
0 |
T164 |
0 |
43 |
0 |
0 |
T165 |
0 |
22 |
0 |
0 |
T166 |
0 |
12 |
0 |
0 |
T167 |
890 |
0 |
0 |
0 |
T168 |
901 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
763 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
189 |
0 |
0 |
T139 |
9822 |
8 |
0 |
0 |
T148 |
15060 |
22 |
0 |
0 |
T149 |
17569 |
25 |
0 |
0 |
T150 |
6772 |
1 |
0 |
0 |
T151 |
6484 |
12 |
0 |
0 |
T154 |
19103 |
38 |
0 |
0 |
T162 |
71058 |
124 |
0 |
0 |
T163 |
10342 |
20 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
771 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
13 |
0 |
0 |
T135 |
100856 |
226 |
0 |
0 |
T139 |
9822 |
19 |
0 |
0 |
T148 |
15060 |
20 |
0 |
0 |
T149 |
17569 |
23 |
0 |
0 |
T151 |
6484 |
5 |
0 |
0 |
T154 |
19103 |
34 |
0 |
0 |
T162 |
71058 |
106 |
0 |
0 |
T163 |
10342 |
23 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
686 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
11 |
0 |
0 |
T135 |
100856 |
100 |
0 |
0 |
T148 |
15060 |
56 |
0 |
0 |
T149 |
17569 |
32 |
0 |
0 |
T150 |
6772 |
25 |
0 |
0 |
T151 |
6484 |
13 |
0 |
0 |
T154 |
19103 |
82 |
0 |
0 |
T162 |
71058 |
66 |
0 |
0 |
T163 |
10342 |
18 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
697 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
1 |
0 |
0 |
T135 |
100856 |
102 |
0 |
0 |
T148 |
15060 |
3 |
0 |
0 |
T149 |
17569 |
28 |
0 |
0 |
T150 |
6772 |
11 |
0 |
0 |
T151 |
6484 |
16 |
0 |
0 |
T154 |
19103 |
134 |
0 |
0 |
T162 |
71058 |
80 |
0 |
0 |
T163 |
10342 |
15 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
640 |
0 |
0 |
T104 |
2102 |
9 |
0 |
0 |
T134 |
5113 |
18 |
0 |
0 |
T135 |
100856 |
104 |
0 |
0 |
T148 |
15060 |
47 |
0 |
0 |
T149 |
17569 |
21 |
0 |
0 |
T150 |
6772 |
2 |
0 |
0 |
T151 |
6484 |
14 |
0 |
0 |
T154 |
19103 |
69 |
0 |
0 |
T162 |
71058 |
61 |
0 |
0 |
T163 |
10342 |
16 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
661 |
0 |
0 |
T104 |
2102 |
9 |
0 |
0 |
T134 |
5113 |
11 |
0 |
0 |
T135 |
100856 |
128 |
0 |
0 |
T148 |
15060 |
44 |
0 |
0 |
T149 |
17569 |
30 |
0 |
0 |
T150 |
6772 |
3 |
0 |
0 |
T151 |
6484 |
10 |
0 |
0 |
T154 |
19103 |
51 |
0 |
0 |
T162 |
71058 |
72 |
0 |
0 |
T163 |
10342 |
31 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
1157 |
0 |
0 |
T104 |
2102 |
4 |
0 |
0 |
T134 |
5113 |
18 |
0 |
0 |
T135 |
100856 |
261 |
0 |
0 |
T148 |
15060 |
35 |
0 |
0 |
T149 |
17569 |
58 |
0 |
0 |
T150 |
6772 |
14 |
0 |
0 |
T151 |
6484 |
23 |
0 |
0 |
T154 |
19103 |
81 |
0 |
0 |
T162 |
71058 |
191 |
0 |
0 |
T163 |
10342 |
32 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
685 |
0 |
0 |
T104 |
2102 |
5 |
0 |
0 |
T135 |
100856 |
121 |
0 |
0 |
T139 |
9822 |
3 |
0 |
0 |
T148 |
15060 |
30 |
0 |
0 |
T149 |
17569 |
53 |
0 |
0 |
T150 |
6772 |
10 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
56 |
0 |
0 |
T162 |
71058 |
83 |
0 |
0 |
T163 |
10342 |
12 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
1290 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
11 |
0 |
0 |
T135 |
100856 |
339 |
0 |
0 |
T139 |
9822 |
32 |
0 |
0 |
T148 |
15060 |
33 |
0 |
0 |
T149 |
17569 |
74 |
0 |
0 |
T150 |
6772 |
16 |
0 |
0 |
T154 |
19103 |
79 |
0 |
0 |
T162 |
71058 |
133 |
0 |
0 |
T163 |
10342 |
11 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
836 |
0 |
0 |
T104 |
2102 |
9 |
0 |
0 |
T134 |
5113 |
2 |
0 |
0 |
T135 |
100856 |
142 |
0 |
0 |
T148 |
15060 |
30 |
0 |
0 |
T149 |
17569 |
61 |
0 |
0 |
T150 |
6772 |
15 |
0 |
0 |
T151 |
6484 |
33 |
0 |
0 |
T154 |
19103 |
80 |
0 |
0 |
T162 |
71058 |
91 |
0 |
0 |
T163 |
10342 |
18 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
580 |
0 |
0 |
T134 |
5113 |
3 |
0 |
0 |
T135 |
100856 |
135 |
0 |
0 |
T141 |
8453 |
9 |
0 |
0 |
T148 |
15060 |
20 |
0 |
0 |
T149 |
17569 |
30 |
0 |
0 |
T150 |
6772 |
9 |
0 |
0 |
T151 |
6484 |
3 |
0 |
0 |
T154 |
19103 |
49 |
0 |
0 |
T162 |
71058 |
57 |
0 |
0 |
T163 |
10342 |
18 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
673 |
0 |
0 |
T104 |
2102 |
6 |
0 |
0 |
T134 |
5113 |
3 |
0 |
0 |
T135 |
100856 |
124 |
0 |
0 |
T141 |
8453 |
7 |
0 |
0 |
T148 |
15060 |
12 |
0 |
0 |
T149 |
17569 |
35 |
0 |
0 |
T150 |
6772 |
28 |
0 |
0 |
T154 |
19103 |
83 |
0 |
0 |
T162 |
71058 |
55 |
0 |
0 |
T163 |
10342 |
15 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
676 |
0 |
0 |
T104 |
2102 |
1 |
0 |
0 |
T113 |
15085 |
10 |
0 |
0 |
T134 |
5113 |
9 |
0 |
0 |
T135 |
100856 |
110 |
0 |
0 |
T148 |
15060 |
36 |
0 |
0 |
T149 |
17569 |
24 |
0 |
0 |
T151 |
6484 |
4 |
0 |
0 |
T154 |
19103 |
84 |
0 |
0 |
T162 |
71058 |
84 |
0 |
0 |
T163 |
10342 |
20 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
728 |
0 |
0 |
T104 |
2102 |
2 |
0 |
0 |
T134 |
5113 |
8 |
0 |
0 |
T135 |
100856 |
106 |
0 |
0 |
T148 |
15060 |
76 |
0 |
0 |
T149 |
17569 |
50 |
0 |
0 |
T150 |
6772 |
8 |
0 |
0 |
T151 |
6484 |
19 |
0 |
0 |
T154 |
19103 |
71 |
0 |
0 |
T162 |
71058 |
89 |
0 |
0 |
T163 |
10342 |
18 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
726 |
0 |
0 |
T134 |
5113 |
9 |
0 |
0 |
T135 |
100856 |
123 |
0 |
0 |
T139 |
9822 |
5 |
0 |
0 |
T148 |
15060 |
39 |
0 |
0 |
T149 |
17569 |
54 |
0 |
0 |
T150 |
6772 |
13 |
0 |
0 |
T151 |
6484 |
34 |
0 |
0 |
T154 |
19103 |
96 |
0 |
0 |
T162 |
71058 |
76 |
0 |
0 |
T163 |
10342 |
8 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
127013807 |
637 |
0 |
0 |
T104 |
2102 |
5 |
0 |
0 |
T134 |
5113 |
6 |
0 |
0 |
T135 |
100856 |
125 |
0 |
0 |
T148 |
15060 |
86 |
0 |
0 |
T149 |
17569 |
10 |
0 |
0 |
T150 |
6772 |
8 |
0 |
0 |
T151 |
6484 |
2 |
0 |
0 |
T154 |
19103 |
61 |
0 |
0 |
T162 |
71058 |
68 |
0 |
0 |
T163 |
10342 |
15 |
0 |
0 |