T349 |
/workspace/coverage/default/4.spi_device_upload.3053049934 |
|
|
Apr 02 01:39:09 PM PDT 24 |
Apr 02 01:39:31 PM PDT 24 |
5290764762 ps |
T627 |
/workspace/coverage/default/22.spi_device_tpm_rw.3634587551 |
|
|
Apr 02 01:40:53 PM PDT 24 |
Apr 02 01:41:00 PM PDT 24 |
250467021 ps |
T628 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.3015488861 |
|
|
Apr 02 01:43:26 PM PDT 24 |
Apr 02 01:43:27 PM PDT 24 |
38177947 ps |
T205 |
/workspace/coverage/default/10.spi_device_upload.2138374869 |
|
|
Apr 02 01:39:43 PM PDT 24 |
Apr 02 01:39:47 PM PDT 24 |
161914518 ps |
T629 |
/workspace/coverage/default/44.spi_device_mailbox.3263004433 |
|
|
Apr 02 01:45:28 PM PDT 24 |
Apr 02 01:45:33 PM PDT 24 |
881182585 ps |
T630 |
/workspace/coverage/default/1.spi_device_tpm_rw.3146580595 |
|
|
Apr 02 01:38:55 PM PDT 24 |
Apr 02 01:38:56 PM PDT 24 |
507350523 ps |
T370 |
/workspace/coverage/default/22.spi_device_upload.3947159908 |
|
|
Apr 02 01:41:01 PM PDT 24 |
Apr 02 01:41:08 PM PDT 24 |
920059835 ps |
T631 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.3769221314 |
|
|
Apr 02 01:40:11 PM PDT 24 |
Apr 02 01:40:15 PM PDT 24 |
222158752 ps |
T280 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.460999738 |
|
|
Apr 02 01:40:57 PM PDT 24 |
Apr 02 01:41:27 PM PDT 24 |
12287925302 ps |
T327 |
/workspace/coverage/default/26.spi_device_pass_cmd_filtering.2557602788 |
|
|
Apr 02 01:41:21 PM PDT 24 |
Apr 02 01:41:35 PM PDT 24 |
17957125781 ps |
T632 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1419705774 |
|
|
Apr 02 01:38:59 PM PDT 24 |
Apr 02 01:39:25 PM PDT 24 |
33226941965 ps |
T184 |
/workspace/coverage/default/15.spi_device_intercept.2274006021 |
|
|
Apr 02 01:40:12 PM PDT 24 |
Apr 02 01:40:17 PM PDT 24 |
363615706 ps |
T633 |
/workspace/coverage/default/39.spi_device_tpm_rw.3727312122 |
|
|
Apr 02 01:44:19 PM PDT 24 |
Apr 02 01:44:20 PM PDT 24 |
25535567 ps |
T103 |
/workspace/coverage/default/45.spi_device_intercept.3914529595 |
|
|
Apr 02 01:45:36 PM PDT 24 |
Apr 02 01:45:46 PM PDT 24 |
2418285090 ps |
T634 |
/workspace/coverage/default/25.spi_device_tpm_all.3186517530 |
|
|
Apr 02 01:41:10 PM PDT 24 |
Apr 02 01:41:23 PM PDT 24 |
1982590908 ps |
T635 |
/workspace/coverage/default/38.spi_device_alert_test.1464747180 |
|
|
Apr 02 01:44:11 PM PDT 24 |
Apr 02 01:44:12 PM PDT 24 |
37291207 ps |
T215 |
/workspace/coverage/default/27.spi_device_upload.1661272466 |
|
|
Apr 02 01:41:29 PM PDT 24 |
Apr 02 01:41:32 PM PDT 24 |
51945466 ps |
T636 |
/workspace/coverage/default/6.spi_device_stress_all.630968446 |
|
|
Apr 02 01:39:22 PM PDT 24 |
Apr 02 01:39:23 PM PDT 24 |
60806637 ps |
T637 |
/workspace/coverage/default/29.spi_device_tpm_all.1922322445 |
|
|
Apr 02 01:42:03 PM PDT 24 |
Apr 02 01:42:40 PM PDT 24 |
3848370843 ps |
T638 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.2960016983 |
|
|
Apr 02 01:41:00 PM PDT 24 |
Apr 02 01:41:06 PM PDT 24 |
2554994028 ps |
T639 |
/workspace/coverage/default/26.spi_device_alert_test.3014796783 |
|
|
Apr 02 01:41:23 PM PDT 24 |
Apr 02 01:41:24 PM PDT 24 |
16079195 ps |
T640 |
/workspace/coverage/default/11.spi_device_tpm_rw.4103943057 |
|
|
Apr 02 01:39:46 PM PDT 24 |
Apr 02 01:39:53 PM PDT 24 |
241189154 ps |
T641 |
/workspace/coverage/default/16.spi_device_mailbox.1007693760 |
|
|
Apr 02 01:40:18 PM PDT 24 |
Apr 02 01:40:33 PM PDT 24 |
1082281922 ps |
T642 |
/workspace/coverage/default/15.spi_device_alert_test.1416908669 |
|
|
Apr 02 01:40:19 PM PDT 24 |
Apr 02 01:40:20 PM PDT 24 |
33311021 ps |
T643 |
/workspace/coverage/default/40.spi_device_intercept.1180480895 |
|
|
Apr 02 01:44:34 PM PDT 24 |
Apr 02 01:44:43 PM PDT 24 |
617766412 ps |
T401 |
/workspace/coverage/default/34.spi_device_tpm_all.3533483754 |
|
|
Apr 02 01:43:11 PM PDT 24 |
Apr 02 01:44:27 PM PDT 24 |
77147223793 ps |
T314 |
/workspace/coverage/default/35.spi_device_intercept.1584309400 |
|
|
Apr 02 01:43:30 PM PDT 24 |
Apr 02 01:43:35 PM PDT 24 |
183837782 ps |
T285 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.3330382393 |
|
|
Apr 02 01:43:56 PM PDT 24 |
Apr 02 01:44:07 PM PDT 24 |
2688161550 ps |
T644 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.2957197656 |
|
|
Apr 02 01:41:07 PM PDT 24 |
Apr 02 01:41:08 PM PDT 24 |
305940848 ps |
T645 |
/workspace/coverage/default/17.spi_device_alert_test.3389327002 |
|
|
Apr 02 01:40:27 PM PDT 24 |
Apr 02 01:40:28 PM PDT 24 |
11127017 ps |
T243 |
/workspace/coverage/default/2.spi_device_mailbox.2014013264 |
|
|
Apr 02 01:38:58 PM PDT 24 |
Apr 02 01:39:18 PM PDT 24 |
1781570190 ps |
T646 |
/workspace/coverage/default/0.spi_device_ram_cfg.164388462 |
|
|
Apr 02 01:38:51 PM PDT 24 |
Apr 02 01:38:52 PM PDT 24 |
32236564 ps |
T647 |
/workspace/coverage/default/10.spi_device_ram_cfg.1762858356 |
|
|
Apr 02 01:39:44 PM PDT 24 |
Apr 02 01:39:44 PM PDT 24 |
34361887 ps |
T648 |
/workspace/coverage/default/15.spi_device_tpm_rw.1847092 |
|
|
Apr 02 01:40:08 PM PDT 24 |
Apr 02 01:40:12 PM PDT 24 |
214106452 ps |
T649 |
/workspace/coverage/default/2.spi_device_csb_read.2902443619 |
|
|
Apr 02 01:38:57 PM PDT 24 |
Apr 02 01:38:58 PM PDT 24 |
21554593 ps |
T340 |
/workspace/coverage/default/2.spi_device_pass_addr_payload_swap.2506182615 |
|
|
Apr 02 01:39:04 PM PDT 24 |
Apr 02 01:39:13 PM PDT 24 |
2725159167 ps |
T650 |
/workspace/coverage/default/18.spi_device_tpm_all.2620557457 |
|
|
Apr 02 01:40:30 PM PDT 24 |
Apr 02 01:41:03 PM PDT 24 |
3387231078 ps |
T651 |
/workspace/coverage/default/26.spi_device_csb_read.841042952 |
|
|
Apr 02 01:41:17 PM PDT 24 |
Apr 02 01:41:18 PM PDT 24 |
40617500 ps |
T652 |
/workspace/coverage/default/30.spi_device_read_buffer_direct.2606216150 |
|
|
Apr 02 01:42:23 PM PDT 24 |
Apr 02 01:42:27 PM PDT 24 |
955832541 ps |
T653 |
/workspace/coverage/default/5.spi_device_tpm_all.1546047426 |
|
|
Apr 02 01:39:15 PM PDT 24 |
Apr 02 01:39:18 PM PDT 24 |
1018657792 ps |
T654 |
/workspace/coverage/default/13.spi_device_cfg_cmd.108705178 |
|
|
Apr 02 01:39:59 PM PDT 24 |
Apr 02 01:40:30 PM PDT 24 |
3998790366 ps |
T180 |
/workspace/coverage/default/34.spi_device_intercept.2847998340 |
|
|
Apr 02 01:43:14 PM PDT 24 |
Apr 02 01:43:22 PM PDT 24 |
1946575512 ps |
T206 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.1128709088 |
|
|
Apr 02 01:39:54 PM PDT 24 |
Apr 02 01:39:57 PM PDT 24 |
160765388 ps |
T311 |
/workspace/coverage/default/27.spi_device_mailbox.2583743382 |
|
|
Apr 02 01:41:30 PM PDT 24 |
Apr 02 01:41:37 PM PDT 24 |
1390288739 ps |
T655 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.3917139464 |
|
|
Apr 02 01:44:11 PM PDT 24 |
Apr 02 01:44:20 PM PDT 24 |
853919540 ps |
T656 |
/workspace/coverage/default/35.spi_device_flash_mode.3399094058 |
|
|
Apr 02 01:43:32 PM PDT 24 |
Apr 02 01:43:43 PM PDT 24 |
403883635 ps |
T657 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.4163041139 |
|
|
Apr 02 01:39:26 PM PDT 24 |
Apr 02 01:39:41 PM PDT 24 |
17586180196 ps |
T216 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.1659229001 |
|
|
Apr 02 01:42:45 PM PDT 24 |
Apr 02 01:42:55 PM PDT 24 |
15156599118 ps |
T250 |
/workspace/coverage/default/14.spi_device_cfg_cmd.1587604690 |
|
|
Apr 02 01:40:03 PM PDT 24 |
Apr 02 01:40:06 PM PDT 24 |
192780264 ps |
T346 |
/workspace/coverage/default/24.spi_device_mailbox.2402901254 |
|
|
Apr 02 01:41:07 PM PDT 24 |
Apr 02 01:41:10 PM PDT 24 |
85863454 ps |
T658 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.1201631473 |
|
|
Apr 02 01:39:06 PM PDT 24 |
Apr 02 01:39:06 PM PDT 24 |
61255882 ps |
T181 |
/workspace/coverage/default/29.spi_device_intercept.2303795027 |
|
|
Apr 02 01:42:04 PM PDT 24 |
Apr 02 01:42:42 PM PDT 24 |
13632327437 ps |
T258 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.545181249 |
|
|
Apr 02 01:39:02 PM PDT 24 |
Apr 02 01:39:12 PM PDT 24 |
7200408124 ps |
T329 |
/workspace/coverage/default/12.spi_device_upload.3016029314 |
|
|
Apr 02 01:39:54 PM PDT 24 |
Apr 02 01:40:11 PM PDT 24 |
19390023293 ps |
T338 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.745549191 |
|
|
Apr 02 01:42:03 PM PDT 24 |
Apr 02 01:42:20 PM PDT 24 |
16914109867 ps |
T344 |
/workspace/coverage/default/42.spi_device_mailbox.3943946997 |
|
|
Apr 02 01:45:02 PM PDT 24 |
Apr 02 01:45:15 PM PDT 24 |
4516444271 ps |
T659 |
/workspace/coverage/default/46.spi_device_alert_test.929572467 |
|
|
Apr 02 01:45:53 PM PDT 24 |
Apr 02 01:45:54 PM PDT 24 |
38981707 ps |
T323 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.240003952 |
|
|
Apr 02 01:40:07 PM PDT 24 |
Apr 02 01:40:10 PM PDT 24 |
221404334 ps |
T660 |
/workspace/coverage/default/34.spi_device_alert_test.1543812909 |
|
|
Apr 02 01:43:22 PM PDT 24 |
Apr 02 01:43:23 PM PDT 24 |
21992222 ps |
T203 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.324685924 |
|
|
Apr 02 01:39:27 PM PDT 24 |
Apr 02 01:39:34 PM PDT 24 |
425810418 ps |
T661 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.513253647 |
|
|
Apr 02 01:40:43 PM PDT 24 |
Apr 02 01:40:43 PM PDT 24 |
26616114 ps |
T662 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.1760828714 |
|
|
Apr 02 01:39:45 PM PDT 24 |
Apr 02 01:40:16 PM PDT 24 |
53179140141 ps |
T293 |
/workspace/coverage/default/39.spi_device_flash_mode.4093573844 |
|
|
Apr 02 01:44:18 PM PDT 24 |
Apr 02 01:45:19 PM PDT 24 |
3569035126 ps |
T663 |
/workspace/coverage/default/24.spi_device_flash_mode.1654167975 |
|
|
Apr 02 01:41:10 PM PDT 24 |
Apr 02 01:41:37 PM PDT 24 |
2890905170 ps |
T664 |
/workspace/coverage/default/44.spi_device_tpm_all.774242517 |
|
|
Apr 02 01:45:24 PM PDT 24 |
Apr 02 01:45:51 PM PDT 24 |
6505803892 ps |
T665 |
/workspace/coverage/default/35.spi_device_mailbox.831144623 |
|
|
Apr 02 01:43:31 PM PDT 24 |
Apr 02 01:43:40 PM PDT 24 |
352295432 ps |
T198 |
/workspace/coverage/default/18.spi_device_cfg_cmd.285556691 |
|
|
Apr 02 01:40:34 PM PDT 24 |
Apr 02 01:40:54 PM PDT 24 |
8810445039 ps |
T666 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.3210374087 |
|
|
Apr 02 01:39:47 PM PDT 24 |
Apr 02 01:39:47 PM PDT 24 |
119386263 ps |
T667 |
/workspace/coverage/default/44.spi_device_tpm_rw.3540035356 |
|
|
Apr 02 01:45:24 PM PDT 24 |
Apr 02 01:45:27 PM PDT 24 |
569980204 ps |
T668 |
/workspace/coverage/default/18.spi_device_csb_read.1845556690 |
|
|
Apr 02 01:40:27 PM PDT 24 |
Apr 02 01:40:28 PM PDT 24 |
24190747 ps |
T669 |
/workspace/coverage/default/6.spi_device_flash_mode.145185537 |
|
|
Apr 02 01:39:17 PM PDT 24 |
Apr 02 01:40:27 PM PDT 24 |
9284838370 ps |
T670 |
/workspace/coverage/default/16.spi_device_alert_test.2055418048 |
|
|
Apr 02 01:40:21 PM PDT 24 |
Apr 02 01:40:22 PM PDT 24 |
27367640 ps |
T319 |
/workspace/coverage/default/33.spi_device_upload.1762079618 |
|
|
Apr 02 01:43:07 PM PDT 24 |
Apr 02 01:43:19 PM PDT 24 |
11919482195 ps |
T259 |
/workspace/coverage/default/4.spi_device_intercept.1708220184 |
|
|
Apr 02 01:39:14 PM PDT 24 |
Apr 02 01:39:54 PM PDT 24 |
7285211455 ps |
T671 |
/workspace/coverage/default/7.spi_device_tpm_rw.1301437955 |
|
|
Apr 02 01:39:24 PM PDT 24 |
Apr 02 01:39:27 PM PDT 24 |
434905783 ps |
T672 |
/workspace/coverage/default/26.spi_device_tpm_all.1365393733 |
|
|
Apr 02 01:41:15 PM PDT 24 |
Apr 02 01:42:07 PM PDT 24 |
44079837935 ps |
T673 |
/workspace/coverage/default/14.spi_device_csb_read.2434683507 |
|
|
Apr 02 01:40:00 PM PDT 24 |
Apr 02 01:40:01 PM PDT 24 |
58786195 ps |
T674 |
/workspace/coverage/default/36.spi_device_mailbox.2518897275 |
|
|
Apr 02 01:43:40 PM PDT 24 |
Apr 02 01:44:16 PM PDT 24 |
2654588237 ps |
T675 |
/workspace/coverage/default/41.spi_device_tpm_all.1560335762 |
|
|
Apr 02 01:44:38 PM PDT 24 |
Apr 02 01:45:19 PM PDT 24 |
12398170366 ps |
T164 |
/workspace/coverage/default/1.spi_device_stress_all.2925480433 |
|
|
Apr 02 01:38:56 PM PDT 24 |
Apr 02 01:38:57 PM PDT 24 |
272274970 ps |
T191 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.3469850173 |
|
|
Apr 02 01:40:34 PM PDT 24 |
Apr 02 01:40:57 PM PDT 24 |
16838439178 ps |
T306 |
/workspace/coverage/default/34.spi_device_cfg_cmd.3459234316 |
|
|
Apr 02 01:43:19 PM PDT 24 |
Apr 02 01:43:30 PM PDT 24 |
1072089441 ps |
T676 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.1761979102 |
|
|
Apr 02 01:45:31 PM PDT 24 |
Apr 02 01:45:38 PM PDT 24 |
2732081575 ps |
T677 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.967952340 |
|
|
Apr 02 01:38:50 PM PDT 24 |
Apr 02 01:39:08 PM PDT 24 |
7434414763 ps |
T678 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.4095315905 |
|
|
Apr 02 01:44:43 PM PDT 24 |
Apr 02 01:44:45 PM PDT 24 |
170767590 ps |
T679 |
/workspace/coverage/default/37.spi_device_alert_test.369880271 |
|
|
Apr 02 01:44:00 PM PDT 24 |
Apr 02 01:44:01 PM PDT 24 |
14323350 ps |
T680 |
/workspace/coverage/default/29.spi_device_read_buffer_direct.2374922749 |
|
|
Apr 02 01:42:06 PM PDT 24 |
Apr 02 01:42:18 PM PDT 24 |
1934899670 ps |
T681 |
/workspace/coverage/default/19.spi_device_read_buffer_direct.1848205954 |
|
|
Apr 02 01:40:41 PM PDT 24 |
Apr 02 01:40:45 PM PDT 24 |
435680960 ps |
T315 |
/workspace/coverage/default/18.spi_device_intercept.617890655 |
|
|
Apr 02 01:40:32 PM PDT 24 |
Apr 02 01:40:42 PM PDT 24 |
1075268883 ps |
T682 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.3303097678 |
|
|
Apr 02 01:41:15 PM PDT 24 |
Apr 02 01:41:32 PM PDT 24 |
23038062539 ps |
T683 |
/workspace/coverage/default/26.spi_device_tpm_rw.3074255843 |
|
|
Apr 02 01:41:21 PM PDT 24 |
Apr 02 01:41:22 PM PDT 24 |
42009622 ps |
T302 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.2258302233 |
|
|
Apr 02 01:46:11 PM PDT 24 |
Apr 02 01:46:37 PM PDT 24 |
8743385148 ps |
T684 |
/workspace/coverage/default/39.spi_device_tpm_sts_read.76156100 |
|
|
Apr 02 01:44:13 PM PDT 24 |
Apr 02 01:44:14 PM PDT 24 |
105238444 ps |
T685 |
/workspace/coverage/default/35.spi_device_tpm_all.2325840149 |
|
|
Apr 02 01:43:24 PM PDT 24 |
Apr 02 01:44:04 PM PDT 24 |
2576135623 ps |
T686 |
/workspace/coverage/default/4.spi_device_ram_cfg.1106680188 |
|
|
Apr 02 01:39:09 PM PDT 24 |
Apr 02 01:39:10 PM PDT 24 |
14951959 ps |
T268 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.1660214150 |
|
|
Apr 02 01:40:38 PM PDT 24 |
Apr 02 01:40:44 PM PDT 24 |
455456842 ps |
T687 |
/workspace/coverage/default/36.spi_device_stress_all.1355862267 |
|
|
Apr 02 01:43:45 PM PDT 24 |
Apr 02 01:43:47 PM PDT 24 |
66697201 ps |
T688 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.1957662739 |
|
|
Apr 02 01:43:06 PM PDT 24 |
Apr 02 01:43:22 PM PDT 24 |
3846233966 ps |
T689 |
/workspace/coverage/default/10.spi_device_tpm_all.128060133 |
|
|
Apr 02 01:39:42 PM PDT 24 |
Apr 02 01:40:35 PM PDT 24 |
19918613580 ps |
T690 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.3677099615 |
|
|
Apr 02 01:44:42 PM PDT 24 |
Apr 02 01:44:53 PM PDT 24 |
9840728022 ps |
T691 |
/workspace/coverage/default/4.spi_device_tpm_sts_read.2412039536 |
|
|
Apr 02 01:39:09 PM PDT 24 |
Apr 02 01:39:10 PM PDT 24 |
152558860 ps |
T241 |
/workspace/coverage/default/48.spi_device_pass_addr_payload_swap.1841598255 |
|
|
Apr 02 01:46:11 PM PDT 24 |
Apr 02 01:46:23 PM PDT 24 |
3360828208 ps |
T692 |
/workspace/coverage/default/48.spi_device_tpm_all.1153033797 |
|
|
Apr 02 01:46:18 PM PDT 24 |
Apr 02 01:46:49 PM PDT 24 |
22443411438 ps |
T693 |
/workspace/coverage/default/48.spi_device_tpm_rw.3372201208 |
|
|
Apr 02 01:46:14 PM PDT 24 |
Apr 02 01:46:17 PM PDT 24 |
118845129 ps |
T307 |
/workspace/coverage/default/29.spi_device_cfg_cmd.280807900 |
|
|
Apr 02 01:42:07 PM PDT 24 |
Apr 02 01:42:10 PM PDT 24 |
82884621 ps |
T694 |
/workspace/coverage/default/17.spi_device_upload.749620459 |
|
|
Apr 02 01:40:26 PM PDT 24 |
Apr 02 01:40:30 PM PDT 24 |
2164390882 ps |
T276 |
/workspace/coverage/default/38.spi_device_intercept.767238651 |
|
|
Apr 02 01:44:07 PM PDT 24 |
Apr 02 01:44:38 PM PDT 24 |
11442785239 ps |
T695 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.42575461 |
|
|
Apr 02 01:38:59 PM PDT 24 |
Apr 02 01:39:01 PM PDT 24 |
63619924 ps |
T358 |
/workspace/coverage/default/43.spi_device_flash_mode.32114752 |
|
|
Apr 02 01:45:13 PM PDT 24 |
Apr 02 01:45:30 PM PDT 24 |
327490667 ps |
T696 |
/workspace/coverage/default/30.spi_device_tpm_rw.678652018 |
|
|
Apr 02 01:42:15 PM PDT 24 |
Apr 02 01:42:17 PM PDT 24 |
140715210 ps |
T211 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.3959145583 |
|
|
Apr 02 01:38:57 PM PDT 24 |
Apr 02 01:39:29 PM PDT 24 |
21755729407 ps |
T353 |
/workspace/coverage/default/3.spi_device_flash_mode.1387715310 |
|
|
Apr 02 01:39:05 PM PDT 24 |
Apr 02 01:39:23 PM PDT 24 |
763152957 ps |
T186 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.2510671652 |
|
|
Apr 02 01:46:25 PM PDT 24 |
Apr 02 01:47:01 PM PDT 24 |
13917061523 ps |
T697 |
/workspace/coverage/default/12.spi_device_flash_mode.3390993257 |
|
|
Apr 02 01:39:55 PM PDT 24 |
Apr 02 01:40:35 PM PDT 24 |
3359657352 ps |
T343 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.3541224258 |
|
|
Apr 02 01:46:25 PM PDT 24 |
Apr 02 01:46:52 PM PDT 24 |
9523191419 ps |
T698 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.2132603754 |
|
|
Apr 02 01:46:16 PM PDT 24 |
Apr 02 01:46:22 PM PDT 24 |
544045390 ps |
T699 |
/workspace/coverage/default/20.spi_device_tpm_all.4173014079 |
|
|
Apr 02 01:40:44 PM PDT 24 |
Apr 02 01:41:25 PM PDT 24 |
11846418396 ps |
T700 |
/workspace/coverage/default/25.spi_device_alert_test.3308308348 |
|
|
Apr 02 01:41:15 PM PDT 24 |
Apr 02 01:41:16 PM PDT 24 |
11651429 ps |
T701 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1808471315 |
|
|
Apr 02 01:46:17 PM PDT 24 |
Apr 02 01:46:18 PM PDT 24 |
37514801 ps |
T702 |
/workspace/coverage/default/40.spi_device_tpm_all.662368967 |
|
|
Apr 02 01:44:31 PM PDT 24 |
Apr 02 01:44:34 PM PDT 24 |
691183075 ps |
T703 |
/workspace/coverage/default/47.spi_device_csb_read.2655291755 |
|
|
Apr 02 01:45:59 PM PDT 24 |
Apr 02 01:46:01 PM PDT 24 |
38694944 ps |
T704 |
/workspace/coverage/default/25.spi_device_pass_cmd_filtering.1391503790 |
|
|
Apr 02 01:41:14 PM PDT 24 |
Apr 02 01:41:23 PM PDT 24 |
1992388985 ps |
T317 |
/workspace/coverage/default/15.spi_device_pass_cmd_filtering.2427722360 |
|
|
Apr 02 01:40:06 PM PDT 24 |
Apr 02 01:40:37 PM PDT 24 |
12586952497 ps |
T290 |
/workspace/coverage/default/7.spi_device_flash_mode.3849257037 |
|
|
Apr 02 01:39:23 PM PDT 24 |
Apr 02 01:40:13 PM PDT 24 |
5144811385 ps |
T264 |
/workspace/coverage/default/28.spi_device_pass_cmd_filtering.2494087284 |
|
|
Apr 02 01:41:42 PM PDT 24 |
Apr 02 01:42:02 PM PDT 24 |
7196678170 ps |
T705 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.121846280 |
|
|
Apr 02 01:39:34 PM PDT 24 |
Apr 02 01:39:40 PM PDT 24 |
4392929691 ps |
T706 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.1533190374 |
|
|
Apr 02 01:42:40 PM PDT 24 |
Apr 02 01:42:41 PM PDT 24 |
167007032 ps |
T707 |
/workspace/coverage/default/49.spi_device_tpm_rw.2022488510 |
|
|
Apr 02 01:46:25 PM PDT 24 |
Apr 02 01:46:28 PM PDT 24 |
899231152 ps |
T708 |
/workspace/coverage/default/13.spi_device_tpm_all.942105 |
|
|
Apr 02 01:39:58 PM PDT 24 |
Apr 02 01:40:23 PM PDT 24 |
9823458117 ps |
T709 |
/workspace/coverage/default/48.spi_device_csb_read.3860189568 |
|
|
Apr 02 01:46:09 PM PDT 24 |
Apr 02 01:46:10 PM PDT 24 |
47877402 ps |
T710 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.1627368344 |
|
|
Apr 02 01:39:53 PM PDT 24 |
Apr 02 01:39:54 PM PDT 24 |
327017452 ps |
T212 |
/workspace/coverage/default/31.spi_device_upload.2293096938 |
|
|
Apr 02 01:42:32 PM PDT 24 |
Apr 02 01:42:48 PM PDT 24 |
3696321454 ps |
T711 |
/workspace/coverage/default/35.spi_device_alert_test.3236585498 |
|
|
Apr 02 01:43:36 PM PDT 24 |
Apr 02 01:43:38 PM PDT 24 |
39537910 ps |
T267 |
/workspace/coverage/default/15.spi_device_mailbox.2187980713 |
|
|
Apr 02 01:40:13 PM PDT 24 |
Apr 02 01:40:45 PM PDT 24 |
1782021114 ps |
T712 |
/workspace/coverage/default/8.spi_device_tpm_all.4065660252 |
|
|
Apr 02 01:39:27 PM PDT 24 |
Apr 02 01:40:12 PM PDT 24 |
8310782513 ps |
T713 |
/workspace/coverage/default/20.spi_device_tpm_rw.764138037 |
|
|
Apr 02 01:40:42 PM PDT 24 |
Apr 02 01:40:44 PM PDT 24 |
429862008 ps |
T714 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.2541946224 |
|
|
Apr 02 01:40:07 PM PDT 24 |
Apr 02 01:40:08 PM PDT 24 |
374486748 ps |
T715 |
/workspace/coverage/default/4.spi_device_csb_read.4246331889 |
|
|
Apr 02 01:39:15 PM PDT 24 |
Apr 02 01:39:16 PM PDT 24 |
36543982 ps |
T716 |
/workspace/coverage/default/31.spi_device_alert_test.39826642 |
|
|
Apr 02 01:42:37 PM PDT 24 |
Apr 02 01:42:38 PM PDT 24 |
11494880 ps |
T717 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.4215780184 |
|
|
Apr 02 01:40:46 PM PDT 24 |
Apr 02 01:40:53 PM PDT 24 |
567741674 ps |
T718 |
/workspace/coverage/default/15.spi_device_csb_read.4188400233 |
|
|
Apr 02 01:40:06 PM PDT 24 |
Apr 02 01:40:07 PM PDT 24 |
21216859 ps |
T247 |
/workspace/coverage/default/29.spi_device_mailbox.482947700 |
|
|
Apr 02 01:42:04 PM PDT 24 |
Apr 02 01:42:15 PM PDT 24 |
1871109179 ps |
T303 |
/workspace/coverage/default/47.spi_device_mailbox.2988923374 |
|
|
Apr 02 01:46:06 PM PDT 24 |
Apr 02 01:46:37 PM PDT 24 |
2717737897 ps |
T719 |
/workspace/coverage/default/31.spi_device_read_buffer_direct.339550737 |
|
|
Apr 02 01:42:37 PM PDT 24 |
Apr 02 01:42:40 PM PDT 24 |
200996916 ps |
T330 |
/workspace/coverage/default/9.spi_device_upload.2150612547 |
|
|
Apr 02 01:39:34 PM PDT 24 |
Apr 02 01:39:46 PM PDT 24 |
6077538003 ps |
T720 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.1634215932 |
|
|
Apr 02 01:42:55 PM PDT 24 |
Apr 02 01:43:00 PM PDT 24 |
2200379538 ps |
T333 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.2095721667 |
|
|
Apr 02 01:39:14 PM PDT 24 |
Apr 02 01:39:20 PM PDT 24 |
571595311 ps |
T721 |
/workspace/coverage/default/29.spi_device_flash_mode.1609162982 |
|
|
Apr 02 01:42:06 PM PDT 24 |
Apr 02 01:42:38 PM PDT 24 |
1452089056 ps |
T722 |
/workspace/coverage/default/13.spi_device_csb_read.3864421605 |
|
|
Apr 02 01:39:57 PM PDT 24 |
Apr 02 01:39:58 PM PDT 24 |
13614493 ps |
T331 |
/workspace/coverage/default/1.spi_device_upload.2246758708 |
|
|
Apr 02 01:38:57 PM PDT 24 |
Apr 02 01:39:09 PM PDT 24 |
1918002070 ps |
T723 |
/workspace/coverage/default/37.spi_device_tpm_all.3977507661 |
|
|
Apr 02 01:43:48 PM PDT 24 |
Apr 02 01:44:30 PM PDT 24 |
7403595981 ps |
T724 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.2644798500 |
|
|
Apr 02 01:46:26 PM PDT 24 |
Apr 02 01:46:34 PM PDT 24 |
714606442 ps |
T725 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.2869751701 |
|
|
Apr 02 01:39:43 PM PDT 24 |
Apr 02 01:39:51 PM PDT 24 |
1075427369 ps |
T726 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.3545535689 |
|
|
Apr 02 01:45:11 PM PDT 24 |
Apr 02 01:45:17 PM PDT 24 |
5434958554 ps |
T727 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.3798505498 |
|
|
Apr 02 01:40:31 PM PDT 24 |
Apr 02 01:40:39 PM PDT 24 |
2855047098 ps |
T202 |
/workspace/coverage/default/37.spi_device_mailbox.377072990 |
|
|
Apr 02 01:43:56 PM PDT 24 |
Apr 02 01:44:29 PM PDT 24 |
12395095463 ps |
T728 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.700910127 |
|
|
Apr 02 01:38:52 PM PDT 24 |
Apr 02 01:38:53 PM PDT 24 |
88941289 ps |
T729 |
/workspace/coverage/default/40.spi_device_csb_read.3689170981 |
|
|
Apr 02 01:44:28 PM PDT 24 |
Apr 02 01:44:28 PM PDT 24 |
30488407 ps |
T730 |
/workspace/coverage/default/34.spi_device_tpm_rw.1689900638 |
|
|
Apr 02 01:43:11 PM PDT 24 |
Apr 02 01:43:12 PM PDT 24 |
231330891 ps |
T731 |
/workspace/coverage/default/3.spi_device_cfg_cmd.2012580825 |
|
|
Apr 02 01:39:04 PM PDT 24 |
Apr 02 01:39:15 PM PDT 24 |
613923406 ps |
T320 |
/workspace/coverage/default/4.spi_device_mailbox.352117139 |
|
|
Apr 02 01:39:08 PM PDT 24 |
Apr 02 01:39:35 PM PDT 24 |
4431099523 ps |
T236 |
/workspace/coverage/default/33.spi_device_intercept.2948564316 |
|
|
Apr 02 01:43:02 PM PDT 24 |
Apr 02 01:43:09 PM PDT 24 |
1350121541 ps |
T308 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.1010160839 |
|
|
Apr 02 01:40:52 PM PDT 24 |
Apr 02 01:40:58 PM PDT 24 |
5875568072 ps |
T732 |
/workspace/coverage/default/25.spi_device_tpm_read_hw_reg.3813280337 |
|
|
Apr 02 01:41:10 PM PDT 24 |
Apr 02 01:41:16 PM PDT 24 |
1992523715 ps |
T224 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.4022725547 |
|
|
Apr 02 01:41:09 PM PDT 24 |
Apr 02 01:41:24 PM PDT 24 |
4118197578 ps |
T304 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.3988942866 |
|
|
Apr 02 01:43:14 PM PDT 24 |
Apr 02 01:43:21 PM PDT 24 |
3097473587 ps |
T318 |
/workspace/coverage/default/34.spi_device_mailbox.4242271517 |
|
|
Apr 02 01:43:19 PM PDT 24 |
Apr 02 01:44:13 PM PDT 24 |
23907073058 ps |
T345 |
/workspace/coverage/default/32.spi_device_mailbox.3276463544 |
|
|
Apr 02 01:42:52 PM PDT 24 |
Apr 02 01:44:15 PM PDT 24 |
6952645717 ps |
T310 |
/workspace/coverage/default/46.spi_device_cfg_cmd.1345436625 |
|
|
Apr 02 01:45:51 PM PDT 24 |
Apr 02 01:45:54 PM PDT 24 |
43711534 ps |
T339 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.3306522745 |
|
|
Apr 02 01:43:13 PM PDT 24 |
Apr 02 01:43:35 PM PDT 24 |
7256737057 ps |
T733 |
/workspace/coverage/default/22.spi_device_alert_test.2084958012 |
|
|
Apr 02 01:40:58 PM PDT 24 |
Apr 02 01:40:59 PM PDT 24 |
10545984 ps |
T328 |
/workspace/coverage/default/9.spi_device_intercept.3087908113 |
|
|
Apr 02 01:39:33 PM PDT 24 |
Apr 02 01:39:38 PM PDT 24 |
238247547 ps |
T51 |
/workspace/coverage/default/4.spi_device_sec_cm.201059882 |
|
|
Apr 02 01:39:28 PM PDT 24 |
Apr 02 01:39:29 PM PDT 24 |
65667931 ps |
T734 |
/workspace/coverage/default/0.spi_device_csb_read.3602435448 |
|
|
Apr 02 01:38:52 PM PDT 24 |
Apr 02 01:38:53 PM PDT 24 |
24294395 ps |
T332 |
/workspace/coverage/default/39.spi_device_upload.4106659955 |
|
|
Apr 02 01:44:20 PM PDT 24 |
Apr 02 01:45:02 PM PDT 24 |
23667590259 ps |
T735 |
/workspace/coverage/default/40.spi_device_alert_test.3381204880 |
|
|
Apr 02 01:44:37 PM PDT 24 |
Apr 02 01:44:39 PM PDT 24 |
21127636 ps |
T736 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.2182300778 |
|
|
Apr 02 01:44:37 PM PDT 24 |
Apr 02 01:44:46 PM PDT 24 |
3692826347 ps |
T737 |
/workspace/coverage/default/1.spi_device_ram_cfg.4029432092 |
|
|
Apr 02 01:38:55 PM PDT 24 |
Apr 02 01:38:56 PM PDT 24 |
26474292 ps |
T334 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.1244327760 |
|
|
Apr 02 01:40:53 PM PDT 24 |
Apr 02 01:41:16 PM PDT 24 |
17725899876 ps |
T34 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.4043542728 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:04 PM PDT 24 |
315215545 ps |
T738 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2735399269 |
|
|
Apr 02 12:28:32 PM PDT 24 |
Apr 02 12:28:34 PM PDT 24 |
39574125 ps |
T165 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.3684016013 |
|
|
Apr 02 12:28:28 PM PDT 24 |
Apr 02 12:28:29 PM PDT 24 |
18981618 ps |
T35 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1523605256 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:28:08 PM PDT 24 |
578318681 ps |
T104 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.952392821 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:28:03 PM PDT 24 |
42075020 ps |
T128 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.1495639630 |
|
|
Apr 02 12:28:23 PM PDT 24 |
Apr 02 12:28:30 PM PDT 24 |
236897452 ps |
T36 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3670774807 |
|
|
Apr 02 12:28:30 PM PDT 24 |
Apr 02 12:28:44 PM PDT 24 |
580802485 ps |
T113 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.160970093 |
|
|
Apr 02 12:27:57 PM PDT 24 |
Apr 02 12:28:01 PM PDT 24 |
628619639 ps |
T37 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2993205942 |
|
|
Apr 02 12:28:11 PM PDT 24 |
Apr 02 12:28:31 PM PDT 24 |
1900236372 ps |
T739 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3042719405 |
|
|
Apr 02 12:27:58 PM PDT 24 |
Apr 02 12:27:59 PM PDT 24 |
139998768 ps |
T114 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.1050653761 |
|
|
Apr 02 12:28:27 PM PDT 24 |
Apr 02 12:28:31 PM PDT 24 |
612267880 ps |
T740 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.2165763246 |
|
|
Apr 02 12:28:19 PM PDT 24 |
Apr 02 12:28:19 PM PDT 24 |
21629865 ps |
T148 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.971699815 |
|
|
Apr 02 12:27:55 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
156909868 ps |
T149 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.775883179 |
|
|
Apr 02 12:27:58 PM PDT 24 |
Apr 02 12:28:02 PM PDT 24 |
1098180478 ps |
T741 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.720027522 |
|
|
Apr 02 12:27:49 PM PDT 24 |
Apr 02 12:27:50 PM PDT 24 |
11408990 ps |
T118 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.728896491 |
|
|
Apr 02 12:27:53 PM PDT 24 |
Apr 02 12:27:55 PM PDT 24 |
53355004 ps |
T132 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2093315281 |
|
|
Apr 02 12:28:24 PM PDT 24 |
Apr 02 12:28:46 PM PDT 24 |
1742388590 ps |
T150 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.3158312573 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:56 PM PDT 24 |
68420468 ps |
T151 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.294231801 |
|
|
Apr 02 12:28:40 PM PDT 24 |
Apr 02 12:28:43 PM PDT 24 |
270214931 ps |
T133 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.3957844535 |
|
|
Apr 02 12:27:53 PM PDT 24 |
Apr 02 12:28:06 PM PDT 24 |
573192217 ps |
T742 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.999034515 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:55 PM PDT 24 |
16170286 ps |
T743 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.385021780 |
|
|
Apr 02 12:27:57 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
17545240 ps |
T136 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1529310869 |
|
|
Apr 02 12:28:00 PM PDT 24 |
Apr 02 12:28:20 PM PDT 24 |
1302282932 ps |
T152 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.3869921225 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:57 PM PDT 24 |
147771799 ps |
T744 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1545797514 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:13 PM PDT 24 |
1499173864 ps |
T122 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1574316982 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:28:00 PM PDT 24 |
307002857 ps |
T745 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.362643406 |
|
|
Apr 02 12:28:26 PM PDT 24 |
Apr 02 12:28:27 PM PDT 24 |
17534088 ps |
T746 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.1184037341 |
|
|
Apr 02 12:28:32 PM PDT 24 |
Apr 02 12:28:33 PM PDT 24 |
19819783 ps |
T153 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1494713871 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
220951368 ps |
T154 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.317860040 |
|
|
Apr 02 12:28:00 PM PDT 24 |
Apr 02 12:28:04 PM PDT 24 |
796044900 ps |
T124 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2199414635 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:56 PM PDT 24 |
38059115 ps |
T166 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.1525692984 |
|
|
Apr 02 12:27:55 PM PDT 24 |
Apr 02 12:27:56 PM PDT 24 |
20262789 ps |
T134 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3418110112 |
|
|
Apr 02 12:27:57 PM PDT 24 |
Apr 02 12:27:59 PM PDT 24 |
104359997 ps |
T135 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1959574767 |
|
|
Apr 02 12:28:07 PM PDT 24 |
Apr 02 12:28:28 PM PDT 24 |
1050649219 ps |
T747 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.3398433136 |
|
|
Apr 02 12:28:36 PM PDT 24 |
Apr 02 12:28:41 PM PDT 24 |
493622603 ps |
T155 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.3331616411 |
|
|
Apr 02 12:28:22 PM PDT 24 |
Apr 02 12:28:26 PM PDT 24 |
70602818 ps |
T156 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3803160883 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:04 PM PDT 24 |
100291717 ps |
T364 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3494027830 |
|
|
Apr 02 12:27:53 PM PDT 24 |
Apr 02 12:28:01 PM PDT 24 |
277965914 ps |
T748 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.693880394 |
|
|
Apr 02 12:28:28 PM PDT 24 |
Apr 02 12:28:29 PM PDT 24 |
22483086 ps |
T105 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3632112997 |
|
|
Apr 02 12:27:55 PM PDT 24 |
Apr 02 12:27:56 PM PDT 24 |
176701922 ps |
T749 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2644450934 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:27:57 PM PDT 24 |
38807470 ps |
T162 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1375713974 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:28:09 PM PDT 24 |
710610723 ps |
T163 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2481577889 |
|
|
Apr 02 12:27:55 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
344744011 ps |
T750 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.730777554 |
|
|
Apr 02 12:27:53 PM PDT 24 |
Apr 02 12:27:54 PM PDT 24 |
457641474 ps |
T137 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.298323859 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:33 PM PDT 24 |
526733340 ps |
T157 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3302259147 |
|
|
Apr 02 12:27:51 PM PDT 24 |
Apr 02 12:27:52 PM PDT 24 |
36499437 ps |
T751 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1533328692 |
|
|
Apr 02 12:28:30 PM PDT 24 |
Apr 02 12:28:31 PM PDT 24 |
15150129 ps |
T752 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1547354966 |
|
|
Apr 02 12:27:54 PM PDT 24 |
Apr 02 12:27:55 PM PDT 24 |
23634578 ps |
T123 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.1304680853 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:04 PM PDT 24 |
110204243 ps |
T362 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1326841343 |
|
|
Apr 02 12:28:00 PM PDT 24 |
Apr 02 12:28:22 PM PDT 24 |
2032610533 ps |
T753 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.2280521886 |
|
|
Apr 02 12:28:22 PM PDT 24 |
Apr 02 12:28:23 PM PDT 24 |
15555889 ps |
T138 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.2152161765 |
|
|
Apr 02 12:28:31 PM PDT 24 |
Apr 02 12:28:33 PM PDT 24 |
279102225 ps |
T754 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1091450529 |
|
|
Apr 02 12:28:00 PM PDT 24 |
Apr 02 12:28:00 PM PDT 24 |
177214362 ps |
T755 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1154008026 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:27:57 PM PDT 24 |
40325488 ps |
T139 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3665952069 |
|
|
Apr 02 12:28:32 PM PDT 24 |
Apr 02 12:28:34 PM PDT 24 |
100240073 ps |
T756 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2360592288 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:28:33 PM PDT 24 |
6222465370 ps |
T140 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.4043364938 |
|
|
Apr 02 12:28:26 PM PDT 24 |
Apr 02 12:28:29 PM PDT 24 |
93787968 ps |
T757 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2217134507 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:02 PM PDT 24 |
44397778 ps |
T758 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3191090533 |
|
|
Apr 02 12:27:53 PM PDT 24 |
Apr 02 12:27:54 PM PDT 24 |
31768033 ps |
T759 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.4077205631 |
|
|
Apr 02 12:28:31 PM PDT 24 |
Apr 02 12:28:32 PM PDT 24 |
22485846 ps |
T760 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.1460235697 |
|
|
Apr 02 12:28:01 PM PDT 24 |
Apr 02 12:28:03 PM PDT 24 |
106125887 ps |
T761 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.344798553 |
|
|
Apr 02 12:27:57 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
29025809 ps |
T762 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.3943968578 |
|
|
Apr 02 12:28:09 PM PDT 24 |
Apr 02 12:28:10 PM PDT 24 |
11058936 ps |
T763 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.4289784108 |
|
|
Apr 02 12:28:02 PM PDT 24 |
Apr 02 12:28:05 PM PDT 24 |
261620015 ps |
T141 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.4182204402 |
|
|
Apr 02 12:28:00 PM PDT 24 |
Apr 02 12:28:02 PM PDT 24 |
469751382 ps |
T131 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3026491351 |
|
|
Apr 02 12:27:59 PM PDT 24 |
Apr 02 12:28:02 PM PDT 24 |
68361673 ps |
T106 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2801500144 |
|
|
Apr 02 12:28:25 PM PDT 24 |
Apr 02 12:28:26 PM PDT 24 |
41701752 ps |
T764 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.211827610 |
|
|
Apr 02 12:27:55 PM PDT 24 |
Apr 02 12:27:56 PM PDT 24 |
17771767 ps |
T765 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.3981155389 |
|
|
Apr 02 12:27:56 PM PDT 24 |
Apr 02 12:27:58 PM PDT 24 |
27774041 ps |
T130 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.859273977 |
|
|
Apr 02 12:27:57 PM PDT 24 |
Apr 02 12:27:59 PM PDT 24 |
93535471 ps |
T366 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.3319479643 |
|
|
Apr 02 12:27:58 PM PDT 24 |
Apr 02 12:28:04 PM PDT 24 |
107655396 ps |