T319 |
/workspace/coverage/default/4.spi_device_cfg_cmd.968093308 |
|
|
Apr 15 01:18:40 PM PDT 24 |
Apr 15 01:18:43 PM PDT 24 |
202087776 ps |
T620 |
/workspace/coverage/default/19.spi_device_flash_mode.3893853446 |
|
|
Apr 15 01:19:37 PM PDT 24 |
Apr 15 01:19:51 PM PDT 24 |
3126138379 ps |
T165 |
/workspace/coverage/default/42.spi_device_intercept.652259026 |
|
|
Apr 15 01:21:28 PM PDT 24 |
Apr 15 01:21:37 PM PDT 24 |
571182416 ps |
T621 |
/workspace/coverage/default/12.spi_device_cfg_cmd.1174212849 |
|
|
Apr 15 01:19:09 PM PDT 24 |
Apr 15 01:19:16 PM PDT 24 |
1626824035 ps |
T330 |
/workspace/coverage/default/43.spi_device_cfg_cmd.273250553 |
|
|
Apr 15 01:21:41 PM PDT 24 |
Apr 15 01:22:09 PM PDT 24 |
43338832115 ps |
T343 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.161966289 |
|
|
Apr 15 01:20:07 PM PDT 24 |
Apr 15 01:20:13 PM PDT 24 |
1927482555 ps |
T622 |
/workspace/coverage/default/29.spi_device_flash_mode.3438106251 |
|
|
Apr 15 01:20:23 PM PDT 24 |
Apr 15 01:23:04 PM PDT 24 |
11951592809 ps |
T385 |
/workspace/coverage/default/20.spi_device_tpm_all.1445479665 |
|
|
Apr 15 01:19:39 PM PDT 24 |
Apr 15 01:19:53 PM PDT 24 |
1253253646 ps |
T111 |
/workspace/coverage/default/48.spi_device_mailbox.2123418964 |
|
|
Apr 15 01:22:07 PM PDT 24 |
Apr 15 01:22:23 PM PDT 24 |
2252772411 ps |
T623 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.2280828523 |
|
|
Apr 15 01:22:03 PM PDT 24 |
Apr 15 01:22:23 PM PDT 24 |
5383494167 ps |
T624 |
/workspace/coverage/default/24.spi_device_alert_test.2567668904 |
|
|
Apr 15 01:20:07 PM PDT 24 |
Apr 15 01:20:09 PM PDT 24 |
16623318 ps |
T240 |
/workspace/coverage/default/34.spi_device_intercept.593587316 |
|
|
Apr 15 01:20:48 PM PDT 24 |
Apr 15 01:20:55 PM PDT 24 |
898438201 ps |
T625 |
/workspace/coverage/default/23.spi_device_tpm_all.4068182138 |
|
|
Apr 15 01:19:50 PM PDT 24 |
Apr 15 01:19:55 PM PDT 24 |
1999346033 ps |
T626 |
/workspace/coverage/default/8.spi_device_tpm_all.1874790480 |
|
|
Apr 15 01:18:52 PM PDT 24 |
Apr 15 01:19:17 PM PDT 24 |
19334187703 ps |
T627 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.3817455513 |
|
|
Apr 15 01:20:44 PM PDT 24 |
Apr 15 01:20:46 PM PDT 24 |
48380656 ps |
T628 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.2281841358 |
|
|
Apr 15 01:20:43 PM PDT 24 |
Apr 15 01:20:47 PM PDT 24 |
1891969335 ps |
T341 |
/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.2977978671 |
|
|
Apr 15 01:19:29 PM PDT 24 |
Apr 15 01:19:40 PM PDT 24 |
16419262260 ps |
T629 |
/workspace/coverage/default/9.spi_device_flash_mode.1572873165 |
|
|
Apr 15 01:18:59 PM PDT 24 |
Apr 15 01:19:27 PM PDT 24 |
987924469 ps |
T630 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.372785292 |
|
|
Apr 15 01:22:09 PM PDT 24 |
Apr 15 01:22:23 PM PDT 24 |
4598010914 ps |
T167 |
/workspace/coverage/default/26.spi_device_intercept.3707090027 |
|
|
Apr 15 01:20:08 PM PDT 24 |
Apr 15 01:20:37 PM PDT 24 |
6855854395 ps |
T631 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.3646762185 |
|
|
Apr 15 01:20:21 PM PDT 24 |
Apr 15 01:20:22 PM PDT 24 |
102231505 ps |
T632 |
/workspace/coverage/default/38.spi_device_alert_test.964281543 |
|
|
Apr 15 01:21:13 PM PDT 24 |
Apr 15 01:21:15 PM PDT 24 |
97242268 ps |
T344 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.761917846 |
|
|
Apr 15 01:18:54 PM PDT 24 |
Apr 15 01:19:08 PM PDT 24 |
3790716372 ps |
T77 |
/workspace/coverage/default/7.spi_device_upload.4043719211 |
|
|
Apr 15 01:18:48 PM PDT 24 |
Apr 15 01:18:56 PM PDT 24 |
837430338 ps |
T633 |
/workspace/coverage/default/11.spi_device_upload.2976575213 |
|
|
Apr 15 01:19:00 PM PDT 24 |
Apr 15 01:19:08 PM PDT 24 |
834253121 ps |
T180 |
/workspace/coverage/default/49.spi_device_mailbox.168778479 |
|
|
Apr 15 01:22:15 PM PDT 24 |
Apr 15 01:22:31 PM PDT 24 |
2154264536 ps |
T221 |
/workspace/coverage/default/21.spi_device_upload.349167294 |
|
|
Apr 15 01:19:47 PM PDT 24 |
Apr 15 01:20:07 PM PDT 24 |
5457627081 ps |
T325 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.3086324430 |
|
|
Apr 15 01:19:30 PM PDT 24 |
Apr 15 01:19:34 PM PDT 24 |
515798363 ps |
T275 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.3422060619 |
|
|
Apr 15 01:21:40 PM PDT 24 |
Apr 15 01:21:46 PM PDT 24 |
601171177 ps |
T634 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.1085046306 |
|
|
Apr 15 01:20:59 PM PDT 24 |
Apr 15 01:21:07 PM PDT 24 |
691954096 ps |
T635 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.1951722064 |
|
|
Apr 15 01:21:21 PM PDT 24 |
Apr 15 01:21:53 PM PDT 24 |
10757819144 ps |
T636 |
/workspace/coverage/default/31.spi_device_tpm_rw.3649974750 |
|
|
Apr 15 01:20:31 PM PDT 24 |
Apr 15 01:20:33 PM PDT 24 |
94793587 ps |
T637 |
/workspace/coverage/default/49.spi_device_tpm_all.3821919309 |
|
|
Apr 15 01:22:13 PM PDT 24 |
Apr 15 01:22:45 PM PDT 24 |
23332328713 ps |
T638 |
/workspace/coverage/default/40.spi_device_tpm_all.1133682910 |
|
|
Apr 15 01:21:22 PM PDT 24 |
Apr 15 01:21:33 PM PDT 24 |
6768027169 ps |
T639 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.3560375751 |
|
|
Apr 15 01:21:56 PM PDT 24 |
Apr 15 01:22:02 PM PDT 24 |
967304995 ps |
T381 |
/workspace/coverage/default/10.spi_device_tpm_all.2825951342 |
|
|
Apr 15 01:18:57 PM PDT 24 |
Apr 15 01:19:08 PM PDT 24 |
2638429952 ps |
T376 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.2433839590 |
|
|
Apr 15 01:19:05 PM PDT 24 |
Apr 15 01:19:27 PM PDT 24 |
35966201985 ps |
T640 |
/workspace/coverage/default/33.spi_device_cfg_cmd.142563715 |
|
|
Apr 15 01:20:43 PM PDT 24 |
Apr 15 01:20:49 PM PDT 24 |
1811462980 ps |
T641 |
/workspace/coverage/default/49.spi_device_tpm_rw.2902000373 |
|
|
Apr 15 01:22:10 PM PDT 24 |
Apr 15 01:22:15 PM PDT 24 |
973001462 ps |
T317 |
/workspace/coverage/default/19.spi_device_mailbox.459598680 |
|
|
Apr 15 01:19:36 PM PDT 24 |
Apr 15 01:19:52 PM PDT 24 |
721308642 ps |
T642 |
/workspace/coverage/default/32.spi_device_tpm_rw.1226297679 |
|
|
Apr 15 01:20:35 PM PDT 24 |
Apr 15 01:20:38 PM PDT 24 |
1229441404 ps |
T643 |
/workspace/coverage/default/27.spi_device_tpm_all.1075425859 |
|
|
Apr 15 01:20:12 PM PDT 24 |
Apr 15 01:20:45 PM PDT 24 |
16578409463 ps |
T644 |
/workspace/coverage/default/32.spi_device_mailbox.1013397800 |
|
|
Apr 15 01:20:39 PM PDT 24 |
Apr 15 01:21:24 PM PDT 24 |
3959324578 ps |
T645 |
/workspace/coverage/default/19.spi_device_tpm_rw.1217697354 |
|
|
Apr 15 01:19:33 PM PDT 24 |
Apr 15 01:19:37 PM PDT 24 |
4315504357 ps |
T646 |
/workspace/coverage/default/9.spi_device_tpm_all.2880112362 |
|
|
Apr 15 01:18:54 PM PDT 24 |
Apr 15 01:19:28 PM PDT 24 |
2587611380 ps |
T647 |
/workspace/coverage/default/35.spi_device_tpm_rw.531631880 |
|
|
Apr 15 01:20:53 PM PDT 24 |
Apr 15 01:20:55 PM PDT 24 |
125126195 ps |
T648 |
/workspace/coverage/default/46.spi_device_cfg_cmd.2278712043 |
|
|
Apr 15 01:21:55 PM PDT 24 |
Apr 15 01:22:01 PM PDT 24 |
819951509 ps |
T208 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.3758640587 |
|
|
Apr 15 01:18:56 PM PDT 24 |
Apr 15 01:19:25 PM PDT 24 |
11954427743 ps |
T342 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2996435476 |
|
|
Apr 15 01:18:47 PM PDT 24 |
Apr 15 01:18:56 PM PDT 24 |
632140183 ps |
T649 |
/workspace/coverage/default/7.spi_device_flash_mode.1159365989 |
|
|
Apr 15 01:18:49 PM PDT 24 |
Apr 15 01:19:10 PM PDT 24 |
587838078 ps |
T78 |
/workspace/coverage/default/47.spi_device_upload.715481569 |
|
|
Apr 15 01:22:05 PM PDT 24 |
Apr 15 01:22:31 PM PDT 24 |
8344730552 ps |
T168 |
/workspace/coverage/default/6.spi_device_mailbox.194597441 |
|
|
Apr 15 01:18:47 PM PDT 24 |
Apr 15 01:19:25 PM PDT 24 |
12312057752 ps |
T650 |
/workspace/coverage/default/46.spi_device_alert_test.1190717939 |
|
|
Apr 15 01:22:02 PM PDT 24 |
Apr 15 01:22:03 PM PDT 24 |
27984995 ps |
T185 |
/workspace/coverage/default/8.spi_device_intercept.85823713 |
|
|
Apr 15 01:18:53 PM PDT 24 |
Apr 15 01:19:03 PM PDT 24 |
550077048 ps |
T651 |
/workspace/coverage/default/40.spi_device_csb_read.4284304301 |
|
|
Apr 15 01:21:15 PM PDT 24 |
Apr 15 01:21:17 PM PDT 24 |
53442490 ps |
T315 |
/workspace/coverage/default/46.spi_device_mailbox.811543540 |
|
|
Apr 15 01:21:56 PM PDT 24 |
Apr 15 01:22:11 PM PDT 24 |
7654807120 ps |
T652 |
/workspace/coverage/default/37.spi_device_alert_test.2709713165 |
|
|
Apr 15 01:21:06 PM PDT 24 |
Apr 15 01:21:07 PM PDT 24 |
16835114 ps |
T653 |
/workspace/coverage/default/41.spi_device_csb_read.1651912815 |
|
|
Apr 15 01:21:22 PM PDT 24 |
Apr 15 01:21:23 PM PDT 24 |
30039252 ps |
T654 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.3080716037 |
|
|
Apr 15 01:21:53 PM PDT 24 |
Apr 15 01:22:01 PM PDT 24 |
2936571174 ps |
T655 |
/workspace/coverage/default/35.spi_device_alert_test.3971800066 |
|
|
Apr 15 01:21:13 PM PDT 24 |
Apr 15 01:21:14 PM PDT 24 |
11804793 ps |
T355 |
/workspace/coverage/default/41.spi_device_flash_mode.3720790075 |
|
|
Apr 15 01:21:24 PM PDT 24 |
Apr 15 01:22:32 PM PDT 24 |
4667293354 ps |
T335 |
/workspace/coverage/default/2.spi_device_pass_cmd_filtering.4283763986 |
|
|
Apr 15 01:18:34 PM PDT 24 |
Apr 15 01:18:38 PM PDT 24 |
1177147766 ps |
T656 |
/workspace/coverage/default/34.spi_device_tpm_rw.2900197203 |
|
|
Apr 15 01:20:42 PM PDT 24 |
Apr 15 01:20:43 PM PDT 24 |
147042928 ps |
T657 |
/workspace/coverage/default/25.spi_device_tpm_all.1454647463 |
|
|
Apr 15 01:20:05 PM PDT 24 |
Apr 15 01:20:50 PM PDT 24 |
2979998627 ps |
T345 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.4029918891 |
|
|
Apr 15 01:21:09 PM PDT 24 |
Apr 15 01:21:12 PM PDT 24 |
282144395 ps |
T658 |
/workspace/coverage/default/18.spi_device_alert_test.4283614929 |
|
|
Apr 15 01:19:34 PM PDT 24 |
Apr 15 01:19:35 PM PDT 24 |
29322361 ps |
T659 |
/workspace/coverage/default/20.spi_device_flash_mode.200415317 |
|
|
Apr 15 01:19:40 PM PDT 24 |
Apr 15 01:21:02 PM PDT 24 |
11734632013 ps |
T213 |
/workspace/coverage/default/23.spi_device_upload.3195586795 |
|
|
Apr 15 01:19:52 PM PDT 24 |
Apr 15 01:20:10 PM PDT 24 |
6165508864 ps |
T352 |
/workspace/coverage/default/22.spi_device_intercept.1056746408 |
|
|
Apr 15 01:19:50 PM PDT 24 |
Apr 15 01:20:21 PM PDT 24 |
14626698340 ps |
T291 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.660749320 |
|
|
Apr 15 01:18:42 PM PDT 24 |
Apr 15 01:18:55 PM PDT 24 |
4681014837 ps |
T660 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.2356746175 |
|
|
Apr 15 01:21:08 PM PDT 24 |
Apr 15 01:21:39 PM PDT 24 |
45136992930 ps |
T360 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.4222142648 |
|
|
Apr 15 01:19:11 PM PDT 24 |
Apr 15 01:19:16 PM PDT 24 |
849925191 ps |
T282 |
/workspace/coverage/default/48.spi_device_upload.4073143151 |
|
|
Apr 15 01:22:07 PM PDT 24 |
Apr 15 01:22:25 PM PDT 24 |
23135913074 ps |
T661 |
/workspace/coverage/default/7.spi_device_csb_read.1810550233 |
|
|
Apr 15 01:18:48 PM PDT 24 |
Apr 15 01:18:49 PM PDT 24 |
181034064 ps |
T662 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.1231607999 |
|
|
Apr 15 01:21:08 PM PDT 24 |
Apr 15 01:21:16 PM PDT 24 |
2063588402 ps |
T191 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.1233077622 |
|
|
Apr 15 01:20:28 PM PDT 24 |
Apr 15 01:20:52 PM PDT 24 |
15280341735 ps |
T170 |
/workspace/coverage/default/7.spi_device_intercept.3941665840 |
|
|
Apr 15 01:18:51 PM PDT 24 |
Apr 15 01:18:58 PM PDT 24 |
690950128 ps |
T192 |
/workspace/coverage/default/28.spi_device_intercept.516792155 |
|
|
Apr 15 01:20:12 PM PDT 24 |
Apr 15 01:20:16 PM PDT 24 |
375365532 ps |
T663 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.440565265 |
|
|
Apr 15 01:18:53 PM PDT 24 |
Apr 15 01:18:55 PM PDT 24 |
164565787 ps |
T348 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.3525154382 |
|
|
Apr 15 01:20:27 PM PDT 24 |
Apr 15 01:20:31 PM PDT 24 |
163024352 ps |
T664 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.843391146 |
|
|
Apr 15 01:18:40 PM PDT 24 |
Apr 15 01:18:53 PM PDT 24 |
4748236262 ps |
T300 |
/workspace/coverage/default/17.spi_device_flash_mode.314483599 |
|
|
Apr 15 01:19:27 PM PDT 24 |
Apr 15 01:19:41 PM PDT 24 |
3846627081 ps |
T665 |
/workspace/coverage/default/24.spi_device_flash_mode.956705745 |
|
|
Apr 15 01:20:01 PM PDT 24 |
Apr 15 01:21:15 PM PDT 24 |
4836883028 ps |
T263 |
/workspace/coverage/default/31.spi_device_upload.793219454 |
|
|
Apr 15 01:20:30 PM PDT 24 |
Apr 15 01:20:53 PM PDT 24 |
33491971944 ps |
T666 |
/workspace/coverage/default/31.spi_device_read_buffer_direct.3057281597 |
|
|
Apr 15 01:20:31 PM PDT 24 |
Apr 15 01:20:40 PM PDT 24 |
662553583 ps |
T667 |
/workspace/coverage/default/33.spi_device_csb_read.3751593230 |
|
|
Apr 15 01:20:39 PM PDT 24 |
Apr 15 01:20:40 PM PDT 24 |
58458047 ps |
T668 |
/workspace/coverage/default/37.spi_device_tpm_rw.3617048442 |
|
|
Apr 15 01:21:04 PM PDT 24 |
Apr 15 01:21:05 PM PDT 24 |
129144872 ps |
T41 |
/workspace/coverage/default/0.spi_device_ram_cfg.1003671582 |
|
|
Apr 15 01:18:25 PM PDT 24 |
Apr 15 01:18:27 PM PDT 24 |
18329700 ps |
T669 |
/workspace/coverage/default/48.spi_device_tpm_all.2412734584 |
|
|
Apr 15 01:22:04 PM PDT 24 |
Apr 15 01:22:18 PM PDT 24 |
2134769611 ps |
T670 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.254385596 |
|
|
Apr 15 01:18:35 PM PDT 24 |
Apr 15 01:18:47 PM PDT 24 |
2617574554 ps |
T671 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.2919102778 |
|
|
Apr 15 01:20:35 PM PDT 24 |
Apr 15 01:20:40 PM PDT 24 |
2947665001 ps |
T311 |
/workspace/coverage/default/1.spi_device_flash_mode.3941285184 |
|
|
Apr 15 01:18:31 PM PDT 24 |
Apr 15 01:18:45 PM PDT 24 |
453745576 ps |
T672 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.3780177134 |
|
|
Apr 15 01:20:27 PM PDT 24 |
Apr 15 01:20:28 PM PDT 24 |
145644362 ps |
T673 |
/workspace/coverage/default/24.spi_device_mailbox.896499022 |
|
|
Apr 15 01:19:58 PM PDT 24 |
Apr 15 01:21:20 PM PDT 24 |
8459952049 ps |
T674 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.2352214718 |
|
|
Apr 15 01:21:14 PM PDT 24 |
Apr 15 01:21:45 PM PDT 24 |
9388353702 ps |
T365 |
/workspace/coverage/default/14.spi_device_stress_all.1753475205 |
|
|
Apr 15 01:19:27 PM PDT 24 |
Apr 15 01:19:29 PM PDT 24 |
92359212 ps |
T675 |
/workspace/coverage/default/38.spi_device_tpm_read_hw_reg.716687140 |
|
|
Apr 15 01:21:07 PM PDT 24 |
Apr 15 01:21:16 PM PDT 24 |
16099890679 ps |
T349 |
/workspace/coverage/default/16.spi_device_intercept.370915226 |
|
|
Apr 15 01:19:26 PM PDT 24 |
Apr 15 01:19:31 PM PDT 24 |
300252823 ps |
T676 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.1521767223 |
|
|
Apr 15 01:19:05 PM PDT 24 |
Apr 15 01:19:06 PM PDT 24 |
107640299 ps |
T677 |
/workspace/coverage/default/12.spi_device_tpm_rw.3324485877 |
|
|
Apr 15 01:19:07 PM PDT 24 |
Apr 15 01:19:10 PM PDT 24 |
281105214 ps |
T678 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.3716792082 |
|
|
Apr 15 01:19:26 PM PDT 24 |
Apr 15 01:19:42 PM PDT 24 |
4831526646 ps |
T679 |
/workspace/coverage/default/44.spi_device_stress_all.2995263936 |
|
|
Apr 15 01:21:47 PM PDT 24 |
Apr 15 01:21:49 PM PDT 24 |
179576689 ps |
T680 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2106839772 |
|
|
Apr 15 01:18:27 PM PDT 24 |
Apr 15 01:18:37 PM PDT 24 |
2179205470 ps |
T681 |
/workspace/coverage/default/44.spi_device_upload.274636455 |
|
|
Apr 15 01:21:44 PM PDT 24 |
Apr 15 01:22:40 PM PDT 24 |
38508451856 ps |
T321 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.271209827 |
|
|
Apr 15 01:19:17 PM PDT 24 |
Apr 15 01:19:30 PM PDT 24 |
2437813724 ps |
T340 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.3668342212 |
|
|
Apr 15 01:19:51 PM PDT 24 |
Apr 15 01:20:04 PM PDT 24 |
10237012145 ps |
T682 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.4180797469 |
|
|
Apr 15 01:22:11 PM PDT 24 |
Apr 15 01:22:39 PM PDT 24 |
9433786259 ps |
T293 |
/workspace/coverage/default/12.spi_device_mailbox.978528165 |
|
|
Apr 15 01:19:04 PM PDT 24 |
Apr 15 01:19:19 PM PDT 24 |
640849838 ps |
T683 |
/workspace/coverage/default/40.spi_device_tpm_rw.564307708 |
|
|
Apr 15 01:21:19 PM PDT 24 |
Apr 15 01:21:21 PM PDT 24 |
176298881 ps |
T295 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.1695018639 |
|
|
Apr 15 01:21:43 PM PDT 24 |
Apr 15 01:22:05 PM PDT 24 |
19463399537 ps |
T684 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.2409592549 |
|
|
Apr 15 01:20:51 PM PDT 24 |
Apr 15 01:21:10 PM PDT 24 |
7663272761 ps |
T685 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.460796351 |
|
|
Apr 15 01:18:30 PM PDT 24 |
Apr 15 01:18:32 PM PDT 24 |
46269778 ps |
T686 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.101211377 |
|
|
Apr 15 01:19:44 PM PDT 24 |
Apr 15 01:19:49 PM PDT 24 |
1146383237 ps |
T687 |
/workspace/coverage/default/43.spi_device_alert_test.886132168 |
|
|
Apr 15 01:21:44 PM PDT 24 |
Apr 15 01:21:45 PM PDT 24 |
12844353 ps |
T268 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.1461068318 |
|
|
Apr 15 01:20:35 PM PDT 24 |
Apr 15 01:20:57 PM PDT 24 |
58398308301 ps |
T346 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.1010606493 |
|
|
Apr 15 01:21:00 PM PDT 24 |
Apr 15 01:21:20 PM PDT 24 |
9415141214 ps |
T688 |
/workspace/coverage/default/18.spi_device_csb_read.2492086944 |
|
|
Apr 15 01:19:34 PM PDT 24 |
Apr 15 01:19:36 PM PDT 24 |
16370920 ps |
T689 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.2441123685 |
|
|
Apr 15 01:21:53 PM PDT 24 |
Apr 15 01:21:55 PM PDT 24 |
1063584662 ps |
T690 |
/workspace/coverage/default/13.spi_device_csb_read.4188218651 |
|
|
Apr 15 01:19:08 PM PDT 24 |
Apr 15 01:19:10 PM PDT 24 |
13599103 ps |
T332 |
/workspace/coverage/default/6.spi_device_pass_cmd_filtering.3417196671 |
|
|
Apr 15 01:18:47 PM PDT 24 |
Apr 15 01:19:09 PM PDT 24 |
27460979469 ps |
T691 |
/workspace/coverage/default/3.spi_device_flash_mode.2967582555 |
|
|
Apr 15 01:18:41 PM PDT 24 |
Apr 15 01:19:10 PM PDT 24 |
785665569 ps |
T48 |
/workspace/coverage/default/4.spi_device_sec_cm.3144072220 |
|
|
Apr 15 01:18:45 PM PDT 24 |
Apr 15 01:18:47 PM PDT 24 |
168438752 ps |
T692 |
/workspace/coverage/default/7.spi_device_cfg_cmd.3113074984 |
|
|
Apr 15 01:18:49 PM PDT 24 |
Apr 15 01:19:02 PM PDT 24 |
778699470 ps |
T693 |
/workspace/coverage/default/31.spi_device_tpm_all.4072030288 |
|
|
Apr 15 01:20:28 PM PDT 24 |
Apr 15 01:21:06 PM PDT 24 |
8615148669 ps |
T210 |
/workspace/coverage/default/26.spi_device_cfg_cmd.2295733630 |
|
|
Apr 15 01:20:05 PM PDT 24 |
Apr 15 01:20:11 PM PDT 24 |
1194225735 ps |
T322 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.3740791363 |
|
|
Apr 15 01:19:47 PM PDT 24 |
Apr 15 01:19:57 PM PDT 24 |
5633396477 ps |
T694 |
/workspace/coverage/default/27.spi_device_csb_read.2416260821 |
|
|
Apr 15 01:20:09 PM PDT 24 |
Apr 15 01:20:10 PM PDT 24 |
16832160 ps |
T695 |
/workspace/coverage/default/25.spi_device_upload.1267688471 |
|
|
Apr 15 01:20:07 PM PDT 24 |
Apr 15 01:20:27 PM PDT 24 |
8058718647 ps |
T696 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.3421665292 |
|
|
Apr 15 01:18:34 PM PDT 24 |
Apr 15 01:18:53 PM PDT 24 |
4097052523 ps |
T697 |
/workspace/coverage/default/21.spi_device_alert_test.1759142497 |
|
|
Apr 15 01:19:47 PM PDT 24 |
Apr 15 01:19:48 PM PDT 24 |
26385557 ps |
T698 |
/workspace/coverage/default/48.spi_device_alert_test.1402818660 |
|
|
Apr 15 01:22:11 PM PDT 24 |
Apr 15 01:22:12 PM PDT 24 |
42417114 ps |
T699 |
/workspace/coverage/default/19.spi_device_tpm_all.3116660727 |
|
|
Apr 15 01:19:37 PM PDT 24 |
Apr 15 01:20:16 PM PDT 24 |
19163983914 ps |
T700 |
/workspace/coverage/default/34.spi_device_alert_test.3839048788 |
|
|
Apr 15 01:20:51 PM PDT 24 |
Apr 15 01:20:52 PM PDT 24 |
39454004 ps |
T701 |
/workspace/coverage/default/6.spi_device_csb_read.1613900549 |
|
|
Apr 15 01:18:48 PM PDT 24 |
Apr 15 01:18:49 PM PDT 24 |
66456860 ps |
T49 |
/workspace/coverage/default/3.spi_device_sec_cm.3169835487 |
|
|
Apr 15 01:18:40 PM PDT 24 |
Apr 15 01:18:42 PM PDT 24 |
237840297 ps |
T702 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.2108486848 |
|
|
Apr 15 01:21:46 PM PDT 24 |
Apr 15 01:21:48 PM PDT 24 |
1187786703 ps |
T316 |
/workspace/coverage/default/27.spi_device_intercept.2534097911 |
|
|
Apr 15 01:20:23 PM PDT 24 |
Apr 15 01:20:27 PM PDT 24 |
97148794 ps |
T703 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.3380790259 |
|
|
Apr 15 01:18:51 PM PDT 24 |
Apr 15 01:19:00 PM PDT 24 |
19808601358 ps |
T704 |
/workspace/coverage/default/0.spi_device_intercept.4128037816 |
|
|
Apr 15 01:18:29 PM PDT 24 |
Apr 15 01:18:34 PM PDT 24 |
163450185 ps |
T705 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.15715557 |
|
|
Apr 15 01:19:29 PM PDT 24 |
Apr 15 01:19:34 PM PDT 24 |
87683316 ps |
T351 |
/workspace/coverage/default/25.spi_device_intercept.2121698296 |
|
|
Apr 15 01:20:01 PM PDT 24 |
Apr 15 01:20:38 PM PDT 24 |
3479869064 ps |
T706 |
/workspace/coverage/default/8.spi_device_flash_mode.2528978320 |
|
|
Apr 15 01:18:49 PM PDT 24 |
Apr 15 01:19:49 PM PDT 24 |
4064051762 ps |
T707 |
/workspace/coverage/default/24.spi_device_tpm_all.3930540710 |
|
|
Apr 15 01:19:56 PM PDT 24 |
Apr 15 01:20:53 PM PDT 24 |
23375931020 ps |
T708 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.4214474508 |
|
|
Apr 15 01:22:15 PM PDT 24 |
Apr 15 01:22:25 PM PDT 24 |
2053725549 ps |
T387 |
/workspace/coverage/default/28.spi_device_tpm_all.1961572416 |
|
|
Apr 15 01:20:15 PM PDT 24 |
Apr 15 01:20:38 PM PDT 24 |
5608768568 ps |
T709 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.269029318 |
|
|
Apr 15 01:20:59 PM PDT 24 |
Apr 15 01:21:00 PM PDT 24 |
210143603 ps |
T710 |
/workspace/coverage/default/26.spi_device_alert_test.917530804 |
|
|
Apr 15 01:20:11 PM PDT 24 |
Apr 15 01:20:13 PM PDT 24 |
81074326 ps |
T711 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1451843377 |
|
|
Apr 15 01:18:33 PM PDT 24 |
Apr 15 01:18:45 PM PDT 24 |
22943778335 ps |
T269 |
/workspace/coverage/default/5.spi_device_intercept.206554870 |
|
|
Apr 15 01:18:49 PM PDT 24 |
Apr 15 01:18:55 PM PDT 24 |
257598140 ps |
T187 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.4071363058 |
|
|
Apr 15 01:18:54 PM PDT 24 |
Apr 15 01:19:11 PM PDT 24 |
4159201348 ps |
T712 |
/workspace/coverage/default/5.spi_device_csb_read.2546456004 |
|
|
Apr 15 01:18:40 PM PDT 24 |
Apr 15 01:18:42 PM PDT 24 |
19493972 ps |
T713 |
/workspace/coverage/default/47.spi_device_alert_test.3103824168 |
|
|
Apr 15 01:22:05 PM PDT 24 |
Apr 15 01:22:06 PM PDT 24 |
98975838 ps |
T326 |
/workspace/coverage/default/11.spi_device_mailbox.167002606 |
|
|
Apr 15 01:19:00 PM PDT 24 |
Apr 15 01:19:43 PM PDT 24 |
4240209848 ps |
T301 |
/workspace/coverage/default/18.spi_device_flash_mode.3769753464 |
|
|
Apr 15 01:19:34 PM PDT 24 |
Apr 15 01:19:54 PM PDT 24 |
935253969 ps |
T357 |
/workspace/coverage/default/10.spi_device_flash_mode.2573281515 |
|
|
Apr 15 01:18:55 PM PDT 24 |
Apr 15 01:20:09 PM PDT 24 |
22367513871 ps |
T714 |
/workspace/coverage/default/18.spi_device_tpm_all.3497677416 |
|
|
Apr 15 01:19:31 PM PDT 24 |
Apr 15 01:19:55 PM PDT 24 |
5702859794 ps |
T715 |
/workspace/coverage/default/8.spi_device_tpm_rw.3104474822 |
|
|
Apr 15 01:18:50 PM PDT 24 |
Apr 15 01:18:54 PM PDT 24 |
278000100 ps |
T716 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.1907072650 |
|
|
Apr 15 01:21:35 PM PDT 24 |
Apr 15 01:21:57 PM PDT 24 |
7681488164 ps |
T717 |
/workspace/coverage/default/25.spi_device_cfg_cmd.509280059 |
|
|
Apr 15 01:20:13 PM PDT 24 |
Apr 15 01:20:24 PM PDT 24 |
8631581229 ps |
T718 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3679332825 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
44459498 ps |
T35 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2689201898 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:23 PM PDT 24 |
112523058 ps |
T36 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1156217628 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:32 PM PDT 24 |
194644369 ps |
T719 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3618649159 |
|
|
Apr 15 12:40:47 PM PDT 24 |
Apr 15 12:40:48 PM PDT 24 |
51331733 ps |
T153 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2300274794 |
|
|
Apr 15 12:40:25 PM PDT 24 |
Apr 15 12:40:26 PM PDT 24 |
56557113 ps |
T37 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3753696687 |
|
|
Apr 15 12:40:09 PM PDT 24 |
Apr 15 12:40:12 PM PDT 24 |
70070643 ps |
T38 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.4024595408 |
|
|
Apr 15 12:40:15 PM PDT 24 |
Apr 15 12:40:36 PM PDT 24 |
808611205 ps |
T109 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4256929473 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
138242795 ps |
T124 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3294316897 |
|
|
Apr 15 12:40:25 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
174715102 ps |
T120 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2201269727 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:30 PM PDT 24 |
41387265 ps |
T720 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1305921457 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
79661720 ps |
T721 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.686284500 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
34802421 ps |
T39 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.1872439090 |
|
|
Apr 15 12:40:23 PM PDT 24 |
Apr 15 12:40:25 PM PDT 24 |
146346143 ps |
T722 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.3109552914 |
|
|
Apr 15 12:40:31 PM PDT 24 |
Apr 15 12:40:32 PM PDT 24 |
55103961 ps |
T131 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2459319587 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
65455679 ps |
T143 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.3294275473 |
|
|
Apr 15 12:40:15 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
197640300 ps |
T144 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.553265376 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
216898657 ps |
T112 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.1344546639 |
|
|
Apr 15 12:40:07 PM PDT 24 |
Apr 15 12:40:31 PM PDT 24 |
4046934414 ps |
T154 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3282228643 |
|
|
Apr 15 12:40:22 PM PDT 24 |
Apr 15 12:40:24 PM PDT 24 |
50417814 ps |
T132 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2568703691 |
|
|
Apr 15 12:40:10 PM PDT 24 |
Apr 15 12:40:33 PM PDT 24 |
6288777890 ps |
T155 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3867479862 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
106057499 ps |
T140 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.2842796173 |
|
|
Apr 15 12:40:30 PM PDT 24 |
Apr 15 12:41:08 PM PDT 24 |
1891095600 ps |
T133 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.632027451 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:21 PM PDT 24 |
126427395 ps |
T122 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.249654482 |
|
|
Apr 15 12:40:09 PM PDT 24 |
Apr 15 12:40:12 PM PDT 24 |
39043807 ps |
T126 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.1610166357 |
|
|
Apr 15 12:40:11 PM PDT 24 |
Apr 15 12:40:16 PM PDT 24 |
152303741 ps |
T119 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.35918816 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
689602141 ps |
T723 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.2037334664 |
|
|
Apr 15 12:40:15 PM PDT 24 |
Apr 15 12:40:17 PM PDT 24 |
11185179 ps |
T145 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.321854722 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
111514050 ps |
T134 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.4018240657 |
|
|
Apr 15 12:40:20 PM PDT 24 |
Apr 15 12:40:24 PM PDT 24 |
115677460 ps |
T724 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.292470360 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
72512180 ps |
T156 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.815185140 |
|
|
Apr 15 12:40:31 PM PDT 24 |
Apr 15 12:40:32 PM PDT 24 |
37379067 ps |
T725 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2467804587 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
27728583 ps |
T157 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.2043774095 |
|
|
Apr 15 12:40:25 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
22567727 ps |
T146 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1454742437 |
|
|
Apr 15 12:40:23 PM PDT 24 |
Apr 15 12:40:26 PM PDT 24 |
108806781 ps |
T147 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.1711274328 |
|
|
Apr 15 12:40:31 PM PDT 24 |
Apr 15 12:40:33 PM PDT 24 |
1023501267 ps |
T726 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.4229364878 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
12669181 ps |
T727 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1951951020 |
|
|
Apr 15 12:40:11 PM PDT 24 |
Apr 15 12:40:13 PM PDT 24 |
11869332 ps |
T125 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2974477910 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:30 PM PDT 24 |
591965709 ps |
T149 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3842557622 |
|
|
Apr 15 12:40:21 PM PDT 24 |
Apr 15 12:40:24 PM PDT 24 |
198104771 ps |
T728 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3326520136 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:14 PM PDT 24 |
62882256 ps |
T729 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.4242792127 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:16 PM PDT 24 |
28323907 ps |
T730 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.540229506 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
34163547 ps |
T117 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.1613727147 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
915706813 ps |
T150 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1063039627 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:31 PM PDT 24 |
547355165 ps |
T731 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.1909037917 |
|
|
Apr 15 12:40:11 PM PDT 24 |
Apr 15 12:40:14 PM PDT 24 |
1156227518 ps |
T732 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.3851522396 |
|
|
Apr 15 12:40:20 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
128475154 ps |
T733 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2369366475 |
|
|
Apr 15 12:40:29 PM PDT 24 |
Apr 15 12:40:31 PM PDT 24 |
13709650 ps |
T135 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.110104732 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:42 PM PDT 24 |
324067649 ps |
T734 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.82752939 |
|
|
Apr 15 12:40:22 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
238599190 ps |
T136 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2220064468 |
|
|
Apr 15 12:40:12 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
2359346659 ps |
T137 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.768810563 |
|
|
Apr 15 12:40:15 PM PDT 24 |
Apr 15 12:40:17 PM PDT 24 |
38955951 ps |
T96 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.21926805 |
|
|
Apr 15 12:40:24 PM PDT 24 |
Apr 15 12:40:26 PM PDT 24 |
93687216 ps |
T369 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.4284522705 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:43 PM PDT 24 |
877470085 ps |
T138 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.1497643390 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:16 PM PDT 24 |
140476354 ps |
T735 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2097158233 |
|
|
Apr 15 12:40:24 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
161615788 ps |
T151 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3756909159 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:25 PM PDT 24 |
57558730 ps |
T736 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.2123080102 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:15 PM PDT 24 |
12202918 ps |
T737 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2868413561 |
|
|
Apr 15 12:40:30 PM PDT 24 |
Apr 15 12:40:34 PM PDT 24 |
197431531 ps |
T738 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.3487830767 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
14821305 ps |
T739 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1573239493 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:15 PM PDT 24 |
23465907 ps |
T740 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.3803923526 |
|
|
Apr 15 12:40:26 PM PDT 24 |
Apr 15 12:40:27 PM PDT 24 |
26305074 ps |
T741 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1921804114 |
|
|
Apr 15 12:40:12 PM PDT 24 |
Apr 15 12:40:15 PM PDT 24 |
86649980 ps |
T118 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.1921695745 |
|
|
Apr 15 12:40:29 PM PDT 24 |
Apr 15 12:40:33 PM PDT 24 |
92235514 ps |
T152 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.677094922 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:56 PM PDT 24 |
2346718793 ps |
T371 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1606730384 |
|
|
Apr 15 12:40:23 PM PDT 24 |
Apr 15 12:40:31 PM PDT 24 |
109381246 ps |
T372 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3294404699 |
|
|
Apr 15 12:40:25 PM PDT 24 |
Apr 15 12:40:49 PM PDT 24 |
3384439193 ps |
T742 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.4187434308 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:21 PM PDT 24 |
16564723 ps |
T139 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3404953024 |
|
|
Apr 15 12:40:15 PM PDT 24 |
Apr 15 12:40:17 PM PDT 24 |
107439671 ps |
T743 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2343936596 |
|
|
Apr 15 12:40:14 PM PDT 24 |
Apr 15 12:40:16 PM PDT 24 |
49722444 ps |
T129 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.4032158348 |
|
|
Apr 15 12:40:29 PM PDT 24 |
Apr 15 12:40:37 PM PDT 24 |
580960441 ps |
T97 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2386145049 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:15 PM PDT 24 |
70415135 ps |
T141 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2049338671 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
68392564 ps |
T744 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.2509442046 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
18012995 ps |
T142 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.4082425788 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
286129794 ps |
T745 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.338962038 |
|
|
Apr 15 12:40:13 PM PDT 24 |
Apr 15 12:40:16 PM PDT 24 |
45949675 ps |
T746 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.2936980140 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:21 PM PDT 24 |
12384354 ps |
T747 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.2142874444 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:18 PM PDT 24 |
28410753 ps |
T748 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.3918554921 |
|
|
Apr 15 12:40:23 PM PDT 24 |
Apr 15 12:40:24 PM PDT 24 |
37117312 ps |
T373 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3921715712 |
|
|
Apr 15 12:40:18 PM PDT 24 |
Apr 15 12:40:41 PM PDT 24 |
974134833 ps |
T749 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.127174725 |
|
|
Apr 15 12:40:29 PM PDT 24 |
Apr 15 12:40:33 PM PDT 24 |
282105410 ps |
T121 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3087639305 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:19 PM PDT 24 |
101891589 ps |
T750 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.3966898761 |
|
|
Apr 15 12:40:16 PM PDT 24 |
Apr 15 12:40:18 PM PDT 24 |
28961543 ps |
T368 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.1817232049 |
|
|
Apr 15 12:40:28 PM PDT 24 |
Apr 15 12:40:31 PM PDT 24 |
67499394 ps |
T751 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3537661200 |
|
|
Apr 15 12:40:30 PM PDT 24 |
Apr 15 12:40:32 PM PDT 24 |
31131380 ps |
T752 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.1526222113 |
|
|
Apr 15 12:40:31 PM PDT 24 |
Apr 15 12:40:33 PM PDT 24 |
356195538 ps |
T753 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1747678643 |
|
|
Apr 15 12:40:22 PM PDT 24 |
Apr 15 12:40:35 PM PDT 24 |
841395148 ps |
T128 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.205605019 |
|
|
Apr 15 12:40:07 PM PDT 24 |
Apr 15 12:40:11 PM PDT 24 |
423520526 ps |
T754 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1158926470 |
|
|
Apr 15 12:40:17 PM PDT 24 |
Apr 15 12:40:20 PM PDT 24 |
28343063 ps |
T755 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.3384220025 |
|
|
Apr 15 12:40:19 PM PDT 24 |
Apr 15 12:40:21 PM PDT 24 |
24984197 ps |
T756 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1540271528 |
|
|
Apr 15 12:40:32 PM PDT 24 |
Apr 15 12:40:36 PM PDT 24 |
661182097 ps |
T757 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.3632905639 |
|
|
Apr 15 12:40:20 PM PDT 24 |
Apr 15 12:40:22 PM PDT 24 |
38446658 ps |